Serhii
7eb81668e0
- README: XC7A100T → XC7A50T to match the XDC correction note (constraints/xc7a50t_ftg256.xdc lines 9-11) - README: replace dead /10_docs/ paths with tracked locations - README: update contributing section to reference CONTRIBUTING.md - Add minimal CONTRIBUTING.md with repo layout and PR checklist Closes #37
39 lines
1.4 KiB
Markdown
39 lines
1.4 KiB
Markdown
# Contributing to PLFM_RADAR (AERIS-10)
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Thanks for your interest in the project! This guide covers the basics
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for getting a change reviewed and merged.
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## Getting started
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1. Fork the repository and create a topic branch from `develop`.
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2. Keep generated outputs (Vivado projects, bitstreams, build logs)
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out of version control — the `.gitignore` already covers most of
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these.
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## Repository layout
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| Path | Contents |
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|------|----------|
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| `4_Schematics and Boards Layout/` | KiCad schematics, Gerbers, BOM/CPL |
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| `9_Firmware/9_2_FPGA/` | Verilog RTL, constraints, testbenches, build scripts |
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| `9_Firmware/9_2_FPGA/formal/` | SymbiYosys formal-verification wrappers |
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| `9_Firmware/9_2_FPGA/scripts/` | Vivado TCL build & debug scripts |
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| `9_Firmware/9_3_GUI/` | Python radar dashboard (Tkinter + matplotlib) |
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| `docs/` | GitHub Pages documentation site |
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## Before submitting a pull request
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- **Python** — verify syntax: `python3 -m py_compile <file>`
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- **Verilog** — if you have Vivado, run the relevant `build*.tcl`;
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if not, note which scripts your change affects
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- **Whitespace** — `git diff --check` should be clean
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- Keep PRs focused: one logical change per PR is easier to review
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## Areas where help is especially welcome
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See the list in [README.md](README.md#-contributing).
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## Questions?
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Open a GitHub issue — that way the discussion is visible to everyone.
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