Integrate MTI canceller and DC notch filter for ground clutter removal
MTI canceller (2-pulse, H(z)=1-z^{-1}) between range decimator and
Doppler processor. Subtracts previous chirp from current, nulling DC
Doppler (stationary clutter). Pass-through when host_mti_enable=0.
DC notch filter (post-Doppler, pre-CFAR) zeros bins within
+/-host_dc_notch_width of DC. Complements MTI for residual clutter.
New host registers: 0x26 (mti_enable), 0x27 (dc_notch_width).
Both default to 0 (disabled) - fully backward-compatible.
Verification: 23/23 regression, 29/29 MTI standalone, 3/3 real-data
co-sim (5137/5137 exact match) all PASS.
This commit is contained in:
Jason
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`timescale 1ns / 1ps
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/**
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* mti_canceller.v
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*
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* Moving Target Indication (MTI) — 2-pulse canceller for ground clutter removal.
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*
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* Sits between the range bin decimator and the Doppler processor in the
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* AERIS-10 receiver chain. Subtracts the previous chirp's range profile
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* from the current chirp's profile, implementing H(z) = 1 - z^{-1} in
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* slow-time. This places a null at zero Doppler (DC), removing stationary
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* ground clutter while passing moving targets through.
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*
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* Signal chain position:
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* Range Bin Decimator → [MTI Canceller] → Doppler Processor
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*
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* Algorithm:
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* For each range bin r (0..NUM_RANGE_BINS-1):
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* mti_out_i[r] = current_i[r] - previous_i[r]
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* mti_out_q[r] = current_q[r] - previous_q[r]
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*
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* The previous chirp's 64 range bins are stored in a small BRAM.
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* On the very first chirp after reset (or enable), there is no previous
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* data — output is zero (muted) for that first chirp.
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*
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* When mti_enable=0, the module is a transparent pass-through with zero
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* latency penalty (data goes straight through combinationally registered).
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*
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* Resources:
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* - 2 BRAM18 (64 x 16-bit I + 64 x 16-bit Q) or distributed RAM
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* - ~30 LUTs (subtract + mux)
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* - ~40 FFs (pipeline + control)
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* - 0 DSP48
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*
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* Clock domain: clk (100 MHz)
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*/
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module mti_canceller #(
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parameter NUM_RANGE_BINS = 64,
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parameter DATA_WIDTH = 16
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) (
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input wire clk,
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input wire reset_n,
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// ========== INPUT (from range bin decimator) ==========
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input wire signed [DATA_WIDTH-1:0] range_i_in,
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input wire signed [DATA_WIDTH-1:0] range_q_in,
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input wire range_valid_in,
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input wire [5:0] range_bin_in,
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// ========== OUTPUT (to Doppler processor) ==========
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output reg signed [DATA_WIDTH-1:0] range_i_out,
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output reg signed [DATA_WIDTH-1:0] range_q_out,
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output reg range_valid_out,
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output reg [5:0] range_bin_out,
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// ========== CONFIGURATION ==========
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input wire mti_enable, // 1=MTI active, 0=pass-through
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// ========== STATUS ==========
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output reg mti_first_chirp // 1 during first chirp (output muted)
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);
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// ============================================================================
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// PREVIOUS CHIRP BUFFER (64 x 16-bit I, 64 x 16-bit Q)
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// ============================================================================
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// Small enough for distributed RAM on XC7A200T (64 entries).
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// Using separate I/Q arrays for clean read/write.
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reg signed [DATA_WIDTH-1:0] prev_i [0:NUM_RANGE_BINS-1];
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reg signed [DATA_WIDTH-1:0] prev_q [0:NUM_RANGE_BINS-1];
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// Track whether we have valid previous data
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reg has_previous;
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// ============================================================================
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// MTI PROCESSING
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// ============================================================================
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// Read previous chirp data (combinational)
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wire signed [DATA_WIDTH-1:0] prev_i_rd = prev_i[range_bin_in];
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wire signed [DATA_WIDTH-1:0] prev_q_rd = prev_q[range_bin_in];
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// Compute difference with saturation
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// Subtraction can produce DATA_WIDTH+1 bits; saturate back to DATA_WIDTH.
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wire signed [DATA_WIDTH:0] diff_i_full = {range_i_in[DATA_WIDTH-1], range_i_in}
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- {prev_i_rd[DATA_WIDTH-1], prev_i_rd};
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wire signed [DATA_WIDTH:0] diff_q_full = {range_q_in[DATA_WIDTH-1], range_q_in}
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- {prev_q_rd[DATA_WIDTH-1], prev_q_rd};
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// Saturate to DATA_WIDTH bits
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wire signed [DATA_WIDTH-1:0] diff_i_sat;
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wire signed [DATA_WIDTH-1:0] diff_q_sat;
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assign diff_i_sat = (diff_i_full > $signed({{2{1'b0}}, {(DATA_WIDTH-1){1'b1}}}))
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? $signed({1'b0, {(DATA_WIDTH-1){1'b1}}}) // +max
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: (diff_i_full < $signed({{2{1'b1}}, {(DATA_WIDTH-1){1'b0}}}))
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? $signed({1'b1, {(DATA_WIDTH-1){1'b0}}}) // -max
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: diff_i_full[DATA_WIDTH-1:0];
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assign diff_q_sat = (diff_q_full > $signed({{2{1'b0}}, {(DATA_WIDTH-1){1'b1}}}))
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? $signed({1'b0, {(DATA_WIDTH-1){1'b1}}})
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: (diff_q_full < $signed({{2{1'b1}}, {(DATA_WIDTH-1){1'b0}}}))
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? $signed({1'b1, {(DATA_WIDTH-1){1'b0}}})
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: diff_q_full[DATA_WIDTH-1:0];
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// ============================================================================
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// MAIN LOGIC
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// ============================================================================
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always @(posedge clk or negedge reset_n) begin
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if (!reset_n) begin
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range_i_out <= {DATA_WIDTH{1'b0}};
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range_q_out <= {DATA_WIDTH{1'b0}};
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range_valid_out <= 1'b0;
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range_bin_out <= 6'd0;
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has_previous <= 1'b0;
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mti_first_chirp <= 1'b1;
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end else begin
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// Default: no valid output
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range_valid_out <= 1'b0;
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if (range_valid_in) begin
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// Always store current sample as "previous" for next chirp
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prev_i[range_bin_in] <= range_i_in;
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prev_q[range_bin_in] <= range_q_in;
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// Output path
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range_bin_out <= range_bin_in;
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if (!mti_enable) begin
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// Pass-through mode: no MTI processing
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range_i_out <= range_i_in;
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range_q_out <= range_q_in;
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range_valid_out <= 1'b1;
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// Reset first-chirp state when MTI is disabled
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has_previous <= 1'b0;
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mti_first_chirp <= 1'b1;
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end else if (!has_previous) begin
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// First chirp after enable: mute output (no subtraction possible).
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// Still emit valid=1 with zero data so Doppler processor gets
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// the expected number of samples per frame.
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range_i_out <= {DATA_WIDTH{1'b0}};
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range_q_out <= {DATA_WIDTH{1'b0}};
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range_valid_out <= 1'b1;
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// After last range bin of first chirp, mark previous as valid
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if (range_bin_in == NUM_RANGE_BINS - 1) begin
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has_previous <= 1'b1;
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mti_first_chirp <= 1'b0;
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end
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end else begin
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// Normal MTI: subtract previous from current
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range_i_out <= diff_i_sat;
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range_q_out <= diff_q_sat;
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range_valid_out <= 1'b1;
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end
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end
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end
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end
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// ============================================================================
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// MEMORY INITIALIZATION (simulation only)
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// ============================================================================
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`ifdef SIMULATION
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integer init_k;
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initial begin
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for (init_k = 0; init_k < NUM_RANGE_BINS; init_k = init_k + 1) begin
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prev_i[init_k] = 0;
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prev_q[init_k] = 0;
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end
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end
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`endif
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endmodule
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