Add MCU firmware test harness with 8 bug-confirming tests
Complete test infrastructure for the observe-before-fix methodology: - stm32_hal_mock: HAL stub types + spy/recording ring buffer (512 entries) - ad_driver_mock: ADF4382/AD9523 mock drivers with configurable returns - 9 shim headers redirecting real #includes to mock types - Makefile with individual (test_bug1..8) and aggregate (test) targets All 8 tests pass, confirming: #1 Timed sync init ordering (SetupTimedSync before initialized=true) #2 AD9523 double setup (first call before reset release) #3 TriggerTimedSync no-op (prints messages, no HW action) #4 Phase shift before init error check #5 SetFinePhaseShift GPIO-only placeholder (no PWM) #6 Timer variable collision (last_check vs last_check1) #7 GPIO pin mapping conflict (manager.h vs CubeMX main.h) #8 uart_print/uart_println commented out
This commit is contained in:
Jason
@@ -0,0 +1,5 @@
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/* shim: redirect adf4382.h -> our mock types */
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#ifndef ADF4382_H_SHIM
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#define ADF4382_H_SHIM
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#include "ad_driver_mock.h"
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#endif
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/* shim: adf4382a_manager.h -- provides the manager API using mock types
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*
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* The real adf4382a_manager.h includes adf4382.h and no_os_spi.h via
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* quoted includes, which the compiler resolves to the same-directory
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* copies BEFORE checking -I paths. This shim replaces it for test code
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* so all types come from our mocks.
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*
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* Note: adf4382a_manager.c is compiled separately with the correct -I
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* order, so IT gets the shim versions of adf4382.h etc. Test .c files
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* include THIS file instead.
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*/
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#ifndef ADF4382A_MANAGER_H_SHIM
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#define ADF4382A_MANAGER_H_SHIM
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#include "stm32_hal_mock.h"
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#include "ad_driver_mock.h"
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/* ---- Constants (copied from real adf4382a_manager.h) ---- */
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/* GPIO Definitions — these are the manager.h pin mappings (the buggy ones) */
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#define TX_CE_Pin GPIO_PIN_0
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#define TX_CE_GPIO_Port GPIOG
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#define TX_CS_Pin GPIO_PIN_1
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#define TX_CS_GPIO_Port GPIOG
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#define TX_DELADJ_Pin GPIO_PIN_2
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#define TX_DELADJ_GPIO_Port GPIOG
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#define TX_DELSTR_Pin GPIO_PIN_3
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#define TX_DELSTR_GPIO_Port GPIOG
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#define TX_LKDET_Pin GPIO_PIN_4
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#define TX_LKDET_GPIO_Port GPIOG
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#define RX_CE_Pin GPIO_PIN_5
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#define RX_CE_GPIO_Port GPIOG
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#define RX_CS_Pin GPIO_PIN_6
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#define RX_CS_GPIO_Port GPIOG
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#define RX_DELADJ_Pin GPIO_PIN_7
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#define RX_DELADJ_GPIO_Port GPIOG
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#define RX_DELSTR_Pin GPIO_PIN_8
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#define RX_DELSTR_GPIO_Port GPIOG
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#define RX_LKDET_Pin GPIO_PIN_9
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#define RX_LKDET_GPIO_Port GPIOG
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/* Frequency definitions */
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#define REF_FREQ_HZ 300000000ULL
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#define TX_FREQ_HZ 10500000000ULL
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#define RX_FREQ_HZ 10380000000ULL
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#define SYNC_CLOCK_FREQ 60000000ULL
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/* SPI Configuration */
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#define ADF4382A_SPI_DEVICE_ID 4
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#define ADF4382A_SPI_SPEED_HZ 10000000
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/* Phase delay configuration */
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#define DELADJ_MAX_DUTY_CYCLE 1000
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#define DELADJ_PULSE_WIDTH_US 10
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#define PHASE_SHIFT_MAX_PS 10000
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/* Error codes */
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#define ADF4382A_MANAGER_OK 0
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#define ADF4382A_MANAGER_ERROR_INVALID -1
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#define ADF4382A_MANAGER_ERROR_NOT_INIT -2
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#define ADF4382A_MANAGER_ERROR_SPI -3
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typedef enum {
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SYNC_METHOD_EZSYNC = 0,
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SYNC_METHOD_TIMED = 1
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} SyncMethod;
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typedef struct {
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struct adf4382_dev *tx_dev;
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struct adf4382_dev *rx_dev;
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struct no_os_spi_init_param spi_tx_param;
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struct no_os_spi_init_param spi_rx_param;
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bool initialized;
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SyncMethod sync_method;
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uint16_t tx_phase_shift_ps;
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uint16_t rx_phase_shift_ps;
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} ADF4382A_Manager;
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/* Public functions */
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int ADF4382A_Manager_Init(ADF4382A_Manager *manager, SyncMethod method);
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int ADF4382A_Manager_Deinit(ADF4382A_Manager *manager);
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int ADF4382A_SetupTimedSync(ADF4382A_Manager *manager);
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int ADF4382A_SetupEZSync(ADF4382A_Manager *manager);
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int ADF4382A_TriggerTimedSync(ADF4382A_Manager *manager);
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int ADF4382A_TriggerEZSync(ADF4382A_Manager *manager);
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int ADF4382A_CheckLockStatus(ADF4382A_Manager *manager, bool *tx_locked, bool *rx_locked);
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int ADF4382A_SetOutputPower(ADF4382A_Manager *manager, uint8_t tx_power, uint8_t rx_power);
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int ADF4382A_EnableOutputs(ADF4382A_Manager *manager, bool tx_enable, bool rx_enable);
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int ADF4382A_SetPhaseShift(ADF4382A_Manager *manager, uint16_t tx_phase_ps, uint16_t rx_phase_ps);
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int ADF4382A_GetPhaseShift(ADF4382A_Manager *manager, uint16_t *tx_phase_ps, uint16_t *rx_phase_ps);
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int ADF4382A_SetFinePhaseShift(ADF4382A_Manager *manager, uint8_t device, uint16_t duty_cycle);
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int ADF4382A_StrobePhaseShift(ADF4382A_Manager *manager, uint8_t device);
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#endif /* ADF4382A_MANAGER_H_SHIM */
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@@ -0,0 +1,18 @@
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/* shim: diag_log.h -- disable DIAG macros for test builds */
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#ifndef DIAG_LOG_H_SHIM
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#define DIAG_LOG_H_SHIM
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/* Silence all DIAG output during unit tests */
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#define DIAG_DISABLE
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#define DIAG(tag, fmt, ...) ((void)0)
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#define DIAG_WARN(tag, fmt, ...) ((void)0)
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#define DIAG_ERR(tag, fmt, ...) ((void)0)
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#define DIAG_REG(tag, name, val) ((void)0)
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#define DIAG_REG32(tag, name, val) ((void)0)
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#define DIAG_GPIO(tag, name, port, pin) ((void)0)
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#define DIAG_BOOL(tag, name, val) ((void)0)
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#define DIAG_SECTION(name) ((void)0)
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#define DIAG_ELAPSED(tag, name, t) ((void)0)
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#endif
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/* shim: redirect main.h -> our mock + pin defines from real main.h */
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#ifndef MAIN_H_SHIM
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#define MAIN_H_SHIM
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#include "stm32_hal_mock.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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extern uint8_t GUI_start_flag_received;
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extern uint8_t USB_Buffer[64];
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void Error_Handler(void);
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/* Pin definitions from real main.h (CubeMX-generated) */
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#define AD9523_PD_Pin GPIO_PIN_3
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#define AD9523_PD_GPIO_Port GPIOF
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#define AD9523_REF_SEL_Pin GPIO_PIN_4
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#define AD9523_REF_SEL_GPIO_Port GPIOF
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#define AD9523_SYNC_Pin GPIO_PIN_5
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#define AD9523_SYNC_GPIO_Port GPIOF
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#define AD9523_RESET_Pin GPIO_PIN_6
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#define AD9523_RESET_GPIO_Port GPIOF
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#define AD9523_CS_Pin GPIO_PIN_7
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#define AD9523_CS_GPIO_Port GPIOF
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#define AD9523_STATUS0_Pin GPIO_PIN_8
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#define AD9523_STATUS0_GPIO_Port GPIOF
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#define AD9523_STATUS1_Pin GPIO_PIN_9
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#define AD9523_STATUS1_GPIO_Port GPIOF
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#define AD9523_EEPROM_SEL_Pin GPIO_PIN_10
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#define AD9523_EEPROM_SEL_GPIO_Port GPIOF
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#define ADAR_1_CS_3V3_Pin GPIO_PIN_0
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#define ADAR_1_CS_3V3_GPIO_Port GPIOA
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#define ADAR_2_CS_3V3_Pin GPIO_PIN_1
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#define ADAR_2_CS_3V3_GPIO_Port GPIOA
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#define ADAR_3_CS_3V3_Pin GPIO_PIN_2
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#define ADAR_3_CS_3V3_GPIO_Port GPIOA
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#define ADAR_4_CS_3V3_Pin GPIO_PIN_3
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#define ADAR_4_CS_3V3_GPIO_Port GPIOA
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#define LED_1_Pin GPIO_PIN_12
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#define LED_1_GPIO_Port GPIOF
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#define LED_2_Pin GPIO_PIN_13
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#define LED_2_GPIO_Port GPIOF
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#define LED_3_Pin GPIO_PIN_14
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#define LED_3_GPIO_Port GPIOF
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#define LED_4_Pin GPIO_PIN_15
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#define LED_4_GPIO_Port GPIOF
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#define EN_P_5V0_PA1_Pin GPIO_PIN_0
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#define EN_P_5V0_PA1_GPIO_Port GPIOG
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#define EN_P_5V0_PA2_Pin GPIO_PIN_1
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#define EN_P_5V0_PA2_GPIO_Port GPIOG
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#define EN_P_5V0_PA3_Pin GPIO_PIN_2
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#define EN_P_5V0_PA3_GPIO_Port GPIOG /* was GPIO_PIN_2 */
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#define EN_P_5V5_PA_Pin GPIO_PIN_3
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#define EN_P_5V5_PA_GPIO_Port GPIOG
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#define EN_P_1V8_CLOCK_Pin GPIO_PIN_4
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#define EN_P_1V8_CLOCK_GPIO_Port GPIOG
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#define EN_P_3V3_CLOCK_Pin GPIO_PIN_5
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#define EN_P_3V3_CLOCK_GPIO_Port GPIOG
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#define ADF4382_RX_LKDET_Pin GPIO_PIN_6
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#define ADF4382_RX_LKDET_GPIO_Port GPIOG
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#define ADF4382_RX_DELADJ_Pin GPIO_PIN_7
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#define ADF4382_RX_DELADJ_GPIO_Port GPIOG
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#define ADF4382_RX_DELSTR_Pin GPIO_PIN_8
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#define ADF4382_RX_DELSTR_GPIO_Port GPIOG
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#define ADF4382_RX_CE_Pin GPIO_PIN_9
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#define ADF4382_RX_CE_GPIO_Port GPIOG /* was GPIO_PIN_9 */
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#define ADF4382_RX_CS_Pin GPIO_PIN_10
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#define ADF4382_RX_CS_GPIO_Port GPIOG /* was GPIO_PIN_10 */
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#define ADF4382_TX_LKDET_Pin GPIO_PIN_11
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#define ADF4382_TX_LKDET_GPIO_Port GPIOG
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#define ADF4382_TX_DELSTR_Pin GPIO_PIN_12
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#define ADF4382_TX_DELSTR_GPIO_Port GPIOG
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#define ADF4382_TX_DELADJ_Pin GPIO_PIN_13
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#define ADF4382_TX_DELADJ_GPIO_Port GPIOG
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#define ADF4382_TX_CS_Pin GPIO_PIN_14
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#define ADF4382_TX_CS_GPIO_Port GPIOG
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#define ADF4382_TX_CE_Pin GPIO_PIN_15
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#define ADF4382_TX_CE_GPIO_Port GPIOG
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/* Power enables (GPIOE) */
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#define EN_P_1V0_FPGA_Pin GPIO_PIN_7
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#define EN_P_1V0_FPGA_GPIO_Port GPIOE
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#define EN_P_1V8_FPGA_Pin GPIO_PIN_8
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#define EN_P_1V8_FPGA_GPIO_Port GPIOE
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#define EN_P_3V3_FPGA_Pin GPIO_PIN_9
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#define EN_P_3V3_FPGA_GPIO_Port GPIOE
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#define EN_P_5V0_ADAR_Pin GPIO_PIN_10
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#define EN_P_5V0_ADAR_GPIO_Port GPIOE
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#define EN_P_3V3_ADAR12_Pin GPIO_PIN_11
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#define EN_P_3V3_ADAR12_GPIO_Port GPIOE
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#define EN_P_3V3_ADAR34_Pin GPIO_PIN_12
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#define EN_P_3V3_ADAR34_GPIO_Port GPIOE
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#define EN_P_3V3_ADTR_Pin GPIO_PIN_13
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#define EN_P_3V3_ADTR_GPIO_Port GPIOE
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#define EN_P_3V3_SW_Pin GPIO_PIN_14
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#define EN_P_3V3_SW_GPIO_Port GPIOE
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#define EN_P_3V3_VDD_SW_Pin GPIO_PIN_15
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#define EN_P_3V3_VDD_SW_GPIO_Port GPIOE
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/* GPIOD pins */
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#define STEPPER_CW_P_Pin GPIO_PIN_4
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#define STEPPER_CW_P_GPIO_Port GPIOD
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#define STEPPER_CLK_P_Pin GPIO_PIN_5
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#define STEPPER_CLK_P_GPIO_Port GPIOD
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#define EN_DIS_RFPA_VDD_Pin GPIO_PIN_6
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#define EN_DIS_RFPA_VDD_GPIO_Port GPIOD
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#define EN_DIS_COOLING_Pin GPIO_PIN_7
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#define EN_DIS_COOLING_GPIO_Port GPIOD
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/* DAC pins */
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#define DAC_1_VG_CLR_Pin GPIO_PIN_4
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#define DAC_1_VG_CLR_GPIO_Port GPIOB
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#define DAC_1_VG_LDAC_Pin GPIO_PIN_5
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#define DAC_1_VG_LDAC_GPIO_Port GPIOB
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#define DAC_2_VG_CLR_Pin GPIO_PIN_8
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#define DAC_2_VG_CLR_GPIO_Port GPIOB
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#define DAC_2_VG_LDAC_Pin GPIO_PIN_9
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#define DAC_2_VG_LDAC_GPIO_Port GPIOB
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/* IMU interrupt pins */
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#define MAG_DRDY_Pin GPIO_PIN_6
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#define MAG_DRDY_GPIO_Port GPIOC
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#define ACC_INT_Pin GPIO_PIN_7
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#define ACC_INT_GPIO_Port GPIOC
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#define GYR_INT_Pin GPIO_PIN_8
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#define GYR_INT_GPIO_Port GPIOC
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#ifdef __cplusplus
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}
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#endif
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#endif /* MAIN_H_SHIM */
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/* shim: redirect no_os_delay.h -> our mock */
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#ifndef NO_OS_DELAY_H_SHIM
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#define NO_OS_DELAY_H_SHIM
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#include "stm32_hal_mock.h"
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/* no_os_udelay and no_os_mdelay declared in stm32_hal_mock.h */
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struct no_os_time { uint32_t s; uint32_t us; };
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#endif
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@@ -0,0 +1,5 @@
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/* shim: redirect no_os_spi.h -> our mock types */
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#ifndef NO_OS_SPI_H_SHIM
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#define NO_OS_SPI_H_SHIM
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#include "ad_driver_mock.h"
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#endif
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@@ -0,0 +1,10 @@
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/* shim: redirect no_os_units.h -> minimal defines */
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#ifndef NO_OS_UNITS_H_SHIM
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#define NO_OS_UNITS_H_SHIM
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#define MEGA 1000000ULL
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#define NANO 1000000000ULL
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#define PICO 1000000000000ULL
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#define KHZ_PER_MHZ 1000ULL
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#endif
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@@ -0,0 +1,25 @@
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/* shim: redirect no_os_util.h -> minimal defines */
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#ifndef NO_OS_UTIL_H_SHIM
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#define NO_OS_UTIL_H_SHIM
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#include <stdint.h>
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#ifndef NO_OS_BIT
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#define NO_OS_BIT(x) (1UL << (x))
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#endif
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#ifndef NO_OS_GENMASK
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#define NO_OS_GENMASK(h, l) (((~0UL) << (l)) & (~0UL >> (31 - (h))))
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#endif
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static inline uint32_t no_os_field_prep(uint32_t mask, uint32_t val) {
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int shift = __builtin_ctz(mask);
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return (val << shift) & mask;
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}
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static inline uint32_t no_os_field_get(uint32_t mask, uint32_t val) {
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int shift = __builtin_ctz(mask);
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return (val & mask) >> shift;
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}
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#endif
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@@ -0,0 +1,5 @@
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/* shim: redirect stm32f7xx_hal.h -> our mock */
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#ifndef STM32F7XX_HAL_H_SHIM
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#define STM32F7XX_HAL_H_SHIM
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#include "stm32_hal_mock.h"
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#endif
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