Jason
28a66889ad
Complete test infrastructure for the observe-before-fix methodology: - stm32_hal_mock: HAL stub types + spy/recording ring buffer (512 entries) - ad_driver_mock: ADF4382/AD9523 mock drivers with configurable returns - 9 shim headers redirecting real #includes to mock types - Makefile with individual (test_bug1..8) and aggregate (test) targets All 8 tests pass, confirming: #1 Timed sync init ordering (SetupTimedSync before initialized=true) #2 AD9523 double setup (first call before reset release) #3 TriggerTimedSync no-op (prints messages, no HW action) #4 Phase shift before init error check #5 SetFinePhaseShift GPIO-only placeholder (no PWM) #6 Timer variable collision (last_check vs last_check1) #7 GPIO pin mapping conflict (manager.h vs CubeMX main.h) #8 uart_print/uart_println commented out
137 lines
4.3 KiB
C
137 lines
4.3 KiB
C
/* shim: redirect main.h -> our mock + pin defines from real main.h */
|
|
#ifndef MAIN_H_SHIM
|
|
#define MAIN_H_SHIM
|
|
#include "stm32_hal_mock.h"
|
|
|
|
#ifdef __cplusplus
|
|
extern "C" {
|
|
#endif
|
|
|
|
extern uint8_t GUI_start_flag_received;
|
|
extern uint8_t USB_Buffer[64];
|
|
void Error_Handler(void);
|
|
|
|
/* Pin definitions from real main.h (CubeMX-generated) */
|
|
#define AD9523_PD_Pin GPIO_PIN_3
|
|
#define AD9523_PD_GPIO_Port GPIOF
|
|
#define AD9523_REF_SEL_Pin GPIO_PIN_4
|
|
#define AD9523_REF_SEL_GPIO_Port GPIOF
|
|
#define AD9523_SYNC_Pin GPIO_PIN_5
|
|
#define AD9523_SYNC_GPIO_Port GPIOF
|
|
#define AD9523_RESET_Pin GPIO_PIN_6
|
|
#define AD9523_RESET_GPIO_Port GPIOF
|
|
#define AD9523_CS_Pin GPIO_PIN_7
|
|
#define AD9523_CS_GPIO_Port GPIOF
|
|
#define AD9523_STATUS0_Pin GPIO_PIN_8
|
|
#define AD9523_STATUS0_GPIO_Port GPIOF
|
|
#define AD9523_STATUS1_Pin GPIO_PIN_9
|
|
#define AD9523_STATUS1_GPIO_Port GPIOF
|
|
#define AD9523_EEPROM_SEL_Pin GPIO_PIN_10
|
|
#define AD9523_EEPROM_SEL_GPIO_Port GPIOF
|
|
|
|
#define ADAR_1_CS_3V3_Pin GPIO_PIN_0
|
|
#define ADAR_1_CS_3V3_GPIO_Port GPIOA
|
|
#define ADAR_2_CS_3V3_Pin GPIO_PIN_1
|
|
#define ADAR_2_CS_3V3_GPIO_Port GPIOA
|
|
#define ADAR_3_CS_3V3_Pin GPIO_PIN_2
|
|
#define ADAR_3_CS_3V3_GPIO_Port GPIOA
|
|
#define ADAR_4_CS_3V3_Pin GPIO_PIN_3
|
|
#define ADAR_4_CS_3V3_GPIO_Port GPIOA
|
|
|
|
#define LED_1_Pin GPIO_PIN_12
|
|
#define LED_1_GPIO_Port GPIOF
|
|
#define LED_2_Pin GPIO_PIN_13
|
|
#define LED_2_GPIO_Port GPIOF
|
|
#define LED_3_Pin GPIO_PIN_14
|
|
#define LED_3_GPIO_Port GPIOF
|
|
#define LED_4_Pin GPIO_PIN_15
|
|
#define LED_4_GPIO_Port GPIOF
|
|
|
|
#define EN_P_5V0_PA1_Pin GPIO_PIN_0
|
|
#define EN_P_5V0_PA1_GPIO_Port GPIOG
|
|
#define EN_P_5V0_PA2_Pin GPIO_PIN_1
|
|
#define EN_P_5V0_PA2_GPIO_Port GPIOG
|
|
#define EN_P_5V0_PA3_Pin GPIO_PIN_2
|
|
#define EN_P_5V0_PA3_GPIO_Port GPIOG /* was GPIO_PIN_2 */
|
|
#define EN_P_5V5_PA_Pin GPIO_PIN_3
|
|
#define EN_P_5V5_PA_GPIO_Port GPIOG
|
|
#define EN_P_1V8_CLOCK_Pin GPIO_PIN_4
|
|
#define EN_P_1V8_CLOCK_GPIO_Port GPIOG
|
|
#define EN_P_3V3_CLOCK_Pin GPIO_PIN_5
|
|
#define EN_P_3V3_CLOCK_GPIO_Port GPIOG
|
|
|
|
#define ADF4382_RX_LKDET_Pin GPIO_PIN_6
|
|
#define ADF4382_RX_LKDET_GPIO_Port GPIOG
|
|
#define ADF4382_RX_DELADJ_Pin GPIO_PIN_7
|
|
#define ADF4382_RX_DELADJ_GPIO_Port GPIOG
|
|
#define ADF4382_RX_DELSTR_Pin GPIO_PIN_8
|
|
#define ADF4382_RX_DELSTR_GPIO_Port GPIOG
|
|
#define ADF4382_RX_CE_Pin GPIO_PIN_9
|
|
#define ADF4382_RX_CE_GPIO_Port GPIOG /* was GPIO_PIN_9 */
|
|
#define ADF4382_RX_CS_Pin GPIO_PIN_10
|
|
#define ADF4382_RX_CS_GPIO_Port GPIOG /* was GPIO_PIN_10 */
|
|
#define ADF4382_TX_LKDET_Pin GPIO_PIN_11
|
|
#define ADF4382_TX_LKDET_GPIO_Port GPIOG
|
|
#define ADF4382_TX_DELSTR_Pin GPIO_PIN_12
|
|
#define ADF4382_TX_DELSTR_GPIO_Port GPIOG
|
|
#define ADF4382_TX_DELADJ_Pin GPIO_PIN_13
|
|
#define ADF4382_TX_DELADJ_GPIO_Port GPIOG
|
|
#define ADF4382_TX_CS_Pin GPIO_PIN_14
|
|
#define ADF4382_TX_CS_GPIO_Port GPIOG
|
|
#define ADF4382_TX_CE_Pin GPIO_PIN_15
|
|
#define ADF4382_TX_CE_GPIO_Port GPIOG
|
|
|
|
/* Power enables (GPIOE) */
|
|
#define EN_P_1V0_FPGA_Pin GPIO_PIN_7
|
|
#define EN_P_1V0_FPGA_GPIO_Port GPIOE
|
|
#define EN_P_1V8_FPGA_Pin GPIO_PIN_8
|
|
#define EN_P_1V8_FPGA_GPIO_Port GPIOE
|
|
#define EN_P_3V3_FPGA_Pin GPIO_PIN_9
|
|
#define EN_P_3V3_FPGA_GPIO_Port GPIOE
|
|
#define EN_P_5V0_ADAR_Pin GPIO_PIN_10
|
|
#define EN_P_5V0_ADAR_GPIO_Port GPIOE
|
|
#define EN_P_3V3_ADAR12_Pin GPIO_PIN_11
|
|
#define EN_P_3V3_ADAR12_GPIO_Port GPIOE
|
|
#define EN_P_3V3_ADAR34_Pin GPIO_PIN_12
|
|
#define EN_P_3V3_ADAR34_GPIO_Port GPIOE
|
|
#define EN_P_3V3_ADTR_Pin GPIO_PIN_13
|
|
#define EN_P_3V3_ADTR_GPIO_Port GPIOE
|
|
#define EN_P_3V3_SW_Pin GPIO_PIN_14
|
|
#define EN_P_3V3_SW_GPIO_Port GPIOE
|
|
#define EN_P_3V3_VDD_SW_Pin GPIO_PIN_15
|
|
#define EN_P_3V3_VDD_SW_GPIO_Port GPIOE
|
|
|
|
/* GPIOD pins */
|
|
#define STEPPER_CW_P_Pin GPIO_PIN_4
|
|
#define STEPPER_CW_P_GPIO_Port GPIOD
|
|
#define STEPPER_CLK_P_Pin GPIO_PIN_5
|
|
#define STEPPER_CLK_P_GPIO_Port GPIOD
|
|
#define EN_DIS_RFPA_VDD_Pin GPIO_PIN_6
|
|
#define EN_DIS_RFPA_VDD_GPIO_Port GPIOD
|
|
#define EN_DIS_COOLING_Pin GPIO_PIN_7
|
|
#define EN_DIS_COOLING_GPIO_Port GPIOD
|
|
|
|
/* DAC pins */
|
|
#define DAC_1_VG_CLR_Pin GPIO_PIN_4
|
|
#define DAC_1_VG_CLR_GPIO_Port GPIOB
|
|
#define DAC_1_VG_LDAC_Pin GPIO_PIN_5
|
|
#define DAC_1_VG_LDAC_GPIO_Port GPIOB
|
|
#define DAC_2_VG_CLR_Pin GPIO_PIN_8
|
|
#define DAC_2_VG_CLR_GPIO_Port GPIOB
|
|
#define DAC_2_VG_LDAC_Pin GPIO_PIN_9
|
|
#define DAC_2_VG_LDAC_GPIO_Port GPIOB
|
|
|
|
/* IMU interrupt pins */
|
|
#define MAG_DRDY_Pin GPIO_PIN_6
|
|
#define MAG_DRDY_GPIO_Port GPIOC
|
|
#define ACC_INT_Pin GPIO_PIN_7
|
|
#define ACC_INT_GPIO_Port GPIOC
|
|
#define GYR_INT_Pin GPIO_PIN_8
|
|
#define GYR_INT_GPIO_Port GPIOC
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* MAIN_H_SHIM */
|