Jason e93bc33c6c Production fixes 1-7: detection bugs, cfar→threshold rename, digital gain control, Doppler mismatch protection, decimator watchdog, bypass_mode dead code removal, range-mode register (21/21 regression PASS) ...

Fix 1: Combinational magnitude + non-sticky detection flag (tb: 23/23)
Fix 2: Rename all cfar_* signals to detect_*/threshold_* (honest naming)
Fix 3: New rx_gain_control.v between DDC and FFT, opcode 0x16 (tb: 33/33)
Fix 4: Clamp host_chirps_per_elev to DOPPLER_FFT_SIZE, error flag (E2E: 54/54)
Fix 5: Decimator watchdog timeout, 256-cycle limit (tb: 63/63)
Fix 6: Remove bypass_mode dead code from ddc_400m.v (DDC tb: 21/21)
Fix 7: Range-mode register 0x20 with status readback (USB tb: 77/77)

2026-03-20 04:38:35 +02:00

..

fv_cdc_adc.sby

Add SymbiYosys formal verification for 6 modules, fix 2 doppler bugs

2026-03-17 12:47:22 +02:00

fv_cdc_adc.v

Fix CDC reset domain bug (P0), strengthen testbenches with 31 structural assertions

2026-03-17 19:38:09 +02:00

fv_cdc_handshake_cover.sby

Add SymbiYosys formal verification for 6 modules, fix 2 doppler bugs

2026-03-17 12:47:22 +02:00

fv_cdc_handshake.sby

Add SymbiYosys formal verification for 6 modules, fix 2 doppler bugs

2026-03-17 12:47:22 +02:00

fv_cdc_handshake.v

Add SymbiYosys formal verification for 6 modules, fix 2 doppler bugs

2026-03-17 12:47:22 +02:00

fv_cdc_single_bit.sby

Add SymbiYosys formal verification for 6 modules, fix 2 doppler bugs

2026-03-17 12:47:22 +02:00

fv_cdc_single_bit.v

Add SymbiYosys formal verification for 6 modules, fix 2 doppler bugs

2026-03-17 12:47:22 +02:00

fv_doppler_processor.sby

Add SymbiYosys formal verification for 6 modules, fix 2 doppler bugs

2026-03-17 12:47:22 +02:00

fv_doppler_processor.v

Add SymbiYosys formal verification for 6 modules, fix 2 doppler bugs

2026-03-17 12:47:22 +02:00

fv_radar_mode_controller.sby

Add SymbiYosys formal verification for 6 modules, fix 2 doppler bugs

2026-03-17 12:47:22 +02:00

fv_radar_mode_controller.v

Gap 2 GUI Settings: runtime chirp timing, stream control gating, status readback (18/18 FPGA, 20/20 MCU)

2026-03-19 23:54:48 +02:00

fv_range_bin_decimator.sby

Fix range_bin_decimator overflow guard priority bug: group completion now takes precedence over overflow guard in ST_PROCESS, ensuring all OUTPUT_BINS outputs are emitted when sufficient input samples exist. Split formal property 5 into 5a (upper bound) and 5b (exact count when start_bin=0), added Cover 4 for overflow guard path, reduced BMC depth to 50.

2026-03-17 15:41:06 +02:00

fv_range_bin_decimator.v

Production fixes 1-7: detection bugs, cfar→threshold rename, digital gain control, Doppler mismatch protection, decimator watchdog, bypass_mode dead code removal, range-mode register (21/21 regression PASS)

2026-03-20 04:38:35 +02:00