Jason
83 lines
3.3 KiB
HTML
83 lines
3.3 KiB
HTML
<!doctype html>
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<html lang="en">
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<head>
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<meta charset="utf-8">
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<meta name="viewport" content="width=device-width, initial-scale=1">
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<title>AERIS-10 Docs | Implementation Log</title>
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<link rel="stylesheet" href="assets/style.css">
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</head>
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<body>
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<header class="topbar">
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<div class="container nav">
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<a class="brand" href="index.html">AERIS-10 Docs</a>
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<nav>
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<a href="architecture.html">Architecture</a>
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<a href="implementation-log.html">Implementation Log</a>
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<a href="bring-up.html">Bring-Up</a>
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<a href="reports.html">Reports</a>
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<a href="release-notes.html">Release Notes</a>
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</nav>
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</div>
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</header>
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<main class="container page">
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<section class="hero">
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<p class="eyebrow">Engineering Journal</p>
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<h1>Implementation Timeline and Improvements</h1>
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<p>Consolidated record of key firmware, timing, debug and infrastructure changes.</p>
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</section>
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<section class="card" style="margin-top:0.8rem;">
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<h2>Recent milestone timeline</h2>
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<div class="timeline">
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<article>
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<h3>Build 13 frozen as hardware candidate</h3>
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<p class="muted">WNS +0.311 ns, TNS 0.000, WHS +0.060, THS 0.000 on production target.</p>
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</article>
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<article>
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<h3>CDC analysis completed with waivers</h3>
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<p class="muted">5 critical warnings verified as false positives and documented as waivers.</p>
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</article>
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<article>
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<h3>ILA insertion flow hardened</h3>
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<p class="muted">Added net discovery pass, deferred core creation, and Vivado 2025.2 MU_CNT handling.</p>
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</article>
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<article>
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<h3>Bring-up scripts and bitstreams generated</h3>
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<p class="muted">Baseline + debug bitstreams, programming script, and ILA capture script prepared.</p>
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</article>
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<article>
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<h3>Target split for Trenz development path</h3>
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<p class="muted">Added TE0712 and TE0713 separate top wrappers/XDC/build scripts to isolate pinout differences.</p>
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</article>
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</div>
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</section>
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<section class="grid-2" style="margin-top:0.8rem;">
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<article class="card">
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<h2>Codebase quality and verification upgrades</h2>
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<ul>
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<li>Expanded simulation and co-simulation coverage with golden comparison workflows.</li>
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<li>Formal verification executed across critical modules with passing results.</li>
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<li>Improved reset strategy in key blocks to reduce async-reset related methodology warnings.</li>
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<li>Renamed latency buffer module for maintainability and consistent references.</li>
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</ul>
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</article>
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<article class="card">
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<h2>Debug and infrastructure improvements</h2>
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<ul>
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<li>Post-synthesis net-name mapping documented to avoid brittle ILA net paths.</li>
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<li>Generated both no-ILA and ILA debug bitstreams for staged bring-up.</li>
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<li>Added dedicated scripts for TE0712/TE0713 split builds.</li>
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<li>Created community issue to crowdsource compatible hardware test execution.</li>
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</ul>
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</article>
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</section>
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</main>
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<footer class="footer">
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<div class="container"><p>Update this page at each major commit or bring-up gate.</p></div>
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</footer>
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</body>
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</html>
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