Jason 9b786eb33f Add FMC-path FT601 XDC for TE0713+TE0701+UMFT601X-B pin mapping ...

Maps all 47 FT601 signals through FMC LPC J10 to correct FPGA pins:
- DATA[31:0] + D_CLK: Bank 15 (LA17-LA33)
- BE_N[3:0], control, status: Bank 16 (LA00-LA15)
Both banks share VIOTB rail — set to 3.3V for LVCMOS33.
Includes timing constraints and RTL adaptation notes.

2026-03-19 16:20:56 +02:00

..

9_1_Microcontroller

Fix bugs B12-B17 (PA cal loop, ADC buffer, DIAG_SECTION args, htim3 init, stale annotations) with regression tests

2026-03-19 11:04:53 +02:00

9_2_FPGA

Add FMC-path FT601 XDC for TE0713+TE0701+UMFT601X-B pin mapping

2026-03-19 16:20:56 +02:00

9_3_GUI

Added missing classes and functions

2026-03-16 22:25:10 +00:00