Jason
49c9aa28ad
Bug #11: platform_noos_stm32.c used HAL_SPI_Transmit instead of HAL_SPI_TransmitReceive — reads returned garbage. Changed to in-place full-duplex. Dead code (never called), fixed per audit recommendation. Test added: test_bug11_platform_spi_transmit_only.c. Mock infrastructure updated with SPI spy types. All 11 firmware tests pass. FPGA B2: Migrated long_chirp_lut[0:3599] from ~700 lines of hardcoded assignments to BRAM with (* ram_style = "block" *) attribute and $readmemh("long_chirp_lut.mem"). Added sync-only read block for proper BRAM inference. 1-cycle read latency introduced. short_chirp_lut left as distributed RAM (60 entries, too small for BRAM). FPGA B3: Added BREG (window_val_reg) and MREG (mult_i_raw/mult_q_raw) pipeline stages to doppler_processor.v. Eliminates DPIP-1 and DPOP-2 DRC warnings. S_LOAD_FFT retimed: fft_input_valid starts at sub=2, +1 cycle total latency. BREG primed in S_PRE_READ at no extra cost. Both FPGA files compile clean with Icarus Verilog.
353 lines
12 KiB
Verilog
353 lines
12 KiB
Verilog
`timescale 1ns / 1ps
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module plfm_chirp_controller_enhanced (
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input wire clk_120m,
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input wire clk_100m,
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input wire reset_n,
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input wire new_chirp,
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input wire new_elevation,
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input wire new_azimuth,
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input wire mixers_enable,
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output reg [7:0] chirp_data,
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output reg chirp_valid,
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output wire new_chirp_frame,
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output reg chirp_done,
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output reg rf_switch_ctrl,
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output wire rx_mixer_en,
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output wire tx_mixer_en,
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output wire adar_tx_load_1,
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output wire adar_rx_load_1,
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output wire adar_tx_load_2,
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output wire adar_rx_load_2,
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output wire adar_tx_load_3,
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output wire adar_rx_load_3,
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output wire adar_tx_load_4,
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output wire adar_rx_load_4,
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output reg adar_tr_1,
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output reg adar_tr_2,
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output reg adar_tr_3,
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output reg adar_tr_4,
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output reg [5:0] chirp_counter,
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output reg [5:0] elevation_counter,
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output reg [5:0] azimuth_counter
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);
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// Chirp parameters
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parameter F_START = 30000000; // 30 MHz (starting frequency)
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parameter F_END = 10000000; // 10 MHz (ending frequency)
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parameter FS = 120000000; // 120 MHz
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// Timing parameters
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parameter T1_SAMPLES = 3600; // 30us at 120MHz
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parameter T1_RADAR_LISTENING = 16440; //137us at 120MHz
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parameter T2_SAMPLES = 60; // 0.5us at 120MHz
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parameter T2_RADAR_LISTENING = 20940; //174.5us at 120MHz
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parameter GUARD_SAMPLES = 21048; // 175.4us at 120MHz
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// Chirp and beam parameters
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parameter CHIRP_MAX = 32;
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parameter ELEVATION_MAX = 31;
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parameter AZIMUTH_MAX = 50;
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// State parameters
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parameter IDLE = 3'b000;
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parameter LONG_CHIRP = 3'b001;
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parameter LONG_LISTEN = 3'b010;
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parameter GUARD_TIME = 3'b011;
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parameter SHORT_CHIRP = 3'b100;
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parameter SHORT_LISTEN = 3'b101;
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parameter DONE = 3'b110;
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reg [2:0] current_state;
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reg [2:0] next_state;
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// Control registers
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reg [15:0] sample_counter;
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// Edge detection for input signals
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wire chirp__toggling, elevation__toggling, azimuth__toggling;
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// LUTs for chirp waveforms
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(* ram_style = "block" *) reg [7:0] long_chirp_lut [0:3599]; // T1_SAMPLES-1
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reg [7:0] short_chirp_lut [0:59]; // T2_SAMPLES-1
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// Registered BRAM read output (sync-only for BRAM inference)
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reg [7:0] long_chirp_rd_data;
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// Edge detection
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assign chirp__toggling = new_chirp;
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assign elevation__toggling = new_elevation;
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assign azimuth__toggling = new_azimuth;
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assign new_chirp_frame = (current_state == IDLE && next_state == LONG_CHIRP);
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// Mixers Enabling
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assign rx_mixer_en = mixers_enable;
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assign tx_mixer_en = mixers_enable;
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// ADTR1000 pull to ground tx and rx load pins if not used
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assign adar_tx_load_1 = 1'b0;
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assign adar_rx_load_1 = 1'b0;
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assign adar_tx_load_2 = 1'b0;
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assign adar_rx_load_2 = 1'b0;
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assign adar_tx_load_3 = 1'b0;
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assign adar_rx_load_3 = 1'b0;
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assign adar_tx_load_4 = 1'b0;
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assign adar_rx_load_4 = 1'b0;
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// LUT Initialization
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// Long PLFM chirp LUT loaded from .mem file for BRAM inference
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initial begin
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$readmemh("long_chirp_lut.mem", long_chirp_lut);
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end
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// Synchronous-only BRAM read (no async reset) for BRAM inference
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always @(posedge clk_120m) begin
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long_chirp_rd_data <= long_chirp_lut[sample_counter];
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end
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// Short PLFM chirp LUT initialization (too small for BRAM, keep inline)
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initial begin
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// Complete Short PLFM chirp LUT (0.5us, 30MHz to 10MHz)
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short_chirp_lut[ 0] = 8'd255; short_chirp_lut[ 1] = 8'd237; short_chirp_lut[ 2] = 8'd187; short_chirp_lut[ 3] = 8'd118; short_chirp_lut[ 4] = 8'd 49; short_chirp_lut[ 5] = 8'd 6; short_chirp_lut[ 6] = 8'd 7; short_chirp_lut[ 7] = 8'd 54;
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short_chirp_lut[ 8] = 8'd132; short_chirp_lut[ 9] = 8'd210; short_chirp_lut[10] = 8'd253; short_chirp_lut[11] = 8'd237; short_chirp_lut[12] = 8'd167; short_chirp_lut[13] = 8'd 75; short_chirp_lut[14] = 8'd 10; short_chirp_lut[15] = 8'd 10;
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short_chirp_lut[16] = 8'd 80; short_chirp_lut[17] = 8'd180; short_chirp_lut[18] = 8'd248; short_chirp_lut[19] = 8'd237; short_chirp_lut[20] = 8'd150; short_chirp_lut[21] = 8'd 45; short_chirp_lut[22] = 8'd 1; short_chirp_lut[23] = 8'd 54;
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short_chirp_lut[24] = 8'd167; short_chirp_lut[25] = 8'd249; short_chirp_lut[26] = 8'd228; short_chirp_lut[27] = 8'd118; short_chirp_lut[28] = 8'd 15; short_chirp_lut[29] = 8'd 18; short_chirp_lut[30] = 8'd127; short_chirp_lut[31] = 8'd238;
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short_chirp_lut[32] = 8'd235; short_chirp_lut[33] = 8'd118; short_chirp_lut[34] = 8'd 10; short_chirp_lut[35] = 8'd 34; short_chirp_lut[36] = 8'd167; short_chirp_lut[37] = 8'd254; short_chirp_lut[38] = 8'd187; short_chirp_lut[39] = 8'd 45;
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short_chirp_lut[40] = 8'd 8; short_chirp_lut[41] = 8'd129; short_chirp_lut[42] = 8'd248; short_chirp_lut[43] = 8'd201; short_chirp_lut[44] = 8'd 49; short_chirp_lut[45] = 8'd 10; short_chirp_lut[46] = 8'd145; short_chirp_lut[47] = 8'd254;
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short_chirp_lut[48] = 8'd167; short_chirp_lut[49] = 8'd 17; short_chirp_lut[50] = 8'd 46; short_chirp_lut[51] = 8'd210; short_chirp_lut[52] = 8'd235; short_chirp_lut[53] = 8'd 75; short_chirp_lut[54] = 8'd 7; short_chirp_lut[55] = 8'd155;
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short_chirp_lut[56] = 8'd253; short_chirp_lut[57] = 8'd118; short_chirp_lut[58] = 8'd 1; short_chirp_lut[59] = 8'd129;
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end
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// chirp_counter is driven solely by the clk_120m FSM always block (line ~683).
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// Removed redundant clk_100m driver that caused multi-driven register
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// (synthesis failure, simulation race condition).
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// The FSM internally sequences through CHIRP_MAX chirps per beam position,
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// so external new_chirp edge counting is unnecessary here.
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// Elevation counter
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always @(posedge clk_100m or negedge reset_n) begin
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if (!reset_n) begin
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elevation_counter <= 6'b1;
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end else begin
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if (elevation__toggling) begin
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if (elevation_counter == ELEVATION_MAX) begin
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elevation_counter <= 6'b1;
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end else begin
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elevation_counter <= elevation_counter + 6'b1;
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end
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end
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end
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end
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// Azimuth counter
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always @(posedge clk_100m or negedge reset_n) begin
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if (!reset_n) begin
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azimuth_counter <= 6'd1;
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end else begin
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if (azimuth__toggling) begin
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if (azimuth_counter == AZIMUTH_MAX) begin
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azimuth_counter <= 6'd1;
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end else begin
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azimuth_counter <= azimuth_counter + 6'd1;
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end
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end
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end
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end
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// State register
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always @(posedge clk_120m or negedge reset_n) begin
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if (!reset_n) begin
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current_state <= IDLE;
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end else begin
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current_state <= next_state;
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end
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end
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// Next state logic
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always @(*) begin
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case (current_state)
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IDLE: begin
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if (chirp__toggling && mixers_enable)
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next_state = LONG_CHIRP;
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else
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next_state = IDLE;
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end
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LONG_CHIRP: begin
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if (sample_counter == T1_SAMPLES-1)
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next_state = LONG_LISTEN;
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else
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next_state = LONG_CHIRP;
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end
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LONG_LISTEN: begin
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if (sample_counter == T1_RADAR_LISTENING-1) begin
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if (chirp_counter == (CHIRP_MAX/2)-1)
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next_state = GUARD_TIME;
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else
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next_state = LONG_CHIRP;
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end else begin
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next_state = LONG_LISTEN;
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end
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end
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GUARD_TIME: begin
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if (sample_counter == GUARD_SAMPLES-1)
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next_state = SHORT_CHIRP;
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else
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next_state = GUARD_TIME;
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end
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SHORT_CHIRP: begin
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if (sample_counter == T2_SAMPLES-1)
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next_state = SHORT_LISTEN;
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else
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next_state = SHORT_CHIRP;
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end
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SHORT_LISTEN: begin
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if (sample_counter == T2_RADAR_LISTENING-1) begin
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if (chirp_counter == CHIRP_MAX-1)
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next_state = DONE;
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else
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next_state = SHORT_CHIRP;
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end else begin
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next_state = SHORT_LISTEN;
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end
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end
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DONE: begin
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next_state = IDLE;
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end
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default: begin
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next_state = IDLE;
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end
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endcase
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end
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always @(posedge clk_120m or negedge reset_n) begin
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if (!reset_n) begin
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sample_counter <= 0;
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chirp_counter <= 0;
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chirp_valid <= 0;
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chirp_done <= 0;
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chirp_data <= 8'd128;
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rf_switch_ctrl <= 1'b0;
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adar_tr_1 <= 1'b0;
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adar_tr_2 <= 1'b0;
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adar_tr_3 <= 1'b0;
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adar_tr_4 <= 1'b0;
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end else if (mixers_enable) begin
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// Default outputs
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chirp_valid <= 0;
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chirp_done <= 0;
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rf_switch_ctrl <= 0;
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{adar_tr_1, adar_tr_2, adar_tr_3, adar_tr_4} <= 4'b0000;
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// Sample counter increment logic
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if (current_state == LONG_CHIRP || current_state == LONG_LISTEN ||
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current_state == GUARD_TIME || current_state == SHORT_CHIRP ||
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current_state == SHORT_LISTEN) begin
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if (sample_counter == get_max_counter(current_state) - 1) begin
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sample_counter <= 0;
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// Increment chirp counter at end of listen states
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if (current_state == LONG_LISTEN || current_state == SHORT_LISTEN) begin
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chirp_counter <= chirp_counter + 1;
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end
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end else begin
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sample_counter <= sample_counter + 1;
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end
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end else begin
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sample_counter <= 0;
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end
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// State-specific outputs
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case (current_state)
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IDLE: begin
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chirp_data <= 8'd128;
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end
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LONG_CHIRP: begin
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rf_switch_ctrl <= 1'b1;
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{adar_tr_1, adar_tr_2, adar_tr_3, adar_tr_4} <= 4'b1111;
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// CRITICAL FIX: Generate valid signal
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if (sample_counter < T1_SAMPLES) begin
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chirp_data <= long_chirp_rd_data;
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chirp_valid <= 1'b1; // Valid during entire chirp
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end else begin
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chirp_data <= 8'd128;
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end
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end
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LONG_LISTEN: begin
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chirp_data <= 8'd128;
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rf_switch_ctrl <= 1'b0;
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end
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GUARD_TIME: begin
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chirp_data <= 8'd128;
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rf_switch_ctrl <= 1'b0;
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end
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SHORT_CHIRP: begin
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rf_switch_ctrl <= 1'b1;
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{adar_tr_1, adar_tr_2, adar_tr_3, adar_tr_4} <= 4'b1111;
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// CRITICAL FIX: Generate valid signal for short chirp
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if (sample_counter < T2_SAMPLES) begin
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chirp_data <= short_chirp_lut[sample_counter];
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chirp_valid <= 1'b1; // Valid during entire chirp
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end else begin
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chirp_data <= 8'd128;
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end
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end
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SHORT_LISTEN: begin
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chirp_data <= 8'd128;
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rf_switch_ctrl <= 1'b0;
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end
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DONE: begin
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chirp_done <= 1'b1;
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chirp_data <= 8'd128;
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end
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default: begin
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chirp_data <= 8'd128;
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end
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endcase
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end else begin
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// Mixers disabled
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chirp_data <= 8'd128;
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chirp_valid <= 0;
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chirp_done <= 0;
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rf_switch_ctrl <= 0;
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{adar_tr_1, adar_tr_2, adar_tr_3, adar_tr_4} <= 4'b0000;
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sample_counter <= 0;
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end
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end
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// Helper function to get max counter for each state
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function [15:0] get_max_counter;
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input [2:0] state;
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begin
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case (state)
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LONG_CHIRP: get_max_counter = T1_SAMPLES;
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LONG_LISTEN: get_max_counter = T1_RADAR_LISTENING;
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GUARD_TIME: get_max_counter = GUARD_SAMPLES;
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SHORT_CHIRP: get_max_counter = T2_SAMPLES;
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SHORT_LISTEN: get_max_counter = T2_RADAR_LISTENING;
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default: get_max_counter = 0;
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endcase
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end
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endfunction
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endmodule |