666527fa7d
Implements the STM32 outer-loop AGC (ADAR1000_AGC) that reads the FPGA saturation flag on DIG_5/PD13 once per radar frame and adjusts the ADAR1000 VGA common gain across all 16 RX channels. Phase 4 — ADAR1000_AGC class (new files): - ADAR1000_AGC.h/.cpp: attack/recovery/holdoff logic, per-channel calibration offsets, effectiveGain() with OOB safety - test_agc_outer_loop.cpp: 13 tests covering saturation, holdoff, recovery, clamping, calibration, SPI spy, reset, mixed sequences Phase 5 — main.cpp integration: - Added #include and global outerAgc instance - AGC update+applyGain call between runRadarPulseSequence() and HAL_IWDG_Refresh() in main loop Build system & shim fixes: - Makefile: added CXX/CXXFLAGS, C++ object rules, TESTS_WITH_CXX in ALL_TESTS (21 total tests) - stm32_hal_mock.h: const uint8_t* for HAL_UART_Transmit (C++ compat), __NOP() macro for host builds - shims/main.h + real main.h: FPGA_DIG5_SAT pin defines All tests passing: MCU 21/21, GUI 92/92, cross-layer 29/29.