Jason
3b32f67087
Bug #9: Both TX and RX SPI init params had platform_ops = NULL, causing adf4382_init() -> no_os_spi_init() to fail with -EINVAL. Fixed by setting platform_ops = &stm32_spi_ops and passing stm32_spi_extra with correct CS port/pin for each device. Bug #10: stm32_spi_write_and_read() never toggled chip select. Since TX and RX ADF4382A share SPI4, every register write hit both PLLs. Rewrote stm32_spi.c to assert CS LOW before transfer and deassert HIGH after, using stm32_spi_extra metadata. Backward-compatible: legacy callers (e.g., AD9523) with cs_port=NULL skip CS management. Also widened chip_select from uint8_t to uint16_t in no_os_spi.h since STM32 GPIO_PIN_xx values (e.g., GPIO_PIN_14=0x4000) overflow uint8_t. 10/10 tests pass (8 original + 2 new regression tests).
16 lines
374 B
Plaintext
16 lines
374 B
Plaintext
# Build artifacts
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*.o
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*.dSYM/
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# Test binaries (built by Makefile)
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test_bug1_timed_sync_init_ordering
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test_bug2_ad9523_double_setup
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test_bug3_timed_sync_noop
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test_bug4_phase_shift_before_check
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test_bug5_fine_phase_gpio_only
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test_bug6_timer_variable_collision
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test_bug7_gpio_pin_conflict
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test_bug8_uart_commented_out
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test_bug9_platform_ops_null
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test_bug10_spi_cs_not_toggled
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