Jason 7edbd2d3d0 test: add debounce structural invariant test for DIG_6 AGC sync ...

Lock in the four structural invariants of the 2-frame confirmation
debounce: local variable captures DIG_6 read, static prev initialized
to false (matches FPGA boot), outerAgc.enabled gated by now==prev
guard, and prev advances each frame. Prevents a naive refactor from
silently removing the glitch protection.

Credit: joyshmitz review on PR #93.

2026-04-17 00:28:40 +05:45

..

.gitignore

feat: add cross-layer contract tests (Python/Verilog/C) with CI job

2026-04-12 16:04:59 +05:45

contract_parser.py

fix(test): break on unknown signal in count_concat_bits

2026-04-16 12:27:10 +09:00

stm32_settings_stub.cpp

feat: add cross-layer contract tests (Python/Verilog/C) with CI job

2026-04-12 16:04:59 +05:45

tb_cross_layer_ft2232h.v

fix: 9 bugs from code review — RTL sign-ext & snapshot, thread safety, protocol fixes

2026-04-13 23:35:10 +05:45

test_cross_layer_contract.py

test: add debounce structural invariant test for DIG_6 AGC sync

2026-04-17 00:28:40 +05:45