Added BOM and Gerbers

BOM and Gerbers, ready to be sent to PCB manufacturer

4_Schematics and Boards Layout/4_6_Schematics/MainBoard/RADAR_Main_Board.brd

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4_Schematics and Boards Layout/4_7_Production Files/Gerber_Main_Board/RADAR_Main_Board.csv

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+"24";"100nF";"CC0201";"C0201";"C24, C25, C26, C27, C28, C29, C30, C32, C33, C34, C35, C50, C256, C257, C279, C281, C298, C302, C303, C304, C305, C306, C307, C310";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"34";"100pF";"CC0201";"C0201";"C66, C68, C73, C79, C81, C124, C130, C132, C137, C139, C145, C147, C152, C161, C167, C169, C174, C183, C200, C202, C207, C209, C214, C216, C221, C223, C228, C230, C235, C237, C242, C244, C249, C251";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"2";"103pF";"CC0201";"C0201";"C60, C63";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"1";"106pF";"CC0201";"C0201";"C141";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"4";"107.3nH";"LL0201";"L0201";"L22, L25, L26, L27";"INDUCTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"L";"";"";
+"9";"10k";"RR0201";"R0201";"R39, R40, R83, R84, R111, R123, R145, R151, R153";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"16";"10nF";"CC0201";"C0201";"C102, C103, C104, C105, C106, C107, C114, C115, C116, C117, C118, C119, C120, C121, C122, C123";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"2";"10uF";"CC0201";"C0201";"C37, C40";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"12";"10µF";"C-EUC0805";"C0805";"C75, C77, C312, C316, C319, C323, C326, C330, C333, C336, C338, C340";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"88";"";"";"";"";"";"C";"";"";
+"1";"115R";"R-EU_R0201";"R0201";"R14";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"";"";"";"";"R";"";"";
+"2";"12nH";"LL0201";"L0201";"L2, L8";"INDUCTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"L";"";"";
+"2";"12pF";"CC0201";"C0201";"C184, C185";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"37";"142-0731-211";"142-0731-211";"1420731211";"J1, J18, J20, J22, J23, J24, J25, J26, J27, J28, J29, J30, J31, J32, J33, J34, J35, J36, J37, J38, J39, J40, J41, J42, J43, J44, J45, J46, J47, J48, J49, J50, J51, J52, J53, J54, J55";"SMA Connector Jack, Female Socket 50 Ohms Through Hole Solder";"";"";"";"";"SMA Connector Jack, Female Socket 50 Ohms Through Hole Solder";"9.8852mm";"Cinch Connectivity Solutions";"142-0731-211";"";"";"530-142-0731-211";"https://www.mouser.co.uk/ProductDetail/Johnson-Cinch-Connectivity-Solutions/142-0731-211?qs=HFfMDpzxxd0OVzI3hm9tuA%3D%3D";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"2";"159nH";"LL0201";"L0201";"L3, L4";"INDUCTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"L";"";"";
+"2";"18pF";"CC0201";"C0201";"C272, C274";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"1";"1k";"R-EU_R0402";"R0402";"R37";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"";"";"";"";"R";"";"";
+"49";"1k";"RR0201";"R0201";"R41, R43, R55, R56, R57, R58, R59, R61, R82, R85, R86, R87, R88, R93, R94, R99, R100, R101, R102, R107, R108, R109, R118, R124, R125, R126, R127, R128, R129, R130, R131, R133, R134, R135, R136, R137, R138, R139, R140, R144, R147, R148, R149, R167, R168, R169, R170, R171, R172";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"1";"1k2_1%";"RR0201";"R0201";"R60";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"7";"1nF";"C-EUC0402";"C0402";"C314, C318, C321, C325, C328, C332, C335";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"18";"";"";"";"";"";"C";"";"";
+"51";"1pF";"CC0201";"C0201";"C70, C71, C72, C83, C84, C85, C126, C128, C129, C134, C135, C136, C142, C143, C144, C149, C150, C151, C163, C165, C166, C171, C172, C173, C197, C198, C199, C204, C205, C206, C211, C212, C213, C218, C219, C220, C225, C226, C227, C232, C233, C234, C239, C240, C241, C246, C247, C248, C253, C254, C255";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"16";"1uF";"CC0201";"C0201";"C86, C87, C88, C89, C90, C91, C92, C93, C94, C95, C96, C97, C98, C99, C100, C101";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"3";"1µF";"CC0201";"C0201";"C276, C296, C300";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"1";"2.2k";"RR0201";"R0201";"R146";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"3";"2.2uF";"CC0201";"C0201";"C22, C23, C164";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"16";"2.443k";"RR0201";"R0201";"R89, R90, R91, R92, R95, R96, R97, R98, R103, R104, R105, R106, R119, R120, R121, R122";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"1";"2.7pF";"C-EUC0402";"C0402";"C3";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"18";"";"";"";"";"";"C";"";"";
+"2";"2.7pF";"CC0201";"C0201";"C18, C19";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"4";"200R";"RR0201";"R0201";"R16, R17, R20, R21";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"1";"20k";"R-EU_R0402";"R0402";"R38";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"";"";"";"";"R";"";"";
+"40";"22-23-2021";"22-23-2021";"22-23-2021";"X1, X4, X5, X6, X7, X8, X9, X10, X11, X12, X13, X14, X15, X16, X17, X18, X19, X20, X21, X22, X24, X54, X55, X56, X_1, X_2, X_3, X_4, X_5, X_6, X_7, X_8, X_9, X_10, X_11, X_12, X_13, X_14, X_15, X_16";".100" (2.54mm) Center Header - 2 Pin";"";"";"";"";"";"";"";"";"MOLEX";"";"";"";"";"22-23-2021";"1462926";"25C3832";"";"40";"";"";"";"";"";"";"";"";
+"16";"22-23-2031";"22-23-2031";"22-23-2031";"X3, X38, X39, X40, X41, X42, X43, X44, X45, X46, X47, X48, X49, X50, X51, X52";".100" (2.54mm) Center Header - 3 Pin";"";"";"";"";"";"";"";"";"MOLEX";"";"";"";"";"22-23-2031";"1462950";"30C0862";"";"35";"";"";"";"";"";"";"";"";
+"11";"22.1k";"RR0201";"R0201";"R154, R155, R156, R157, R158, R159, R160, R161, R162, R163, R164";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"13";"22R";"RR0201";"R0201";"R23, R24, R25, R26, R27, R28, R29, R30, R49, R51, R62, R63, R64";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"2";"22pF";"CC0201";"C0201";"C308, C309";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"5";"22µF";"C-EUC1206";"C1206";"C283, C311, C315, C322, C329";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"54";"";"";"";"";"";"C";"";"";
+"2";"24R";"R-EU_R0402";"R0402";"R1, R13";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"";"";"";"";"R";"";"";
+"2";"25R";"RR0201";"R0201";"R165, R166";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"4";"25pF";"CC0201";"C0201";"C64, C65, C268, C270";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"1";"3.3uF";"CC0201";"C0201";"C191";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"2";"32.8pF";"CC0201";"C0201";"C59, C127";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"1";"3k2";"RR0201";"R0201";"R33";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"2";"4.3k";"R-EU_R0201";"R0201";"R15, R32";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"";"";"";"";"R";"";"";
+"2";"4.3pF";"CC0201";"C0201";"C20, C21";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"27";"4.7k";"RR0201";"R0201";"R42, R44, R45, R46, R47, R48, R50, R52, R53, R54, R65, R66, R67, R68, R69, R70, R71, R72, R73, R74, R75, R76, R77, R117, R141, R142, R143";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"16";"4.7nF";"CC0201";"C0201";"C261, C263, C265, C267, C269, C271, C273, C275, C280, C282, C284, C286, C288, C290, C292, C294";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"8";"4.7uF";"CC0201";"C0201";"C108, C109, C153, C154, C177, C178, C287, C289";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"2";"4.7uF 35V";"4.7UF-POLAR-EIA3528-35V-10%(TANT)";"EIA3528";"C186, C187";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"CAP-13916";"";"";"";"";"";"4.7uF 35V";
+"1";"47nF";"CC0201";"C0201";"C31";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"4";"47uF";"CC0201";"C0201";"C17, C55, C176, C285";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"4";"500R";"RR0201";"R0201";"R110, R112, R113, R114";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"3";"50R";"RR0201";"R0201";"R31, R115, R116";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"4";"50nH";"LL0201";"L0201";"L9, L10, L24, L28";"INDUCTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"L";"";"";
+"1";"56R";"R-EU_R0201";"R0201";"R22";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"";"";"";"";"R";"";"";
+"3";"5R";"RR0201";"R0201";"R132, R150, R152";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"2";"7.8pF";"CC0201";"C0201";"C61, C62";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
+"1";"830R";"R-EU_R0402";"R0402";"R36";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"";"";"";"";"R";"";"";
+"4";"840R";"RR0201";"R0201";"R78, R79, R80, R81";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
+"2";"AD8352ACPZ-R7";"AD8352ACPZ-R7";"CP_16_3_ADI";"U4, U8";"";"";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"https://www.analog.com/media/en/technical-documentation/data-sheets/ad8352.pdf";"2 GHz Ultralow Distortion Differential RF/IF Amplifier";"";"Analog Devices Inc";"AD8352ACPZ-R7";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"1";"AD9484BCPZ-500";"AD9484BCPZ-500";"CP_56_5_ADI";"U1";"";"";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"https://www.analog.com/media/en/technical-documentation/data-sheets/AD9484.pdf";"8-Bit, 500 MSPS, 1.8 V Analog-to-Digital Converter";"";"Analog Devices Inc";"AD9484BCPZ-500";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"1";"AD9708AR";"AD9708AR";"RW_28_ADI";"U3";"";"";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"AD9708AR";"";"Analog Devices Inc";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"4";"ADAR1000ACCZN";"ADAR1000ACCZN";"CC-88-1_ADI";"ADAR1_, ADAR2_, ADAR3_, ADAR4_";"";"";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"ADAR1000ACCZN";"";"Analog Devices Inc";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"RF";"";
+"3";"ADS7830IPWR";"ADS7830IPWR";"PW16";"U10, U88, U89";"";"";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"https://www.ti.com/lit/gpn/ads7830";"8-Bit, 8-Channel Sampling A/D Converter with I2C Interface 16-TSSOP -40 to 85";"";"Texas Instruments";"ADS7830IPWR";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"16";"ADTR1107ACCZ";"ADTR1107ACCZ";"CC-24-8_ADI";"ADTR1107_1, ADTR1107_2, ADTR1107_3, ADTR1107_4, ADTR1107_5, ADTR1107_6, ADTR1107_7, ADTR1107_8, ADTR1107_9, ADTR1107_10, ADTR1107_11, ADTR1107_12, ADTR1107_13, ADTR1107_14, ADTR1107_15, ADTR1107_16";"";"";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"ADTR1107ACCZ";"";"Analog Devices Inc";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"RF";"";
+"1";"AT93C46A-10SQ-2.7";"AT93C46A-10SQ-2.7";"SOIC8";"IC1";"Three-wire Automotive Temperature Serial EEPROM 1K (64 x 16)";"";"";"";"";"";"";"";"";"";"";"";"";"";"AT93C46DN-SH-B";"1455086";"58M3879";"";"0";"";"";"";"";"";"";"";"";
+"5";"BLM15HB121SN1";"BLM15HB121SN1";"0402";"L5, L6, L7, L19, L20";"EMIFIL (R) Chip Ferrite Bead for GHz Noise";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"";"";"";"";"";"";"";
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+"4";"Blue";"LED-BLUE0603";"LED-0603";"D2, D3, D4, D5";"Blue SMD LED";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"DIO-08575";"";"";"";"";"";"Blue";
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+"2";"DAC5578SRGET";"DAC5578SRGET";"RGE24_2P7X2P7";"U7, U69";"";"";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"https://www.ti.com/lit/gpn/dac5578";"8-bit, Octal Channel, Ultra-Low Glitch, Voltage Output, 2-Wire Interface DAC 24-VQFN -40 to 125";"";"Texas Instruments";"DAC5578SRGET";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"1";"ECS-120-10-36B2-JTN-TR";"CRYSTAL-12MHZ";"CRYSTAL-SMD-2X2.5MM";"Y1";"12.0MHz Crystal";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"XTAL-15540";"";"";"";"";"";"";
+"1";"EP4RKU+";"EP4RKU+";"DG1677-2_MNC";"U16";"";"";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"EP4RKU+";"";"Mini Circuits";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"1";"FT2232HQ";"FT2232HQ";"64QFN_FT2232HQ_FTD";"U6";"";"";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"";"";"";"";"FT2232HQ";"";"FTDI, Future Technology Devices International Ltd";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"16";"INA241A3IDGKRDGK0008A-MFG";"INA241A3IDGKRDGK0008A-MFG";"DGK0008A-MFG";"U11, U73, U74, U75, U76, U77, U78, U79, U80, U81, U82, U83, U84, U85, U86, U87";"";"";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"";"-5-V to 110-V bidirectional ultraprecise current sense amplifier with enhanced PWM rejection 8-VSSOP -40 to 125";"";"Texas Instruments";"INA241A3IDGKR";"";"";"";"";"";"";"";"";"";"";"";"";"RefDes";"";"";"";"TYPE";"";
+"2";"LTC5552IUDBTRMPBF";"LTC5552IUDBTRMPBF";"UDB_12_ADI";"U5, U13";"";"";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"LTC5552IUDB#TRMPBF";"";"Analog Devices Inc";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"17";"M3SWA2-34DR+";"M3SWA2-34DR+";"16_QFN";"RF_SW_1, RF_SW_2, RF_SW_3, RF_SW_4, RF_SW_5, RF_SW_6, RF_SW_7, RF_SW_8, RF_SW_9, RF_SW_10, RF_SW_11, RF_SW_12, RF_SW_13, RF_SW_14, RF_SW_15, RF_SW_16, U$1";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"2";"MINI-USB-32005-201";"MINI-USB-32005-201";"32005-201";"X2, X53";"MINI USB-B Conector";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"unknown";"unknown";"";"5";"";"";"";"";"";"";"";"";
+"1";"MOMENTARY-SWITCH-SPST-SMD-4.6X2.8MM";"MOMENTARY-SWITCH-SPST-SMD-4.6X2.8MM";"TACTILE_SWITCH_SMD_4.6X2.8MM";"S1";"Momentary Switch (Pushbutton) - SPST";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"SWCH-15606";"";"";"";"";"";"";
+"1";"MT25QL01GBBB8E12-0AUT";"MT25QL01GBBB8E12-0AUT";"BGA24_MT25QL_MRN";"U9";"";"";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"MT25QL01GBBB8E12-0AUT";"";"Micron";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
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+"1";"NX3225GD-8MHZ-STD-CRA-3";"NX3225GD-8MHZ-STD-CRA-3";"XTAL_NX3225GD-8MHZ-STD-CRA-3_N";"XTAL1";"";"";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"NX3225GD-8MHZ-STD-CRA-3";"";"NDK";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
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+"1";"STM32F746ZGT7";"STM32F746ZGT7";"LQFP-144_STM";"U2";"";"";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"STM32F746ZGT7";"";"STMicroelectronics";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"34";"SZMMSZ5232BT1G";"SZMMSZ5232BT1G";"SOD-123_ONS";"U14, U15, U17, U37, U38, U39, U40, U41, U43, U44, U45, U46, U47, U48, U49, U50, U51, U52, U53, U54, U55, U56, U57, U58, U59, U60, U61, U62, U63, U64, U65, U66, U67, U68";"";"";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"SZMMSZ5232BT1G";"";"onsemi";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"1";"XC7A50T-2FTG256I";"XC7A50T-2FTG256I";"BGA256C100P16X16_1700X1700X155";"U42";"Artix-7 Field Programmable Gate Array (FPGA) IC 170 2764800 52160 256-LBGA  Check availability";"In Stock";"https://www.snapeda.com/parts/XC7A50T-2FTG256I/Xilinx/view-part/?ref=eda";"";"";"                                                      Artix-7 Field Programmable Gate Array (FPGA) IC 170 2764800 52160 256-LBGA                                              ";"";"";"";"Xilinx Inc.";"";"";"";"XC7A50T-2FTG256I";"";"";"";"LBGA-256 Xilinx Inc.";"";"None";"";"";"https://www.snapeda.com/parts/XC7A50T-2FTG256I/Xilinx/view-part/?ref=snap";"";"";"";"";

4_Schematics and Boards Layout/4_7_Production Files/Gerber_Main_Board/RADAR_Main_Board.dri

@@ -1,8 +1,8 @@
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-Drill Station Info File: C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/MainBoard_Test/RADAR_Main_Board.dri
+Drill Station Info File: C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/MainBoard_Prod_V2/RADAR_Main_Board.dri
 
- Date              : 06/04/2026 22:10
+ Date              : 19/04/2026 23:21
  Drills            : generated
  Device            : Excellon drill station, coordinate format 2.5 inch
 
@@ -27,8 +27,8 @@ Drills used:
 
  Code  Size       used
 
- T01   0.0059inch  1609
+ T01   0.0059inch  1604
- T02   0.0079inch  1892
+ T02   0.0079inch  2243
  T03   0.0100inch    18
  T04   0.0118inch   355
  T05   0.0138inch   113
@@ -43,8 +43,8 @@ Drills used:
  T14   0.0472inch     4
  T15   0.1260inch     8
 
-Total number of drills: 4438
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 Plotfiles:
 
- C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/MainBoard_Test/RADAR_Main_Board.drd
+ C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/MainBoard_Prod_V2/RADAR_Main_Board.drd

4_Schematics and Boards Layout/4_7_Production Files/Gerber_Main_Board/RADAR_Main_Board.gpi

@@ -1,9 +1,9 @@
 Generated by EAGLE CAM Processor 7.4.0
 
-Photoplotter Info File: C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/MainBoard_Test/RADAR_Main_Board.gpi
+Photoplotter Info File: C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/MainBoard_Prod_V2/RADAR_Main_Board.gpi
 
- Date              : 06/04/2026 22:41
+ Date              : 19/04/2026 23:50
- Plotfile          : C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/MainBoard_Test/RADAR_Main_Board.bsk
+ Plotfile          : C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/MainBoard_Prod_V2/RADAR_Main_Board.bsk
  Apertures         : generated: 
  Device            : Gerber RS-274-X photoplotter, coordinate format 2.5 inch
 

4_Schematics and Boards Layout/4_7_Production Files/Gerber_PA/RF_PA.L1

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4_Schematics and Boards Layout/4_7_Production Files/Gerber_PA/RF_PA.L2

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4_Schematics and Boards Layout/4_7_Production Files/Gerber_PA/RF_PA.L3

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4_Schematics and Boards Layout/4_7_Production Files/Gerber_PA/RF_PA.L4

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-X59071Y43126
-X59071Y45291
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 X73835Y50606
 X73835Y52772
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@@ -113,19 +83,62 @@ X71276Y85449
 X69307Y82693
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 X74228Y88402
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 T02
-X76000Y51197
-X79937Y51197
-X83874Y51197
-X87811Y51197
-X91748Y51197
-X95685Y51197
-X95685Y44685
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-X87811Y45276
-X83874Y45276
-X79937Y45276
-X76000Y45276
 X54150Y45079
 X50213Y45079
 X46276Y45079
@@ -138,24 +151,25 @@ X42339Y51000
 X46276Y51000
 X50213Y51000
 X54150Y51000
+X76000Y51197
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 T03
-X50409Y39386
+X78756Y38205
-X49819Y33874
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-X50409Y26787
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-X55724Y29150
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-X80921Y33283
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@@ -317,6 +331,17 @@ X8087Y52969
 X40567Y25016
 X43520Y28756
 X42929Y31709
+X49819Y33874
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+X55724Y29150
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4_Schematics and Boards Layout/4_7_Production Files/Gerber_PA/RF_PA.dri

@@ -2,14 +2,14 @@ Generated by EAGLE CAM Processor 7.4.0
 
 Drill Station Info File: C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/PowerAmplifierBoard/RF_PA.dri
 
- Date              : 05/04/2026 00:08
+ Date              : 19/04/2026 01:42
  Drills            : generated
  Device            : Excellon drill station, coordinate format 2.5 inch
 
 Parameter settings:
 
- Tolerance Drill + :  2.50 %
+ Tolerance Drill + :  0.00 %
- Tolerance Drill - :  2.50 %
+ Tolerance Drill - :  0.00 %
  Rotate            : no
  Mirror            : no
  Optimize          : yes
@@ -27,7 +27,7 @@ Drills used:
 
  Code  Size       used
 
- T01   0.0059inch   103
+ T01   0.0059inch   128
  T02   0.0079inch    24
  T03   0.0138inch   215
  T04   0.0394inch     5
@@ -35,7 +35,7 @@ Drills used:
  T06   0.0520inch     2
  T07   0.1260inch     7
 
-Total number of drills: 364
+Total number of drills: 389
 
 Plotfiles:
 

4_Schematics and Boards Layout/4_7_Production Files/Gerber_PA/RF_PA.gpi

@@ -2,7 +2,7 @@ Generated by EAGLE CAM Processor 7.4.0
 
 Photoplotter Info File: C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/PowerAmplifierBoard/RF_PA.gpi
 
- Date              : 05/04/2026 00:07
+ Date              : 19/04/2026 01:42
  Plotfile          : C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/PowerAmplifierBoard/RF_PA.fab
  Apertures         : generated: 
  Device            : Gerber RS-274-X photoplotter, coordinate format 2.5 inch

4_Schematics and Boards Layout/4_7_Production Files/Gerber_PowerBoard/PowerBoard.bsk

@@ -0,0 +1,10 @@
+G75*
+%MOIN*%
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+%FSLAX25Y25*%
+%IPPOS*%
+%LPD*%
+%AMOC8*
+5,1,8,0,0,1.08239X$1,22.5*
+%
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4_Schematics and Boards Layout/4_7_Production Files/Gerber_PowerBoard/PowerBoard.bsp

@@ -0,0 +1,10 @@
+G75*
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4_Schematics and Boards Layout/4_7_Production Files/Gerber_PowerBoard/PowerBoard.csv

@@ -0,0 +1,29 @@
+"Qty";"Value";"Device";"Package";"Parts";"Description";"COPYRIGHT";"DATASHEET";"DESCRIPTION";"HEIGHT";"MANUFACTURER_NAME";"MANUFACTURER_PART_NUMBER";"MF";"MFR_NAME";"MOUSER_PART_NUMBER";"MOUSER_PRICE-STOCK";"MPN";"OC_FARNELL";"OC_NEWARK";"POPULARITY";"REFDES";"SPICEPREFIX";"TYPE";
+"1";"";"AK300/2";"AK300/2";"X1";"CONNECTOR";"";"";"";"";"";"";"";"";"";"";"";"unknown";"unknown";"16";"";"";"";
+"1";"";"MA10-2";"MA10-2";"SV1";"PIN HEADER";"";"";"";"";"";"";"";"";"";"";"";"unknown";"unknown";"3";"";"";"";
+"21";"0.1µF";"C-EUC0805";"C0805";"C1, C6, C12, C18, C29, C30, C36, C42, C54, C60, C66, C71, C76, C77, C83, C89, C109, C119, C129, C144, C154";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"88";"";"C";"";
+"27";"10k";"R-EU_M0805";"M0805";"R2, R4, R6, R8, R10, R12, R14, R16, R18, R20, R22, R24, R26, R28, R30, R32, R34, R36, R38, R40, R42, R44, R46, R48, R50, R52, R56";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"45";"";"R";"";
+"4";"10nF";"C-EUC0603";"C0603";"C150, C152, C160, C162";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"73";"";"C";"";
+"4";"10µF";"C-EUC0603";"C0603";"C151, C153, C161, C163";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"73";"";"C";"";
+"60";"10µF";"C-EUC0805";"C0805";"C4, C5, C9, C10, C15, C16, C21, C22, C24, C25, C28, C33, C34, C39, C40, C45, C46, C50, C51, C52, C53, C57, C58, C63, C64, C69, C70, C74, C75, C80, C81, C86, C87, C92, C93, C94, C95, C108, C112, C113, C114, C115, C118, C122, C123, C124, C125, C128, C132, C133, C134, C135, C138, C139, C140, C143, C147, C148, C157, C158";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"88";"";"C";"";
+"2";"11.5k";"R-EU_M0805";"M0805";"R54, R58";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"45";"";"R";"";
+"4";"12k";"R-EU_M0805";"M0805";"R9, R35, R43, R47";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"45";"";"R";"";
+"1";"13.7k";"R-EU_M0805";"M0805";"R3";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"45";"";"R";"";
+"12";"1µF";"C-EUC0805";"C0805";"C26, C27, C106, C107, C116, C117, C126, C127, C136, C137, C141, C142";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"88";"";"C";"";
+"2";"2.2µH";"POWER_INDUCTOR";"IND_VLP8040T-1R0N_TDK";"U$1, U$2";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"35";"22-23-2021";"22-23-2021";"22-23-2021";"X2, X3, X4, X5, X6, X7, X8, X9, X10, X11, X12, X13, X14, X15, X16, X17, X18, X19, X20, X21, X22, X23, X24, X25, X26, X27, X28, X29, X30, X31, X32, X33, X34, X35, X36";".100" (2.54mm) Center Header - 2 Pin";"";"";"";"";"";"";"MOLEX";"";"";"";"22-23-2021";"1462926";"25C3832";"40";"";"";"";
+"52";"22µF";"C-EUC0603";"C0603";"C2, C3, C7, C8, C11, C13, C14, C17, C19, C20, C23, C31, C32, C35, C37, C38, C41, C43, C44, C47, C48, C49, C55, C56, C59, C61, C62, C65, C67, C68, C72, C73, C78, C79, C82, C84, C85, C88, C90, C91, C110, C111, C120, C121, C130, C131, C145, C146, C149, C155, C156, C159";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"73";"";"C";"";
+"1";"23.4k";"R-EU_M0805";"M0805";"R49";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"45";"";"R";"";
+"1";"2k";"R-EU_M0805";"M0805";"R39";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"45";"";"R";"";
+"1";"3.09k";"R-EU_M0805";"M0805";"R1";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"45";"";"R";"";
+"19";"3.3µH";"POWER_INDUCTOR";"IND_VLP8040T-1R0N_TDK";"U$3, U$4, U$5, U$6, U$7, U$8, U$9, U$10, U$11, U$12, U$13, U$14, U$15, U$16, U$17, U$18, U$19, U$20, U$21";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
+"6";"32.2k";"R-EU_M0805";"M0805";"R5, R7, R11, R13, R15, R19";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"45";"";"R";"";
+"1";"34.8k";"R-EU_M0805";"M0805";"R21";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"45";"";"R";"";
+"2";"35.7k";"R-EU_M0805";"M0805";"R53, R57";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"45";"";"R";"";
+"11";"56.2k";"R-EU_M0805";"M0805";"R17, R23, R25, R27, R29, R31, R37, R41, R45, R51, R55";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"45";"";"R";"";
+"1";"61.9k";"R-EU_M0805";"M0805";"R33";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"45";"";"R";"";
+"6";"ADM7151ACPZ-04-R7";"ADM7151ACPZ-04-R7";"CP_8_11_ADI";"U5, U23, U25, U27, U29, U30";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"https://www.analog.com/media/en/technical-documentation/data-sheets/ADM7151.pdf";"800 mA Ultralow Noise, High PSRR, RF Linear Regulator";"";"Analog Devices Inc";"ADM7151ACPZ-04-R7";"";"";"";"";"";"";"";"";"";"";"";
+"5";"LM2662MX/NOPB";"LM2662MX/NOPB";"M08A";"U18, U19, U20, U21, U22";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"LM2662MX/NOPB";"";"Texas Instruments";"";"";"";"";"";"";"";"";"LM2662M";
+"10";"T521W476M020ATE045";"T521W476M020ATE045";"T521W";"C96, C97, C98, C99, C100, C101, C102, C103, C104, C105";"T521, Tantalum, Polymer Tantalum, Commercial Grade, 47 uF, 20%, 20 VDC, 105C, -55C, 105C, SMD, Polymer, Molded, Low Profile/ESR, NonCombustible, 2,000 Hrs, 9 % , 45 mOhms, 94 uA, 222.95 mg, 7343, 1.4mm, Height Max = 1.5mm, 1000, 52  Weeks";"";"";"T521, Tantalum, Polymer Tantalum, Commercial Grade, 47 uF, 20%, 20 VDC, 105C, -55C, 105C, SMD, Polymer, Molded, Low Profile/ESR, NonCombustible, 2,000 Hrs, 9 % , 45 mOhms, 94 uA, 222.95 mg, 7343, 1.4mm, Height Max = 1.5mm, 1000, 52  Weeks";"1.5mm";"KEMET";"T521W476M020ATE045";"";"";"80-T521W476M20ATE045";"https://www.mouser.co.uk/ProductDetail/KEMET/T521W476M020ATE045?qs=Ad%252Bh9aq9FyVtchBw1jwoFA%3D%3D";"";"";"";"";"";"";"";
+"21";"TPS562208DDCT";"TPS562208DDCT";"DDC0006A_N";"U1, U2, U3, U4, U6, U7, U8, U9, U10, U11, U12, U13, U14, U15, U16, U17, U24, U26, U28, U31, U33";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"https://www.ti.com/lit/gpn/tps562208";"4.5 V to 17 V input, 2 A output, synchronous step-down converter in FCCM mode 6-SOT-23-THIN -40 to 125";"";"Texas Instruments";"TPS562208DDCT";"";"";"";"";"";"";"";"";"RefDes";"";"TYPE";
+"2";"TPS7A8300RGRR";"TPS7A8300RGRR";"RGR20_2P05X2P05_TEX";"U32, U34";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"https://www.ti.com/lit/gpn/tps7a8300";"2-A, low-VIN, low-2-A, low-VIN, low-noise, ultra-low-dropout voltage regulator with power good wi 20-VQFN -40 to 125";"";"Texas Instruments";"TPS7A8300RGRR";"";"";"";"";"";"";"";"";"";"";"";

4_Schematics and Boards Layout/4_7_Production Files/Gerber_PowerBoard/PowerBoard.dri

@@ -2,7 +2,7 @@ Generated by EAGLE CAM Processor 7.4.0
 
 Drill Station Info File: C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/PowerBoard/PowerBoard.dri
 
- Date              : 04/04/2026 22:46
+ Date              : 19/04/2026 19:18
  Drills            : generated
  Device            : Excellon drill station, coordinate format 2.5 inch
 

4_Schematics and Boards Layout/4_7_Production Files/Gerber_PowerBoard/PowerBoard.gpi

@@ -0,0 +1,36 @@
+Generated by EAGLE CAM Processor 7.4.0
+
+Photoplotter Info File: C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/PowerBoard/PowerBoard.gpi
+
+ Date              : 19/04/2026 19:21
+ Plotfile          : C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/PowerBoard/PowerBoard.bsp
+ Apertures         : generated: 
+ Device            : Gerber RS-274-X photoplotter, coordinate format 2.5 inch
+
+Parameter settings:
+
+ Emulate Apertures : no
+ Tolerance Draw  + :  0.00 %
+ Tolerance Draw  - :  0.00 %
+ Tolerance Flash + :  0.00 %
+ Tolerance Flash - :  0.00 %
+ Rotate            : no
+ Mirror            : no
+ Optimize          : yes
+ Auto fit          : yes
+ OffsetX           : 0inch
+ OffsetY           : 0inch
+
+Plotfile Info:
+
+ Coordinate Format : 2.5
+ Coordinate Units  : Inch
+ Data Mode         : Absolute
+ Zero Suppression  : None
+ End Of Block      : *
+
+Apertures used:
+
+ Code     Shape     Size                  used
+
+

4_Schematics and Boards Layout/4_7_Production Files/Gerber_freq_synth/Clocks_Freq_Synth_board.L1

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 X0213551Y0178118D03*
 X0223000Y0177921D03*
 X0223197Y0167882D03*

4_Schematics and Boards Layout/4_7_Production Files/Gerber_freq_synth/Clocks_Freq_Synth_board.L2

@@ -134,8 +134,10 @@ X0045441Y0113945D03*
 X0023000Y0123906D03*
 X0023000Y0133906D03*
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@@ -182,14 +184,10 @@ X0294063Y0355677D03*
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-X0086386Y0388748D03*
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 D15*
 X0005717Y0400126D02*
 X0005717Y0009654D01*

4_Schematics and Boards Layout/4_7_Production Files/Gerber_freq_synth/Clocks_Freq_Synth_board.L3

@@ -136,8 +136,10 @@ X0045441Y0113945D03*
 X0023000Y0123906D03*
 X0023000Y0133906D03*
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@@ -184,96 +186,48 @@ X0294063Y0355677D03*
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-X0136976Y0228217D03*
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-X0086386Y0388748D03*
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 D15*
-X0179299Y0276740D03*
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-X0179102Y0272016D03*
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-X0183433Y0265323D03*
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-X0186189Y0265323D03*
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-X0186189Y0262567D03*
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-X0183433Y0262567D03*
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-X0174181Y0235795D03*
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4_Schematics and Boards Layout/4_7_Production Files/Gerber_freq_synth/Clocks_Freq_Synth_board.L4

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4_Schematics and Boards Layout/4_7_Production Files/Gerber_freq_synth/Clocks_Freq_Synth_board.L5

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4_Schematics and Boards Layout/4_7_Production Files/Gerber_freq_synth/Clocks_Freq_Synth_board.L6

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4_Schematics and Boards Layout/4_7_Production Files/Gerber_freq_synth/Clocks_Freq_Synth_board.csv

@@ -0,0 +1,41 @@
+"Qty";"Value";"Device";"Package";"Parts";"Description";"COPYRIGHT";"DESCRIPTION";"HEIGHT";"MANUFACTURER_NAME";"MANUFACTURER_PART_NUMBER";"MF";"MFR_NAME";"MOUSER_PART_NUMBER";"MOUSER_PRICE-STOCK";"MPN";"OC_FARNELL";"OC_NEWARK";"POPULARITY";"PROD_ID";"SPICEPREFIX";"VALUE";
+"3";"";"C-EUC0201";"C0201";"C4, C5, C7";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
+"5";"";"L-EUL5650M";"L5650M";"L9, L10, L11, L12, L13";"INDUCTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"L";"";
+"1";"";"PINHD-2X6";"2X06";"JP1";"PIN HEADER";"";"";"";"";"";"";"";"";"";"";"";"";"8";"";"";"";
+"1";"";"PINHD-2X7";"2X07";"JP2";"PIN HEADER";"";"";"";"";"";"";"";"";"";"";"";"";"8";"";"";"";
+"25";"0.1µF";"C-EUC0201";"C0201";"C16, C18, C20, C22, C24, C26, C28, C30, C32, C34, C35, C36, C37, C41, C42, C43, C44, C64, C65, C66, C67, C87, C88, C90, C91";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
+"1";"0.1µf";"C-EUC0201";"C0201";"C92";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
+"2";"0.33µF";"C-EUC0201";"C0201";"C2, C6";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
+"2";"0.47µF";"C-EUC0201";"C0201";"C9, C10";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
+"1";"0.47µf";"C-EUC0201";"C0201";"C3";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
+"3";"0.65k";"R-EU_R0201";"R0201";"R6, R8, R10";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"R";"";
+"9";"0R";"R-EU_R0201";"R0201";"R5, R14, R15, R19, R20, R27, R28, R32, R33";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"R";"";
+"8";"1.3nH";"L-USL0201";"L0201";"L1, L2, L3, L4, L5, L6, L7, L8";"INDUCTOR, American symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"L";"";
+"1";"1000pF";"C-EUC0201";"C0201";"C8";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
+"4";"100R";"R-EU_R0201";"R0201";"R1, R12, R13, R26";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"R";"";
+"2";"10nF";"C-EUC0201";"C0201";"C61, C84";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
+"3";"10nF";"C-EUC0402";"C0402";"C15, C17, C19";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"18";"";"C";"";
+"6";"10pF";"C-EUC0201";"C0201";"C1, C62, C63, C85, C86, C89";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
+"5";"10µF";"C-EUC1210";"C1210";"C23, C27, C31, C45, C47";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
+"11";"142-0731-211";"142-0731-211";"1420731211";"J1, J2, J5, J6, J7, J8, J9, J10, J11, J12, J13";"SMA Connector Jack, Female Socket 50 Ohms Through Hole Solder";"";"SMA Connector Jack, Female Socket 50 Ohms Through Hole Solder";"9.8852mm";"Cinch Connectivity Solutions";"142-0731-211";"";"";"530-142-0731-211";"https://www.mouser.co.uk/ProductDetail/Johnson-Cinch-Connectivity-Solutions/142-0731-211?qs=HFfMDpzxxd0OVzI3hm9tuA%3D%3D";"";"";"";"";"";"";"";
+"6";"1k";"R-EU_R0201";"R0201";"R2, R3, R4, R7, R9, R11";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"R";"";
+"10";"1µF";"C-EUC0201";"C0201";"C11, C12, C13, C14, C59, C68, C69, C70, C71, C82";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
+"8";"200k";"R-EU_R0201";"R0201";"R22, R23, R24, R25, R35, R36, R37, R38";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"R";"";
+"6";"22-23-2021";"22-23-2021";"22-23-2021";"X10, X11, X12, X13, X14, X15";".100" (2.54mm) Center Header - 2 Pin";"";"";"";"";"";"MOLEX";"";"";"";"22-23-2021";"1462926";"25C3832";"40";"";"";"";
+"3";"22R";"R-EU_R0201";"R0201";"R39, R40, R41";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"R";"";
+"6";"22µF";"C-EUC1210";"C1210";"C21, C25, C29, C33, C46, C51";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
+"2";"30R";"R-EU_R0201";"R0201";"R17, R30";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"R";"";
+"2";"31pF";"C-EUC0201";"C0201";"C60, C83";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
+"2";"330R";"R-EU_R0201";"R0201";"R18, R31";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"R";"";
+"20";"4.7µF";"C-EUC0201";"C0201";"C38, C39, C40, C48, C49, C50, C55, C56, C57, C58, C72, C73, C74, C75, C76, C77, C78, C79, C80, C81";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
+"2";"500R";"R-EU_R0201";"R0201";"R21, R34";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"R";"";
+"2";"931R";"R-EU_R0201";"R0201";"R16, R29";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"R";"";
+"1";"AD9523BCPZ";"AD9523BCPZ";"QFN50P1000X1000X100-73N";"IC1";"AD9523BCPZ, PLL Clock Driver Dual, 72-Pin LFCSP VQ";"";"AD9523BCPZ, PLL Clock Driver Dual, 72-Pin LFCSP VQ";"mm";"Analog Devices";"AD9523BCPZ";"";"";"584-AD9523BCPZ";"https://www.mouser.com/Search/Refine.aspx?Keyword=584-AD9523BCPZ";"";"";"";"";"";"";"";
+"2";"ADF4382ABCCZ";"ADF4382ABCCZ";"CC-48-10_ADI";"U1, U6";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"ADF4382ABCCZ";"";"Analog Devices Inc";"";"";"";"";"";"";"";"";"";
+"4";"ATS1005-3DB-FD-T05";"ATS1005-3DB-FD-T05";"SMT_DB-FD-T05_SUS";"U4, U5, U8, U10";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"";"";"Susumu";"ATS1005-3DB-FD-T05";"";"";"";"";"";"";"";"";"";"";"";
+"2";"CJT-T-P-HH-ST-TH1";"CJT-T-P-HH-ST-TH1";"CONN_CJT-T-P-XX-ST-TH1_SAI";"J3, J4";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"";"";"Samtec Inc";"CJT-T-P-HH-ST-TH1";"";"";"";"";"";"";"";"";"";"";"";
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+"1";"ECOC-2522-100.000-3HC";"ECOC-2522-100.000-3HC";"SMD5_ECOC-2522_25P4X22_ECS";"X4";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"";"";"ECS International";"ECOC-2522-100.000-3HC";"";"";"";"";"";"";"";"";"";"";"";
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+"2";"Green";"LED-GREEN-0603-WE";"LED-0603";"D1, D2";"Green SMD LED";"";"";"";"";"";"";"";"";"";"";"";"";"";"DIO-16512";"";"Green";
+"4";"MTX2-143+";"MTX2-143+";"DQ1225_MNC";"U2, U3, U7, U9";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"MTX2-143+";"";"Mini Circuits";"";"";"";"";"";"";"";"";"";

4_Schematics and Boards Layout/4_7_Production Files/Gerber_freq_synth/Clocks_Freq_Synth_board.drd

@@ -798,8 +798,6 @@ X127429Y228217
 X118177Y228118
 X109220Y227921
 X100854Y226740
-X102724Y234713
-X102724Y234713
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 X102823Y255579
 X102528Y264437

4_Schematics and Boards Layout/4_7_Production Files/Gerber_freq_synth/Clocks_Freq_Synth_board.dri

@@ -2,7 +2,7 @@ Generated by EAGLE CAM Processor 7.4.0
 
 Drill Station Info File: C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/FrequencySynthesizerBoard/Clocks_Freq_Synth_board.dri
 
- Date              : 05/04/2026 01:09
+ Date              : 19/04/2026 21:57
  Drills            : generated
  Device            : Excellon drill station, coordinate format 2.5 inch
 
@@ -33,13 +33,13 @@ Drills used:
  T04   0.0197inch    34
  T05   0.0250inch     4
  T06   0.0330inch     8
- T07   0.0394inch    84
+ T07   0.0394inch    82
  T08   0.0400inch    26
  T09   0.0470inch    44
  T10   0.0787inch     1
  T11   0.1260inch     4
 
-Total number of drills: 909
+Total number of drills: 907
 
 Plotfiles:
 

4_Schematics and Boards Layout/4_7_Production Files/Gerber_freq_synth/Clocks_Freq_Synth_board.gpi

@@ -2,7 +2,7 @@ Generated by EAGLE CAM Processor 7.4.0
 
 Photoplotter Info File: C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/FrequencySynthesizerBoard/Clocks_Freq_Synth_board.gpi
 
- Date              : 05/04/2026 01:12
+ Date              : 19/04/2026 21:58
  Plotfile          : C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/FrequencySynthesizerBoard/Clocks_Freq_Synth_board.bsk
  Apertures         : generated: 
  Device            : Gerber RS-274-X photoplotter, coordinate format 2.5 inch

4_Schematics and Boards Layout/4_7_Production Files/Gerber_freq_synth/Clocks_Freq_Synth_board.mnt

@@ -0,0 +1,174 @@
+C1 48.37 59.91  90 10pF C0201
+C2 31.74 13.52   0 0.33ｵF C0201
+C3 49.46 45.72   0 0.47ｵf C0201
+C4 49.48 43.39   0  C0201
+C5 49.52 42.39   0  C0201
+C6 49.52 41.92   0 0.33ｵF C0201
+C7 49.51 40.39   0  C0201
+C8 49.51 39.87   0 1000pF C0201
+C9 48.76 37.89  90 0.47ｵF C0201
+C10 48.63 39.42   0 0.47ｵF C0201
+C11 47.37 50.30 270 1ｵF C0201
+C12 46.81 50.30 270 1ｵF C0201
+C13 45.40 50.35 270 1ｵF C0201
+C14 44.82 50.35 270 1ｵF C0201
+C15 86.78 30.16   0 10nF C0402
+C16 49.07 44.65  90 0.1ｵF C0201
+C17 64.58 24.27 270 10nF C0402
+C18 50.57 34.64 180 0.1ｵF C0201
+C19 52.86 24.27 270 10nF C0402
+C20 55.66 34.54   0 0.1ｵF C0201
+C21 10.00 30.60 270 22ｵF C1210
+C22 58.71 34.53   0 0.1ｵF C0201
+C23 21.00 30.50 270 10ｵF C1210
+C24 62.13 37.42   0 0.1ｵF C0201
+C25 35.40  4.90 270 22ｵF C1210
+C26 61.84 40.65  90 0.1ｵF C0201
+C27 45.90  5.30 270 10ｵF C1210
+C28 62.06 43.41   0 0.1ｵF C0201
+C29 81.20  4.90 270 22ｵF C1210
+C30 57.71 46.83   0 0.1ｵF C0201
+C31 70.50  5.00 270 10ｵF C1210
+C32 54.48 46.90  90 0.1ｵF C0201
+C33 18.10 95.10  90 22ｵF C1210
+C34 49.20 38.86 180 0.1ｵF C0201
+C35 57.21 34.54   0 0.1ｵF C0201
+C36 61.16 34.74   0 0.1ｵF C0201
+C37 62.20 38.96   0 0.1ｵF C0201
+C38 42.23 55.44 180 4.7ｵF C0201
+C39 42.56 52.07 270 4.7ｵF C0201
+C40 46.11 50.52   0 4.7ｵF C0201
+C41 62.26 41.88   0 0.1ｵF C0201
+C42 61.85 45.25  90 0.1ｵF C0201
+C43 56.56 46.73   0 0.1ｵF C0201
+C44 52.33 46.82 180 0.1ｵF C0201
+C45 19.40 85.70 180 10ｵF C1210
+C46 34.30 93.80 270 22ｵF C1210
+C47 30.90 86.70   0 10ｵF C1210
+C48 48.11 50.54   0 4.7ｵF C0201
+C49 48.11 50.06   0 4.7ｵF C0201
+C50 51.64 53.12 270 4.7ｵF C0201
+C51 87.70 87.30  90 22ｵF C1210
+C55 44.21 59.60   0 4.7ｵF C0201
+C56 51.86 59.44 180 4.7ｵF C0201
+C57 51.69 57.60  90 4.7ｵF C0201
+C58 51.62 54.17 270 4.7ｵF C0201
+C59 49.65 49.57  90 1ｵF C0201
+C60 52.95 54.60  90 31pF C0201
+C61 53.66 52.04   0 10nF C0201
+C62 49.86 50.62 270 10pF C0201
+C63 45.84 61.00  90 10pF C0201
+C64 46.57 61.00  90 0.1ｵF C0201
+C65 45.15 61.00  90 0.1ｵF C0201
+C66 49.11 59.94  90 0.1ｵF C0201
+C67 47.66 59.94  90 0.1ｵF C0201
+C68 61.74 50.36 270 1ｵF C0201
+C69 61.19 50.33 270 1ｵF C0201
+C70 59.82 50.03 270 1ｵF C0201
+C71 59.19 50.02 270 1ｵF C0201
+C72 66.00 53.21 270 4.7ｵF C0201
+C73 66.10 54.16 270 4.7ｵF C0201
+C74 66.04 57.61  90 4.7ｵF C0201
+C75 64.72 59.83 180 4.7ｵF C0201
+C76 58.07 59.64   0 4.7ｵF C0201
+C77 56.62 55.38 180 4.7ｵF C0201
+C78 56.92 52.33 180 4.7ｵF C0201
+C79 60.47 50.84   0 4.7ｵF C0201
+C80 62.25 50.66 270 4.7ｵF C0201
+C81 62.70 50.66 270 4.7ｵF C0201
+C82 64.80 49.14 180 1ｵF C0201
+C83 67.62 55.61  90 31pF C0201
+C84 68.70 54.96  90 10nF C0201
+C85 63.74 50.66 270 10pF C0201
+C86 60.20 61.00  90 10pF C0201
+C87 60.94 61.00  90 0.1ｵF C0201
+C88 59.44 61.00  90 0.1ｵF C0201
+C89 62.70 59.91  90 10pF C0201
+C90 63.47 59.91  90 0.1ｵF C0201
+C91 61.97 59.91  90 0.1ｵF C0201
+C92 16.93 67.92 180 0.1ｵf C0201
+D1 41.75 59.88  90 Green LED-0603
+D2 56.83 60.61  90 Green LED-0603
+FB1 68.41 56.87 180 FBMH1608HL601-T BEADC1608X90N
+FB2 53.58 56.01 180 FBMH1608HL601-T BEADC1608X90N
+FB3 52.06 49.65   0 FBMH1608HL601-T BEADC1608X90N
+FB4 63.46 48.33 270 FBMH1608HL601-T BEADC1608X90N
+IC1 55.70 40.67   0 AD9523BCPZ QFN50P1000X1000X100-73N
+J1 52.94 90.00   0 142-0731-211 1420731211
+J2 92.86 49.36  90 142-0731-211 1420731211
+J5 64.56 17.84   0 142-0731-211 1420731211
+J6 52.79 18.27   0 142-0731-211 1420731211
+J7 92.71 30.20  90 142-0731-211 1420731211
+J8 92.71 16.28   0 142-0731-211 1420731211
+J9  9.85 82.37 180 142-0731-211 1420731211
+J10 45.93 74.00   0 142-0731-211 1420731211
+J11 60.20 74.00   0 142-0731-211 1420731211
+J12 74.38 71.98  45 142-0731-211 1420731211
+J13 11.67 67.91  90 142-0731-211 1420731211
+L1 48.80 59.32   0 1.3nH L0201
+L2 46.29 60.40   0 1.3nH L0201
+L3 45.44 60.40   0 1.3nH L0201
+L4 47.95 59.32   0 1.3nH L0201
+L5 60.67 60.40   0 1.3nH L0201
+L6 59.77 60.40   0 1.3nH L0201
+L7 63.17 59.31   0 1.3nH L0201
+L8 62.27 59.31   0 1.3nH L0201
+L9 15.40 31.90 180  L5650M
+L10 40.80  6.20 180  L5650M
+L11 75.80  6.30   0  L5650M
+L12 22.20 91.00  90  L5650M
+L13 29.60 92.70  90  L5650M
+R1 61.47 51.11   0 100R R0201
+R2  7.14 58.81 180 1k R0201
+R3  7.38 59.72 270 1k R0201
+R4 31.78 14.16   0 1k R0201
+R5 48.02 38.16   0 0R R0201
+R6 16.38 13.37 270 0.65k R0201
+R7 16.37 12.32 270 1k R0201
+R8 13.86 21.50  90 0.65k R0201
+R9 13.82 22.69  90 1k R0201
+R10 16.36 21.55  90 0.65k R0201
+R11 16.42 22.70  90 1k R0201
+R12 47.11 51.07   0 100R R0201
+R13 45.11 51.07   0 100R R0201
+R14 51.74 56.17 270 0R R0201
+R15 51.96 55.04   0 0R R0201
+R16 52.78 53.71 180 931R R0201
+R17 52.48 52.85  90 30R R0201
+R18 52.71 52.07   0 330R R0201
+R19 51.62 50.89   0 0R R0201
+R20 50.61 50.88   0 0R R0201
+R21 42.53 57.17 270 500R R0201
+R22 41.78 56.69 270 200k R0201
+R23 41.34 55.73  90 200k R0201
+R24 42.32 54.09 270 200k R0201
+R25 41.39 54.64 270 200k R0201
+R26 59.47 51.16   0 100R R0201
+R27 65.87 56.55   0 0R R0201
+R28 65.90 55.35   0 0R R0201
+R29 66.92 55.36 180 931R R0201
+R30 67.63 54.52  90 30R R0201
+R31 68.47 54.26   0 330R R0201
+R32 65.46 50.90   0 0R R0201
+R33 64.54 50.90   0 0R R0201
+R34 56.82 58.21 270 500R R0201
+R35 56.94 56.71 270 200k R0201
+R36 55.84 56.16 270 200k R0201
+R37 56.84 54.16 270 200k R0201
+R38 56.24 54.61 270 200k R0201
+R39 63.22 41.38   0 22R R0201
+R40 59.45 33.47 270 22R R0201
+R41 57.97 33.47 270 22R R0201
+U1 47.12 55.12 180 ADF4382ABCCZ CC-48-10_ADI
+U2 45.91 65.00 270 MTX2-143+ DQ1225_MNC
+U3 52.91 64.38 270 MTX2-143+ DQ1225_MNC
+U4 45.91 68.00 180 ATS1005-3DB-FD-T05 SMT_DB-FD-T05_SUS
+U5 52.94 68.68 180 ATS1005-3DB-FD-T05 SMT_DB-FD-T05_SUS
+U6 61.48 55.12 180 ADF4382ABCCZ CC-48-10_ADI
+U7 60.21 65.00 270 MTX2-143+ DQ1225_MNC
+U8 60.20 68.00 180 ATS1005-3DB-FD-T05 SMT_DB-FD-T05_SUS
+U9 67.91 65.62 225 MTX2-143+ DQ1225_MNC
+U10 70.09 67.84 135 ATS1005-3DB-FD-T05 SMT_DB-FD-T05_SUS
+X4 23.07 49.95   0 ECOC-2522-100.000-3HC SMD5_ECOC-2522_25P4X22_ECS
+X5 34.12 31.62  90 CVHD-950-50.000 SMD4_CVHD-950_CRX
+X6 33.87 19.97  90 CVHD-950-50.000 SMD4_CVHD-950_CRX

4_Schematics and Boards Layout/4_7_Production Files/Gerber_freq_synth/Clocks_Freq_Synth_board.smb

@@ -159,8 +159,6 @@ X0127429Y0228217D03*
 X0118177Y0228118D03*
 X0109220Y0227921D03*
 X0100854Y0226740D03*
-X0102724Y0234713D03*
-X0102724Y0234713D03*
 X0102724Y0243571D03*
 X0102823Y0255579D03*
 X0102528Y0264437D03*

4_Schematics and Boards Layout/4_7_Production Files/Gerber_freq_synth/Clocks_Freq_Synth_board.smt

@@ -1334,10 +1334,8 @@ X0102528Y0273197D03*
 X0102528Y0264437D03*
 X0102823Y0255579D03*
 X0102724Y0243571D03*
-X0102724Y0234713D03*
-X0102724Y0234713D03*
-X0100854Y0226740D03*
 X0109220Y0227921D03*
+X0100854Y0226740D03*
 X0118177Y0228118D03*
 X0127429Y0228217D03*
 X0136976Y0228217D03*

9_Firmware/9_1_Microcontroller/9_1_1_C_Cpp_Libraries/ADAR1000_AGC.cpp

@@ -18,7 +18,7 @@ ADAR1000_AGC::ADAR1000_AGC()
     , min_gain(0)
     , max_gain(127)
     , holdoff_frames(4)
-    , enabled(true)
+    , enabled(false)
     , holdoff_counter(0)
     , last_saturated(false)
     , saturation_event_count(0)

9_Firmware/9_1_Microcontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp

@@ -20,18 +20,71 @@ static const struct {
     {ADAR_4_CS_3V3_GPIO_Port, ADAR_4_CS_3V3_Pin}  // ADAR1000 #4
 };
 
-// Vector Modulator lookup tables
+// ADAR1000 Vector Modulator lookup tables (128-state phase grid, 2.8125 deg step).
+//
+// Source: Analog Devices ADAR1000 datasheet Rev. B, Tables 13-16, page 34
+//   (7_Components Datasheets and Application notes/ADAR1000.pdf)
+// Cross-checked against the ADI Linux mainline driver (GPL-2.0, NOT vendored):
+//   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/
+//     drivers/iio/beamformer/adar1000.c  (adar1000_phase_values[])
+// The 128 byte values themselves are factual data from the datasheet and are
+// not subject to copyright; only the ADI driver code is GPL.
+//
+// Byte format (per datasheet):
+//   bit  [7:6] reserved (0)
+//   bit  [5]   polarity:  1 = positive lobe (sign(I) or sign(Q) >= 0)
+//                          0 = negative lobe
+//   bits [4:0] 5-bit unsigned magnitude (0..31)
+// At magnitude=0 the polarity bit is physically meaningless; the datasheet
+// uses POL=1 (e.g. VM_Q at 0 deg = 0x20, VM_I at 90 deg = 0x21).
+//
+// Index mapping is uniform: VM_I[k] / VM_Q[k] correspond to phase angle
+// k * 360/128 = k * 2.8125 degrees.  Callers index as VM_*[phase % 128].
 const uint8_t ADAR1000Manager::VM_I[128] = {
-    // ... (same as in your original file)
+    0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3E, 0x3E, 0x3D,  // [  0]   0.0000 deg
+    0x3D, 0x3C, 0x3C, 0x3B, 0x3A, 0x39, 0x38, 0x37,  // [  8]  22.5000 deg
+    0x36, 0x35, 0x34, 0x33, 0x32, 0x30, 0x2F, 0x2E,  // [ 16]  45.0000 deg
+    0x2C, 0x2B, 0x2A, 0x28, 0x27, 0x25, 0x24, 0x22,  // [ 24]  67.5000 deg
+    0x21, 0x01, 0x03, 0x04, 0x06, 0x07, 0x08, 0x0A,  // [ 32]  90.0000 deg
+    0x0B, 0x0D, 0x0E, 0x0F, 0x11, 0x12, 0x13, 0x14,  // [ 40] 112.5000 deg
+    0x16, 0x17, 0x18, 0x19, 0x19, 0x1A, 0x1B, 0x1C,  // [ 48] 135.0000 deg
+    0x1C, 0x1D, 0x1E, 0x1E, 0x1E, 0x1F, 0x1F, 0x1F,  // [ 56] 157.5000 deg
+    0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1E, 0x1E, 0x1D,  // [ 64] 180.0000 deg
+    0x1D, 0x1C, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17,  // [ 72] 202.5000 deg
+    0x16, 0x15, 0x14, 0x13, 0x12, 0x10, 0x0F, 0x0E,  // [ 80] 225.0000 deg
+    0x0C, 0x0B, 0x0A, 0x08, 0x07, 0x05, 0x04, 0x02,  // [ 88] 247.5000 deg
+    0x01, 0x21, 0x23, 0x24, 0x26, 0x27, 0x28, 0x2A,  // [ 96] 270.0000 deg
+    0x2B, 0x2D, 0x2E, 0x2F, 0x31, 0x32, 0x33, 0x34,  // [104] 292.5000 deg
+    0x36, 0x37, 0x38, 0x39, 0x39, 0x3A, 0x3B, 0x3C,  // [112] 315.0000 deg
+    0x3C, 0x3D, 0x3E, 0x3E, 0x3E, 0x3F, 0x3F, 0x3F,  // [120] 337.5000 deg
 };
 
 const uint8_t ADAR1000Manager::VM_Q[128] = {
-    // ... (same as in your original file)
+    0x20, 0x21, 0x23, 0x24, 0x26, 0x27, 0x28, 0x2A,  // [  0]   0.0000 deg
+    0x2B, 0x2D, 0x2E, 0x2F, 0x30, 0x31, 0x33, 0x34,  // [  8]  22.5000 deg
+    0x35, 0x36, 0x37, 0x38, 0x38, 0x39, 0x3A, 0x3A,  // [ 16]  45.0000 deg
+    0x3B, 0x3C, 0x3C, 0x3C, 0x3D, 0x3D, 0x3D, 0x3D,  // [ 24]  67.5000 deg
+    0x3D, 0x3D, 0x3D, 0x3D, 0x3D, 0x3C, 0x3C, 0x3C,  // [ 32]  90.0000 deg
+    0x3B, 0x3A, 0x3A, 0x39, 0x38, 0x38, 0x37, 0x36,  // [ 40] 112.5000 deg
+    0x35, 0x34, 0x33, 0x31, 0x30, 0x2F, 0x2E, 0x2D,  // [ 48] 135.0000 deg
+    0x2B, 0x2A, 0x28, 0x27, 0x26, 0x24, 0x23, 0x21,  // [ 56] 157.5000 deg
+    0x20, 0x01, 0x03, 0x04, 0x06, 0x07, 0x08, 0x0A,  // [ 64] 180.0000 deg
+    0x0B, 0x0D, 0x0E, 0x0F, 0x10, 0x11, 0x13, 0x14,  // [ 72] 202.5000 deg
+    0x15, 0x16, 0x17, 0x18, 0x18, 0x19, 0x1A, 0x1A,  // [ 80] 225.0000 deg
+    0x1B, 0x1C, 0x1C, 0x1C, 0x1D, 0x1D, 0x1D, 0x1D,  // [ 88] 247.5000 deg
+    0x1D, 0x1D, 0x1D, 0x1D, 0x1D, 0x1C, 0x1C, 0x1C,  // [ 96] 270.0000 deg
+    0x1B, 0x1A, 0x1A, 0x19, 0x18, 0x18, 0x17, 0x16,  // [104] 292.5000 deg
+    0x15, 0x14, 0x13, 0x11, 0x10, 0x0F, 0x0E, 0x0D,  // [112] 315.0000 deg
+    0x0B, 0x0A, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01,  // [120] 337.5000 deg
 };
 
-const uint8_t ADAR1000Manager::VM_GAIN[128] = {
+// NOTE: a VM_GAIN[128] table previously existed here as a placeholder but was
-    // ... (same as in your original file)
+// never populated and never read.  The ADAR1000 vector modulator has no
-};
+// separate gain register: phase-state magnitude is encoded directly in
+// bits [4:0] of the VM_I/VM_Q bytes above.  Per-channel VGA gain is a
+// distinct register (CHx_RX_GAIN at 0x10-0x13, CHx_TX_GAIN at 0x1C-0x1F)
+// written with the user-supplied byte directly by adarSetRxVgaGain() /
+// adarSetTxVgaGain().  Do not reintroduce a VM_GAIN[] array.
 
 ADAR1000Manager::ADAR1000Manager() {
     for (int i = 0; i < 4; ++i) {

9_Firmware/9_1_Microcontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.h

@@ -116,10 +116,12 @@ public:
     bool beam_sweeping_active_ = false;
     uint32_t last_beam_update_time_ = 0;
 
-    // Lookup tables
+    // Vector Modulator lookup tables (see ADAR1000_Manager.cpp for provenance).
-    static const uint8_t VM_I[128];
+    // Indexed as VM_*[phase % 128] on a uniform 2.8125 deg grid.
+    // No VM_GAIN[] table exists: VM magnitude is bits [4:0] of the I/Q bytes
+    // themselves; per-channel VGA gain uses a separate register.
+    static const uint8_t VM_I[128];
     static const uint8_t VM_Q[128];
-    static const uint8_t VM_GAIN[128];
 
     // Named defaults for the ADTR1107 and ADAR1000 power sequence.
     static constexpr uint8_t kDefaultTxVgaGain = 0x7F;

9_Firmware/9_1_Microcontroller/9_1_1_C_Cpp_Libraries/adar1000.c

@@ -1,693 +0,0 @@
-/**
- * MIT License
- * 
- * Copyright (c) 2020 Jimmy Pentz
- *
- * Reach me at: github.com/jgpentz, jpentz1(at)gmail.com
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sells
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- * 
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-/* ADAR1000 4-Channel, X Band and Ku Band Beamformer */
-// ----------------------------------------------------------------------------
-// Includes
-// ----------------------------------------------------------------------------
-#include "main.h"
-#include "stm32f7xx_hal.h"
-#include "stm32f7xx_hal_spi.h"
-#include "stm32f7xx_hal_gpio.h"
-#include "adar1000.h"
-
-
-// ----------------------------------------------------------------------------
-// Preprocessor Definitions and Constants
-// ----------------------------------------------------------------------------
-// VM_GAIN is 15 dB of gain in 128 steps. ~0.12 dB per step.
-// A 15 dB attenuator can be applied on top of these values.
-const uint8_t VM_GAIN[128] = {
-	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
-	0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
-	0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
-	0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-	0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
-	0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
-	0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
-	0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
-};
-
-// VM_I and VM_Q are the settings for the vector modulator. 128 steps in 360 degrees. ~2.813 degrees per step.
-const uint8_t VM_I[128] = {
-	0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3E, 0x3E, 0x3D, 0x3D, 0x3C, 0x3C, 0x3B, 0x3A, 0x39, 0x38, 0x37,
-	0x36, 0x35, 0x34, 0x33, 0x32, 0x30, 0x2F, 0x2E, 0x2C, 0x2B, 0x2A, 0x28, 0x27, 0x25, 0x24, 0x22,
-	0x21, 0x01, 0x03, 0x04, 0x06, 0x07, 0x08, 0x0A, 0x0B, 0x0D, 0x0E, 0x0F, 0x11, 0x12, 0x13, 0x14,
-	0x16, 0x17, 0x18, 0x19, 0x19, 0x1A, 0x1B, 0x1C, 0x1C, 0x1D, 0x1E, 0x1E, 0x1E, 0x1F, 0x1F, 0x1F,
-	0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1E, 0x1E, 0x1D, 0x1D, 0x1C, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17,
-	0x16, 0x15, 0x14, 0x13, 0x12, 0x10, 0x0F, 0x0E, 0x0C, 0x0B, 0x0A, 0x08, 0x07, 0x05, 0x04, 0x02,
-	0x01, 0x21, 0x23, 0x24, 0x26, 0x27, 0x28, 0x2A, 0x2B, 0x2D, 0x2E, 0x2F, 0x31, 0x32, 0x33, 0x34,
-	0x36, 0x37, 0x38, 0x39, 0x39, 0x3A, 0x3B, 0x3C, 0x3C, 0x3D, 0x3E, 0x3E, 0x3E, 0x3F, 0x3F, 0x3F,
-};
-
-const uint8_t VM_Q[128] = {
-	0x20, 0x21, 0x23, 0x24, 0x26, 0x27, 0x28, 0x2A, 0x2B, 0x2D, 0x2E, 0x2F, 0x30, 0x31, 0x33, 0x34,
-	0x35, 0x36, 0x37, 0x38, 0x38, 0x39, 0x3A, 0x3A, 0x3B, 0x3C, 0x3C, 0x3C, 0x3D, 0x3D, 0x3D, 0x3D,
-	0x3D, 0x3D, 0x3D, 0x3D, 0x3D, 0x3C, 0x3C, 0x3C, 0x3B, 0x3A, 0x3A, 0x39, 0x38, 0x38, 0x37, 0x36,
-	0x35, 0x34, 0x33, 0x31, 0x30, 0x2F, 0x2E, 0x2D, 0x2B, 0x2A, 0x28, 0x27, 0x26, 0x24, 0x23, 0x21,
-	0x20, 0x01, 0x03, 0x04, 0x06, 0x07, 0x08, 0x0A, 0x0B, 0x0D, 0x0E, 0x0F, 0x10, 0x11, 0x13, 0x14,
-	0x15, 0x16, 0x17, 0x18, 0x18, 0x19, 0x1A, 0x1A, 0x1B, 0x1C, 0x1C, 0x1C, 0x1D, 0x1D, 0x1D, 0x1D,
-	0x1D, 0x1D, 0x1D, 0x1D, 0x1D, 0x1C, 0x1C, 0x1C, 0x1B, 0x1A, 0x1A, 0x19, 0x18, 0x18, 0x17, 0x16,
-	0x15, 0x14, 0x13, 0x11, 0x10, 0x0F, 0x0E, 0x0D, 0x0B, 0x0A, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01,
-};
-
-
-// ----------------------------------------------------------------------------
-// Function Definitions
-// ----------------------------------------------------------------------------
-/**
- * @brief	Initialize the ADC on the ADAR by setting the ADC with a 2 MHz clk, 
- *			and then enable it.
- *
- * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
- *						to use for SPI transfer.
- * @param 	broadcast	Send the message as a broadcast to all ADARs in the SPI chain
- *						if this set to BROADCAST_ON.
- *
- * @warning	This is setup to only read temperature sensor data, not the power detectors.
- */
-void Adar_AdcInit(const AdarDevice * p_adar, uint8_t broadcast)
-{
-	uint8_t data;
-
-	data = ADAR1000_ADC_2MHZ_CLK | ADAR1000_ADC_EN;
-
-	Adar_Write(p_adar, REG_ADC_CONTROL, data, broadcast);
-}
-
-
-/**
- * @brief	Read a byte of data from the ADAR.
- *
- * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
- *						to use for SPI transfer.
- * @param 	broadcast	Send the message as a broadcast to all ADARs in the SPI chain
- *						if this set to BROADCAST_ON.
- *
- * @return	Returns a byte of data that has been converted from the temperature sensor.
- *
- * @warning	This is setup to only read temperature sensor data, not the power detectors.
- */
-uint8_t Adar_AdcRead(const AdarDevice * p_adar, uint8_t broadcast)
-{
-	uint8_t data;
-
-    // Start the ADC conversion
-	Adar_Write(p_adar, REG_ADC_CONTROL, ADAR1000_ADC_ST_CONV, broadcast);
-
-    // This is blocking for now... wait until data is converted, then read it
-	while (!(Adar_Read(p_adar, REG_ADC_CONTROL) & 0x01))
-	{
-	}
-
-	data = Adar_Read(p_adar, REG_ADC_OUT);
-
-	return(data);
-}
-
-
-/**
- * @brief	Requests the device info from a specific ADAR and stores it in the
- *			provided AdarDeviceInfo struct.
- *
- * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
- *						to use for SPI transfer.
- * @param   info[out]	Struct that contains the device info fields.
- *
- * @return	Returns ADAR_ERROR_NOERROR if information was successfully received and stored in the struct.
- */
-uint8_t Adar_GetDeviceInfo(const AdarDevice * p_adar, AdarDeviceInfo * info)
-{
-	*((uint8_t *)info) = Adar_Read(p_adar, 0x002);
-	info->chip_type = Adar_Read(p_adar, 0x003);
-	info->product_id = ((uint16_t)Adar_Read(p_adar, 0x004)) << 8;
-	info->product_id |= ((uint16_t)Adar_Read(p_adar, 0x005)) & 0x00ff;
-	info->scratchpad = Adar_Read(p_adar, 0x00A);
-	info->spi_rev = Adar_Read(p_adar, 0x00B);
-	info->vendor_id = ((uint16_t)Adar_Read(p_adar, 0x00C)) << 8;
-	info->vendor_id |= ((uint16_t)Adar_Read(p_adar, 0x00D)) & 0x00ff;
-	info->rev_id = Adar_Read(p_adar, 0x045);
-
-	return(ADAR_ERROR_NOERROR);
-}
-
-
-/**
- * @brief	Read the data that is stored in a single ADAR register.
- *
- * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
- *						to use for SPI transfer.
- * @param	mem_addr	Memory address of the register you wish to read from.
- *
- * @return	Returns the byte of data that is stored in the desired register.
- *
- * @warning	This function will clear ADDR_ASCN bits.
- * @warning The ADAR does not allow for block reads.
- */
-uint8_t Adar_Read(const AdarDevice * p_adar, uint32_t mem_addr)
-{
-	uint8_t instruction[3];
-
-    // Set SDO active
-	Adar_Write(p_adar, REG_INTERFACE_CONFIG_A, INTERFACE_CONFIG_A_SDO_ACTIVE, 0);
-
-	instruction[0] = 0x80 | ((p_adar->dev_addr & 0x03) << 5);
-	instruction[0] |= ((0xff00 & mem_addr) >> 8);
-	instruction[1] = (0xff & mem_addr);
-	instruction[2] = 0x00;
-
-	p_adar->Transfer(instruction, p_adar->p_rx_buffer, ADAR1000_RD_SIZE);
-
-    // Set SDO Inactive
-	Adar_Write(p_adar, REG_INTERFACE_CONFIG_A, 0, 0);
-
-	return(p_adar->p_rx_buffer[2]);
-}
-
-
-/**
- * @brief	Block memory write to an ADAR device.
- *
- * @pre		ADDR_ASCN bits in register zero must be set!
- *
- * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
- *						to use for SPI transfer.
- * @param	mem_addr  	Memory address of the register you wish to read from.
- * @param	p_data    	Pointer to block of data to transfer (must have two unused bytes preceding the data for instruction).
- * @param	size      	Size of data in bytes, including the two additional leading bytes.
- *
- * @warning First two bytes of data will be corrupted if you do not provide two unused leading bytes!
- */
-void Adar_ReadBlock(const AdarDevice * p_adar, uint16_t mem_addr, uint8_t * p_data, uint32_t size)
-{
-    // Set SDO active
-	Adar_Write(p_adar, REG_INTERFACE_CONFIG_A, INTERFACE_CONFIG_A_SDO_ACTIVE | INTERFACE_CONFIG_A_ADDR_ASCN, 0);
-
-    // Prepare command
-	p_data[0] = 0x80 | ((p_adar->dev_addr & 0x03) << 5);
-	p_data[0] |= ((mem_addr) >> 8) & 0x1F;
-	p_data[1] = (0xFF & mem_addr);
-
-    // Start the transfer
-	p_adar->Transfer(p_data, p_data, size);
-
-	Adar_Write(p_adar, REG_INTERFACE_CONFIG_A, 0, 0);
-    // Return nothing since we assume this is non-blocking and won't wait around
-}
-
-
-/**
- * @brief	Sets the Rx/Tx bias currents for the LNA, VM, and VGA to be in either
- *			low power setting or nominal setting.
- *
- * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
- *						to use for SPI transfer.
- * @param	p_bias[in]	An AdarBiasCurrents struct filled with bias settings
- *						as seen in the datasheet Table 6. SPI Settings for 
- *						Different Power	Modules
- * @param 	broadcast	Send the message as a broadcast to all ADARs in the SPI chain
- *						if this set to BROADCAST_ON.
- *
- * @return	Returns ADAR_ERR_NOERROR if the bias currents were set 
- */
-uint8_t Adar_SetBiasCurrents(const AdarDevice * p_adar, AdarBiasCurrents * p_bias, uint8_t broadcast)
-{
-	uint8_t bias = 0;
-
-    // RX LNA/VGA/VM bias
-	bias = (p_bias->rx_lna & 0x0f);
-	Adar_Write(p_adar, REG_BIAS_CURRENT_RX_LNA, bias, broadcast); // RX LNA bias
-	bias = (p_bias->rx_vga & 0x07 << 3) | (p_bias->rx_vm & 0x07);
-	Adar_Write(p_adar, REG_BIAS_CURRENT_RX, bias, broadcast);     // RX VM/VGA bias
-
-    // TX VGA/VM/DRV bias
-	bias = (p_bias->tx_vga & 0x07 << 3) | (p_bias->tx_vm & 0x07);
-	Adar_Write(p_adar, REG_BIAS_CURRENT_TX, bias, broadcast);     // TX VM/VGA bias
-	bias = (p_bias->tx_drv & 0x07);
-	Adar_Write(p_adar, REG_BIAS_CURRENT_TX_DRV, bias, broadcast); // TX DRV bias
-	
-	return(ADAR_ERROR_NOERROR);
-}
-
-
-/**
- * @brief	Set the bias ON and bias OFF voltages for the four PA's and one LNA.
- *
- * @pre		This will set all 5 bias ON values and all 5 bias OFF values at once.
- * 			To enable these bias values, please see the data sheet and ensure that the BIAS_CTRL,
- * 			LNA_BIAS_OUT_EN, TR_SOURCE, TX_EN, RX_EN, TR (input to chip), and PA_ON (input to chip)
- * 			bits have all been properly set.
- *
- * @param	p_adar[in]		Adar pointer Which specifies the device and what function 
- *							to use for SPI transfer.
- * @param 	bias_on_voltage   Array that contains the bias ON voltages.
- * @param 	bias_off_voltage  Array that contains the bias OFF voltages.
- *
- * @return	Returns ADAR_ERR_NOERROR if the bias currents were set 
- */
-uint8_t Adar_SetBiasVoltages(const AdarDevice * p_adar, uint8_t bias_on_voltage[5], uint8_t bias_off_voltage[5])
-{
-	Adar_SetBit(p_adar, 0x30, 6, BROADCAST_OFF);
-	Adar_SetBit(p_adar, 0x31, 2, BROADCAST_OFF);
-	Adar_SetBit(p_adar, 0x38, 5, BROADCAST_OFF);
-	Adar_Write(p_adar, REG_PA_CH1_BIAS_ON,bias_on_voltage[0], BROADCAST_OFF);
-	Adar_Write(p_adar, REG_PA_CH2_BIAS_ON,bias_on_voltage[1], BROADCAST_OFF);
-	Adar_Write(p_adar, REG_PA_CH3_BIAS_ON,bias_on_voltage[2], BROADCAST_OFF);
-	Adar_Write(p_adar, REG_PA_CH4_BIAS_ON,bias_on_voltage[3], BROADCAST_OFF);
-
-	Adar_Write(p_adar, REG_PA_CH1_BIAS_OFF,bias_off_voltage[0], BROADCAST_OFF);
-	Adar_Write(p_adar, REG_PA_CH2_BIAS_OFF,bias_off_voltage[1], BROADCAST_OFF);
-	Adar_Write(p_adar, REG_PA_CH3_BIAS_OFF,bias_off_voltage[2], BROADCAST_OFF);
-	Adar_Write(p_adar, REG_PA_CH4_BIAS_OFF,bias_off_voltage[3], BROADCAST_OFF);
-
-	Adar_SetBit(p_adar, 0x30, 4, BROADCAST_OFF);
-	Adar_SetBit(p_adar, 0x30, 6, BROADCAST_OFF);
-	Adar_SetBit(p_adar, 0x31, 2, BROADCAST_OFF);
-	Adar_SetBit(p_adar, 0x38, 5, BROADCAST_OFF);
-	Adar_Write(p_adar, REG_LNA_BIAS_ON,bias_on_voltage[4], BROADCAST_OFF);
-	Adar_Write(p_adar, REG_LNA_BIAS_OFF,bias_off_voltage[4], BROADCAST_OFF);
-
-	Adar_ResetBit(p_adar, 0x30, 7, BROADCAST_OFF);
-	Adar_SetBit(p_adar, 0x31, 2, BROADCAST_OFF);
-	Adar_SetBit(p_adar, 0x31, 4, BROADCAST_OFF);
-	Adar_SetBit(p_adar, 0x31, 7, BROADCAST_OFF);
-	
-	return(ADAR_ERROR_NOERROR);
-}
-
-
-/**
- * @brief	Setup the ADAR to use settings that are transferred over SPI.
- *
- * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
- *						to use for SPI transfer.
- * @param 	broadcast	Send the message as a broadcast to all ADARs in the SPI chain
- *						if this set to BROADCAST_ON.
- *
- * @return	Returns ADAR_ERR_NOERROR if the bias currents were set 
- */
-uint8_t Adar_SetRamBypass(const AdarDevice * p_adar, uint8_t broadcast)
-{
-	uint8_t data;
-
-	data = (MEM_CTRL_BIAS_RAM_BYPASS | MEM_CTRL_BEAM_RAM_BYPASS);
-
-	Adar_Write(p_adar, REG_MEM_CTL, data, broadcast);
-
-	return(ADAR_ERROR_NOERROR);
-}
-
-
-/**
- * @brief	Set the VGA gain value of a Receive channel in dB.
- *
- * @param	p_adar[in]		Adar pointer Which specifies the device and what function 
- *							to use for SPI transfer.
- * @param 	channel			Channel in which to set the gain (1-4).
- * @param 	vga_gain_db		Gain to be applied to the channel, ranging from 0 - 30 dB. 
- *							(Intended operation >16 dB).
- * @param 	broadcast	Send the message as a broadcast to all ADARs in the SPI chain
- *						if this set to BROADCAST_ON.
- *
- * @return 	Returns ADAR_ERROR_NOERROR if the gain was successfully set. 
- * 					ADAR_ERROR_FAILED if an invalid channel was selected.
- *
- * @warning 0 dB or 15 dB step attenuator may also be turned on, which is why intended operation is >16 dB.
- */
-uint8_t Adar_SetRxVgaGain(const AdarDevice * p_adar, uint8_t channel, uint8_t vga_gain_db, uint8_t broadcast)
-{
-	uint8_t	 vga_gain_bits = (uint8_t)(255*vga_gain_db/16);
-	uint32_t mem_addr = 0;
-
-	if((channel == 0) || (channel > 4))
-	{
-		return(ADAR_ERROR_FAILED);
-	}
-
-	mem_addr = REG_CH1_RX_GAIN + (channel & 0x03);
-
-    // Set gain
-	Adar_Write(p_adar, mem_addr, vga_gain_bits, broadcast);
-
-    // Load the new setting
-	Adar_Write(p_adar, REG_LOAD_WORKING, 0x1, broadcast);
-
-	return(ADAR_ERROR_NOERROR);
-}
-
-
-/**
- * @brief	Set the phase of a given receive channel using the I/Q vector modulator.
- *
- * @pre		According to the given @param phase, this sets the polarity (bit 5) and gain (bits 4-0)
- * 			of the @param channel, and then loads them into the working register.
- * 			A vector modulator I/Q look-up table has been provided at the beginning of this library.
- *
- * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
- *						to use for SPI transfer.
- * @param	channel   	Channel in which to set the gain (1-4).
- * @param	phase     	Byte that is used to set the polarity (bit 5) and gain (bits 4-0).
- * @param 	broadcast	Send the message as a broadcast to all ADARs in the SPI chain
- *						if this set to BROADCAST_ON.
- *
- * @return 	Returns ADAR_ERROR_NOERROR if the phase was successfully set. 
- * 					ADAR_ERROR_FAILED if an invalid channel was selected.
- *
- * @note    To obtain your phase:
- *          phase = degrees * 128;
- *          phase /= 360;
- */
-uint8_t Adar_SetRxPhase(const AdarDevice * p_adar, uint8_t channel, uint8_t phase, uint8_t broadcast)
-{
-	uint8_t	 i_val = 0;
-	uint8_t	 q_val = 0;
-	uint32_t mem_addr_i, mem_addr_q;
-
-	if((channel == 0) || (channel > 4))
-	{
-		return(ADAR_ERROR_FAILED);
-	}
-
-	//phase = phase % 128;
-	i_val = VM_I[phase];
-	q_val = VM_Q[phase];
-
-	mem_addr_i = REG_CH1_RX_PHS_I + (channel & 0x03) * 2;
-	mem_addr_q = REG_CH1_RX_PHS_Q + (channel & 0x03) * 2;
-
-	Adar_Write(p_adar, mem_addr_i, i_val, broadcast);
-	Adar_Write(p_adar, mem_addr_q, q_val, broadcast);
-	Adar_Write(p_adar, REG_LOAD_WORKING, 0x1, broadcast);
-
-	return(ADAR_ERROR_NOERROR);
-}
-
-
-/**
- * @brief	Set the VGA gain value of a Tx channel in dB.
- *
- * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
- *						to use for SPI transfer.
- * @param 	broadcast	Send the message as a broadcast to all ADARs in the SPI chain
- *						if this set to BROADCAST_ON.
- *
- * @return 	Returns ADAR_ERROR_NOERROR if the bias was successfully set. 
- * 					ADAR_ERROR_FAILED if an invalid channel was selected.
- *
- * @warning 0 dB or 15 dB step attenuator may also be turned on, which is why intended operation is >16 dB.
- */
-uint8_t Adar_SetTxBias(const AdarDevice * p_adar, uint8_t broadcast)
-{
-	uint8_t	 vga_bias_bits;
-	uint8_t	 drv_bias_bits;
-	uint32_t mem_vga_bias;
-	uint32_t mem_drv_bias;
-
-	mem_vga_bias = REG_BIAS_CURRENT_TX;
-	mem_drv_bias = REG_BIAS_CURRENT_TX_DRV;
-
-    // Set bias to nom
-	vga_bias_bits = 0x2D;
-	drv_bias_bits = 0x06;
-
-    // Set bias
-	Adar_Write(p_adar, mem_vga_bias, vga_bias_bits, broadcast);
-    // Set bias
-	Adar_Write(p_adar, mem_drv_bias, drv_bias_bits, broadcast);
-
-    // Load the new setting
-	Adar_Write(p_adar, REG_LOAD_WORKING, 0x2, broadcast);
-
-	return(ADAR_ERROR_NOERROR);
-}
-
-
-/**
- * @brief	Set the VGA gain value of a Tx channel.
- *
- * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
- *						to use for SPI transfer.
- * @param 	channel     Tx channel in which to set the gain, ranging from 1 - 4.
- * @param 	gain   		Gain to be applied to the channel, ranging from 0 - 127,
- *						plus the MSb 15dB attenuator (Intended operation >16 dB).
- * @param 	broadcast	Send the message as a broadcast to all ADARs in the SPI chain
- *						if this set to BROADCAST_ON.
- *
- * @return 	Returns ADAR_ERROR_NOERROR if the gain was successfully set. 
- * 					ADAR_ERROR_FAILED if an invalid channel was selected.
- *
- * @warning 0 dB or 15 dB step attenuator may also be turned on, which is why intended operation is >16 dB.
- */
-uint8_t Adar_SetTxVgaGain(const AdarDevice * p_adar, uint8_t channel, uint8_t gain, uint8_t broadcast)
-{
-	uint32_t mem_addr;
-	
-	if((channel == 0) || (channel > 4))
-	{
-		return(ADAR_ERROR_FAILED);
-	}
-
-	mem_addr = REG_CH1_TX_GAIN + (channel & 0x03);
-
-    // Set gain
-	Adar_Write(p_adar, mem_addr, gain, broadcast);
-
-    // Load the new setting
-	Adar_Write(p_adar, REG_LOAD_WORKING, LD_WRK_REGS_LDTX_OVERRIDE, broadcast);
-
-	return(ADAR_ERROR_NOERROR);
-}
-
-
-/**
- * @brief 	Set the phase of a given transmit channel using the I/Q vector modulator.
- *
- * @pre		According to the given @param phase, this sets the polarity (bit 5) and gain (bits 4-0)
- * 			of the @param channel, and then loads them into the working register.
- * 			A vector modulator I/Q look-up table has been provided at the beginning of this library.
- *
- * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
- *						to use for SPI transfer.
- * @param 	channel   	Channel in which to set the gain (1-4).
- * @param 	phase     	Byte that is used to set the polarity (bit 5) and gain (bits 4-0).
- * @param 	broadcast	Send the message as a broadcast to all ADARs in the SPI chain
- *						if this set to BROADCAST_ON.
- *
- * @return 	Returns ADAR_ERROR_NOERROR if the phase was successfully set. 
- * 					ADAR_ERROR_FAILED if an invalid channel was selected.
- *
- * @note    To obtain your phase:
- *          phase = degrees * 128;
- *          phase /= 360;
- */
-uint8_t Adar_SetTxPhase(const AdarDevice * p_adar, uint8_t channel, uint8_t phase, uint8_t broadcast)
-{
-	uint8_t	 i_val = 0;
-	uint8_t	 q_val = 0;
-	uint32_t mem_addr_i, mem_addr_q;
-
-	if((channel == 0) || (channel > 4))
-	{
-		return(ADAR_ERROR_FAILED);
-	}
-
-	//phase = phase % 128;
-	i_val = VM_I[phase];
-	q_val = VM_Q[phase];
-
-	mem_addr_i = REG_CH1_TX_PHS_I + (channel & 0x03) * 2;
-	mem_addr_q = REG_CH1_TX_PHS_Q + (channel & 0x03) * 2;
-
-	Adar_Write(p_adar, mem_addr_i, i_val, broadcast);
-	Adar_Write(p_adar, mem_addr_q, q_val, broadcast);
-	Adar_Write(p_adar, REG_LOAD_WORKING, 0x1, broadcast);
-
-	return(ADAR_ERROR_NOERROR);
-}
-
-
-/**
- * @brief 	Reset the whole ADAR device.
- *
- * @param	p_adar[in]	ADAR pointer Which specifies the device and what function 
- *						to use for SPI transfer.
- */
-void Adar_SoftReset(const AdarDevice * p_adar)
-{
-	uint8_t instruction[3];
-
-	instruction[0] = ((p_adar->dev_addr & 0x03) << 5);
-	instruction[1] = 0x00;
-	instruction[2] = 0x81;
-
-	p_adar->Transfer(instruction, NULL, sizeof(instruction));
-}
-
-
-/**
- * @brief 	Reset ALL ADAR devices in the SPI chain.
- *
- * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
- *						to use for SPI transfer.
- */
-void Adar_SoftResetAll(const AdarDevice * p_adar)
-{
-	uint8_t instruction[3];
-
-	instruction[0] = 0x08;
-	instruction[1] = 0x00;
-	instruction[2] = 0x81;
-
-	p_adar->Transfer(instruction, NULL, sizeof(instruction));
-}
-
-
-/**
- * @brief 	Write a byte of @param data to the register located at @param mem_addr.
- *
- * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
- *						to use for SPI transfer.
- * @param 	mem_addr  	Memory address of the register you wish to read from.
- * @param 	data      	Byte of data to be stored in the register.
- * @param 	broadcast	Send the message as a broadcast to all ADARs in the SPI chain
- 						if this set to BROADCAST_ON.
- *
- * @warning If writing the same data to multiple registers, use ADAR_WriteBlock.
- */
-void Adar_Write(const AdarDevice * p_adar, uint32_t mem_addr, uint8_t data, uint8_t broadcast)
-{
-	uint8_t instruction[3];
-	
-	if (broadcast)
-	{
-		instruction[0] = 0x08;
-	}
-	else
-	{
-		instruction[0] = ((p_adar->dev_addr & 0x03) << 5);
-	}
-
-	instruction[0] |= (0x1F00 & mem_addr) >> 8;
-	instruction[1] = (0xFF & mem_addr);
-	instruction[2] = data;
-
-	p_adar->Transfer(instruction, NULL, sizeof(instruction));
-}
-
-
-/**
- * @brief 	Block memory write to an ADAR device.
- *
- * @pre 	ADDR_ASCN BITS IN REGISTER ZERO MUST BE SET!
- *
- * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
- *						to use for SPI transfer.
- * @param	mem_addr 	Memory address of the register you wish to read from.
- * @param	p_data[in]  Pointer to block of data to transfer (must have two unused bytes 
- 						preceding the data for instruction).
- * @param	size      	Size of data in bytes, including the two additional leading bytes.
- *
- * @warning First two bytes of data will be corrupted if you do not provide two unused leading bytes!
- */
-void Adar_WriteBlock(const AdarDevice * p_adar, uint16_t mem_addr, uint8_t * p_data, uint32_t size)
-{
-    // Prepare command
-	p_data[0] = ((p_adar->dev_addr & 0x03) << 5);
-	p_data[0] |= ((mem_addr) >> 8) & 0x1F;
-	p_data[1] = (0xFF & mem_addr);
-
-    // Start the transfer
-	p_adar->Transfer(p_data, NULL, size);
-
-    // Return nothing since we assume this is non-blocking and won't wait around
-}
-
-
-/**
- * @brief	Set contents of the INTERFACE_CONFIG_A register.
- *
- * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
- *						to use for SPI transfer.
- * @param 	flags     	#INTERFACE_CONFIG_A_SOFTRESET, #INTERFACE_CONFIG_A_LSB_FIRST,
- *                  	#INTERFACE_CONFIG_A_ADDR_ASCN, #INTERFACE_CONFIG_A_SDO_ACTIVE
- * @param 	broadcast	Send the message as a broadcast to all ADARs in the SPI chain
- *						if this set to BROADCAST_ON.
- */
-void Adar_WriteConfigA(const AdarDevice * p_adar, uint8_t flags, uint8_t broadcast)
-{
-	Adar_Write(p_adar, 0x00, flags, broadcast);
-}
-
-
-/**
- * @brief 	Write a byte of @param data to the register located at @param mem_addr and
- *			then read from the device and verify that the register was correctly set.
- *
- * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
- *						to use for SPI transfer.
- * @param 	mem_addr  	Memory address of the register you wish to read from.
- * @param 	data      	Byte of data to be stored in the register.
- *
- * @return	Returns the number of attempts that it took to successfully write to a register,
- *			starting from zero.
- * @warning This function currently only supports writes to a single regiter in a single ADAR.
- */
-uint8_t Adar_WriteVerify(const AdarDevice * p_adar, uint32_t mem_addr, uint8_t data)
-{
-	uint8_t rx_data;
-
-	for (uint8_t ii = 0; ii < 3; ii++)
-	{
-		Adar_Write(p_adar, mem_addr, data, 0);
-
-		// Can't read back from an ADAR with HW address 0
-		if (!((p_adar->dev_addr) % 4))
-		{
-			return(ADAR_ERROR_INVALIDADDR);
-		}
-		rx_data = Adar_Read(p_adar, mem_addr);
-		if (rx_data == data)
-		{
-			return(ii);
-		}
-	}
-
-	return(ADAR_ERROR_FAILED);
-}
-
-void Adar_SetBit(const AdarDevice * p_adar, uint32_t mem_addr, uint8_t bit, uint8_t broadcast)
-	{
-		uint8_t temp = Adar_Read(p_adar, mem_addr);
-		uint8_t data = temp|(1<<bit);
-		Adar_Write(p_adar,mem_addr, data,broadcast);
-	}
-
-void Adar_ResetBit(const AdarDevice * p_adar, uint32_t mem_addr, uint8_t bit, uint8_t broadcast)
-	{
-		uint8_t temp = Adar_Read(p_adar, mem_addr);
-		uint8_t data = temp&~(1<<bit);
-		Adar_Write(p_adar,mem_addr, data,broadcast);
-	}
-

9_Firmware/9_1_Microcontroller/9_1_1_C_Cpp_Libraries/adar1000.h

@@ -1,294 +0,0 @@
-/**
- * MIT License
- * 
- * Copyright (c) 2020 Jimmy Pentz
- *
- * Reach me at: github.com/jgpentz, jpentz1( at )gmail.com
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sells
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- * 
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-/* ADAR1000 4-Channel, X Band and Ku Band Beamformer */
-#ifndef LIB_ADAR1000_H_
-#define LIB_ADAR1000_H_
-
-#ifndef NULL
-#define NULL    (0)
-#endif
-
-// ----------------------------------------------------------------------------
-// Includes
-// ----------------------------------------------------------------------------
-#include "main.h"
-#include "stm32f7xx_hal.h"
-#include "stm32f7xx_hal_spi.h"
-#include "stm32f7xx_hal_gpio.h"
-#include <stdbool.h>
-#include <stdint.h>
-#include <string.h>
-
-#ifdef __cplusplus
-extern "C" {  // Prevent C++ name mangling
-#endif
-
-
-
-
-// ----------------------------------------------------------------------------
-// Datatypes
-// ----------------------------------------------------------------------------
-extern SPI_HandleTypeDef hspi1;
-extern const uint8_t VM_GAIN[128];
-extern const uint8_t VM_I[128];
-extern const uint8_t VM_Q[128];
-
-/// A function pointer prototype for a SPI transfer, the 3 parameters would be
-/// p_txData, p_rxData, and size (number of bytes to transfer), respectively.
-typedef uint32_t (*Adar_SpiTransfer)( uint8_t *, uint8_t *, uint32_t);
-
-typedef struct
- {
- 	uint8_t			 dev_addr; 		///< 2-bit device hardware address, 0x00, 0x01, 0x10, 0x11
- 	Adar_SpiTransfer Transfer;		///< Function pointer to the function used for SPI transfers
- 	uint8_t *		 p_rx_buffer;	///< Data buffer to store received bytes into
- }const AdarDevice;
-
-
-/// Use this to store bias current values into, as seen in the datasheet 
-/// Table 6. SPI Settings for Different Power Modules
-typedef struct
-{
-	uint8_t rx_lna;		///< nominal:  8, low power: 5
-	uint8_t rx_vm;		///< nominal:  5, low power: 2
-	uint8_t rx_vga;		///< nominal: 10, low power: 3
-	uint8_t tx_vm;		///< nominal:  5, low power: 2
-	uint8_t tx_vga;		///< nominal:  5, low power: 5
-	uint8_t tx_drv;		///< nominal:  6, low power: 3
-} AdarBiasCurrents;
-
-/// Useful for queries regarding the device info
-typedef struct
-{
-	uint8_t	 norm_operating_mode : 2;
-	uint8_t	 cust_operating_mode : 2;
-	uint8_t	 dev_status : 4;
-	uint8_t	 chip_type;
-	uint16_t product_id;
-	uint8_t	 scratchpad;
-	uint8_t	 spi_rev;
-	uint16_t vendor_id;
-	uint8_t	 rev_id;
-} AdarDeviceInfo;
-
-/// Return types for functions in this library
-typedef enum {
-	ADAR_ERROR_NOERROR		= 0,
-	ADAR_ERROR_FAILED		= 1,
-	ADAR_ERROR_INVALIDADDR	= 2,
-} AdarErrorCodes;
-
-
-// ----------------------------------------------------------------------------
-// Function Prototypes
-// ----------------------------------------------------------------------------
-void Adar_AdcInit(const AdarDevice * p_adar, uint8_t broadcast_bit);
-
-uint8_t Adar_AdcRead(const AdarDevice * p_adar, uint8_t broadcast_bit);
-
-uint8_t Adar_GetDeviceInfo(const AdarDevice * p_adar, AdarDeviceInfo * info);
-
-uint8_t Adar_Read(const AdarDevice * p_adar, uint32_t mem_addr);
-
-void Adar_ReadBlock(const AdarDevice * p_adar, uint16_t mem_addr, uint8_t * p_data, uint32_t size);
-
-uint8_t Adar_SetBiasCurrents(const AdarDevice * p_adar, AdarBiasCurrents * p_bias, uint8_t broadcast_bit);
-
-uint8_t Adar_SetBiasVoltages(const AdarDevice * p_adar, uint8_t bias_on_voltage[5], uint8_t bias_off_voltage[5]);
-
-uint8_t Adar_SetRamBypass(const AdarDevice * p_adar, uint8_t broadcast_bit);
-
-uint8_t Adar_SetRxVgaGain(const AdarDevice * p_adar, uint8_t channel, uint8_t vga_gain_db, uint8_t broadcast_bit);
-
-uint8_t Adar_SetRxPhase(const AdarDevice * p_adar, uint8_t channel, uint8_t phase, uint8_t broadcast_bit);
-
-uint8_t Adar_SetTxBias(const AdarDevice * p_adar, uint8_t broadcast_bit);
-
-uint8_t Adar_SetTxVgaGain(const AdarDevice * p_adar, uint8_t channel, uint8_t vga_gain_db, uint8_t broadcast_bit);
-
-uint8_t Adar_SetTxPhase(const AdarDevice * p_adar, uint8_t channel, uint8_t phase, uint8_t broadcast_bit);
-
-void Adar_SoftReset(const AdarDevice * p_adar);
-
-void Adar_SoftResetAll(const AdarDevice * p_adar);
-
-void Adar_Write(const AdarDevice * p_adar, uint32_t mem_addr, uint8_t data, uint8_t broadcast_bit);
-
-void Adar_WriteBlock(const AdarDevice * p_adar, uint16_t mem_addr, uint8_t * p_data, uint32_t size);
-
-void Adar_WriteConfigA(const AdarDevice * p_adar, uint8_t flags, uint8_t broadcast);
-
-uint8_t Adar_WriteVerify(const AdarDevice * p_adar, uint32_t mem_addr, uint8_t data);
-
-void Adar_SetBit(const AdarDevice * p_adar, uint32_t mem_addr, uint8_t bit, uint8_t broadcast);
-
-void Adar_ResetBit(const AdarDevice * p_adar, uint32_t mem_addr, uint8_t bit, uint8_t broadcast);
-
-
-// ----------------------------------------------------------------------------
-// Preprocessor Definitions and Constants
-// ----------------------------------------------------------------------------
-// Using BROADCAST_ON will send a command to all ADARs that share a bus
-#define BROADCAST_OFF					 0
-#define BROADCAST_ON					 1
-
-// The minimum size of a read from the ADARs consists of 3 bytes
-#define ADAR1000_RD_SIZE				 3
-
-// Address at which the TX RAM starts
-#define ADAR_TX_RAM_START_ADDR			 0x1800
-
-// ADC Defines
-#define ADAR1000_ADC_2MHZ_CLK			 0x00
-#define ADAR1000_ADC_EN					 0x60
-#define ADAR1000_ADC_ST_CONV			 0x70
-
-/* REGISTER DEFINITIONS */
-#define REG_INTERFACE_CONFIG_A			 0x000
-#define REG_INTERFACE_CONFIG_B			 0x001
-#define REG_DEV_CONFIG					 0x002
-#define REG_SCRATCHPAD					 0x00A
-#define REG_TRANSFER					 0x00F
-#define REG_CH1_RX_GAIN					 0x010
-#define REG_CH2_RX_GAIN					 0x011
-#define REG_CH3_RX_GAIN					 0x012
-#define REG_CH4_RX_GAIN					 0x013
-#define REG_CH1_RX_PHS_I				 0x014
-#define REG_CH1_RX_PHS_Q				 0x015
-#define REG_CH2_RX_PHS_I				 0x016
-#define REG_CH2_RX_PHS_Q				 0x017
-#define REG_CH3_RX_PHS_I				 0x018
-#define REG_CH3_RX_PHS_Q				 0x019
-#define REG_CH4_RX_PHS_I				 0x01A
-#define REG_CH4_RX_PHS_Q				 0x01B
-#define REG_CH1_TX_GAIN					 0x01C
-#define REG_CH2_TX_GAIN					 0x01D
-#define REG_CH3_TX_GAIN					 0x01E
-#define REG_CH4_TX_GAIN					 0x01F
-#define REG_CH1_TX_PHS_I				 0x020
-#define REG_CH1_TX_PHS_Q				 0x021
-#define REG_CH2_TX_PHS_I				 0x022
-#define REG_CH2_TX_PHS_Q				 0x023
-#define REG_CH3_TX_PHS_I				 0x024
-#define REG_CH3_TX_PHS_Q				 0x025
-#define REG_CH4_TX_PHS_I				 0x026
-#define REG_CH4_TX_PHS_Q				 0x027
-#define REG_LOAD_WORKING				 0x028
-#define REG_PA_CH1_BIAS_ON				 0x029
-#define REG_PA_CH2_BIAS_ON				 0x02A
-#define REG_PA_CH3_BIAS_ON				 0x02B
-#define REG_PA_CH4_BIAS_ON				 0x02C
-#define REG_LNA_BIAS_ON					 0x02D
-#define REG_RX_ENABLES					 0x02E
-#define REG_TX_ENABLES					 0x02F
-#define REG_MISC_ENABLES				 0x030
-#define REG_SW_CONTROL					 0x031
-#define REG_ADC_CONTROL					 0x032
-#define REG_ADC_CONTROL_TEMP_EN			 0xf0
-#define REG_ADC_OUT						 0x033
-#define REG_BIAS_CURRENT_RX_LNA			 0x034
-#define REG_BIAS_CURRENT_RX				 0x035
-#define REG_BIAS_CURRENT_TX				 0x036
-#define REG_BIAS_CURRENT_TX_DRV			 0x037
-#define REG_MEM_CTL						 0x038
-#define REG_RX_CHX_MEM					 0x039
-#define REG_TX_CHX_MEM					 0x03A
-#define REG_RX_CH1_MEM					 0x03D
-#define REG_RX_CH2_MEM					 0x03E
-#define REG_RX_CH3_MEM					 0x03F
-#define REG_RX_CH4_MEM					 0x040
-#define REG_TX_CH1_MEM					 0x041
-#define REG_TX_CH2_MEM					 0x042
-#define REG_TX_CH3_MEM					 0x043
-#define REG_TX_CH4_MEM					 0x044
-#define REG_PA_CH1_BIAS_OFF				 0x046
-#define REG_PA_CH2_BIAS_OFF				 0x047
-#define REG_PA_CH3_BIAS_OFF				 0x048
-#define REG_PA_CH4_BIAS_OFF				 0x049
-#define REG_LNA_BIAS_OFF				 0x04A
-#define REG_TX_BEAM_STEP_START			 0x04D
-#define REG_TX_BEAM_STEP_STOP			 0x04E
-#define REG_RX_BEAM_STEP_START			 0x04F
-#define REG_RX_BEAM_STEP_STOP			 0x050
-
-// REGISTER CONSTANTS
-#define INTERFACE_CONFIG_A_SOFTRESET	 	((1 << 7) | (1 << 0))
-#define INTERFACE_CONFIG_A_LSB_FIRST	 	((1 << 6) | (1 << 1))
-#define INTERFACE_CONFIG_A_ADDR_ASCN	 	((1 << 5) | (1 << 2))
-#define INTERFACE_CONFIG_A_SDO_ACTIVE		((1 << 4) | (1 << 3))
-
-#define LD_WRK_REGS_LDRX_OVERRIDE		   	(1 << 0)
-#define LD_WRK_REGS_LDTX_OVERRIDE		   	(1 << 1)
-
-#define RX_ENABLES_TX_VGA_EN			   	(1 << 0)
-#define RX_ENABLES_TX_VM_EN				   	(1 << 1)
-#define RX_ENABLES_TX_DRV_EN			   	(1 << 2)
-#define RX_ENABLES_CH3_TX_EN			   	(1 << 3)
-#define RX_ENABLES_CH2_TX_EN			   	(1 << 4)
-#define RX_ENABLES_CH1_TX_EN			   	(1 << 5)
-#define RX_ENABLES_CH0_TX_EN			   	(1 << 6)
-
-#define TX_ENABLES_TX_VGA_EN			   	(1 << 0)
-#define TX_ENABLES_TX_VM_EN				   	(1 << 1)
-#define TX_ENABLES_TX_DRV_EN			   	(1 << 2)
-#define TX_ENABLES_CH3_TX_EN			   	(1 << 3)
-#define TX_ENABLES_CH2_TX_EN			   	(1 << 4)
-#define TX_ENABLES_CH1_TX_EN			   	(1 << 5)
-#define TX_ENABLES_CH0_TX_EN			   	(1 << 6)
-
-#define MISC_ENABLES_CH4_DET_EN			   	(1 << 0)
-#define MISC_ENABLES_CH3_DET_EN			   	(1 << 1)
-#define MISC_ENABLES_CH2_DET_EN			   	(1 << 2)
-#define MISC_ENABLES_CH1_DET_EN			   	(1 << 3)
-#define MISC_ENABLES_LNA_BIAS_OUT_EN	   	(1 << 4)
-#define MISC_ENABLES_BIAS_EN			   	(1 << 5)
-#define MISC_ENABLES_BIAS_CTRL			   	(1 << 6)
-#define MISC_ENABLES_SW_DRV_TR_MODE_SEL	   	(1 << 7)
-
-#define SW_CTRL_POL						   	(1 << 0)
-#define SW_CTRL_TR_SPI					   	(1 << 1)
-#define SW_CTRL_TR_SOURCE				   	(1 << 2)
-#define SW_CTRL_SW_DRV_EN_POL			   	(1 << 3)
-#define SW_CTRL_SW_DRV_EN_TR			   	(1 << 4)
-#define SW_CTRL_RX_EN					   	(1 << 5)
-#define SW_CTRL_TX_EN					   	(1 << 6)
-#define SW_CTRL_SW_DRV_TR_STATE			   	(1 << 7)
-
-#define MEM_CTRL_RX_CHX_RAM_BYPASS		   	(1 << 0)
-#define MEM_CTRL_TX_CHX_RAM_BYPASS		   	(1 << 1)
-#define MEM_CTRL_RX_BEAM_STEP_EN		   	(1 << 2)
-#define MEM_CTRL_TX_BEAM_STEP_EN		   	(1 << 3)
-#define MEM_CTRL_BIAS_RAM_BYPASS		   	(1 << 5)
-#define MEM_CTRL_BEAM_RAM_BYPASS		   	(1 << 6)
-#define MEM_CTRL_SCAN_MODE_EN			   	(1 << 7)
-
-#ifdef __cplusplus
-}  // End extern "C"
-#endif
-
-#endif /* LIB_ADAR1000_H_ */
-

9_Firmware/9_1_Microcontroller/9_1_1_C_Cpp_Libraries/diag_log.h

@@ -112,7 +112,7 @@ extern "C" {
  *   "BF"    -- ADAR1000 beamformer
  *   "PA"    -- Power amplifier bias/monitoring
  *   "FPGA"  -- FPGA communication and handshake
- *   "USB"   -- FT601 USB data path
+ *   "USB"   -- USB data path (FT2232H production / FT601 premium)
  *   "PWR"   -- Power sequencing and rail monitoring
  *   "IMU"   -- IMU/GPS/barometer sensors
  *   "MOT"   -- Stepper motor/scan mechanics

9_Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.cpp

@@ -21,7 +21,6 @@
 #include "usb_device.h"
 #include "USBHandler.h"
 #include "usbd_cdc_if.h"
-#include "adar1000.h"
 #include "ADAR1000_Manager.h"
 #include "ADAR1000_AGC.h"
 extern "C" {
@@ -46,7 +45,9 @@ extern "C" {
 #include <vector>
 #include "stm32_spi.h"
 #include "stm32_delay.h"
-#include "TinyGPSPlus.h"
+extern "C" {
+#include "um982_gps.h"
+}
 extern "C" {
 #include "GY_85_HAL.h"
 }
@@ -121,8 +122,8 @@ UART_HandleTypeDef huart5;
 UART_HandleTypeDef huart3;
 
 /* USER CODE BEGIN PV */
-// The TinyGPSPlus object
+// UM982 dual-antenna GPS receiver
-TinyGPSPlus gps;
+UM982_GPS_t um982;
 
 // Global data structures
 GPS_Data_t current_gps_data = {0};
@@ -173,7 +174,7 @@ float RADAR_Altitude;
 double RADAR_Longitude = 0;
 double RADAR_Latitude = 0;
 
-extern uint8_t GUI_start_flag_received;
+extern uint8_t GUI_start_flag_received;  // [STM32-006] Legacy, unused -- kept for linker compat
 
 
 //RADAR
@@ -620,7 +621,8 @@ typedef enum {
     ERROR_POWER_SUPPLY,
     ERROR_TEMPERATURE_HIGH,
     ERROR_MEMORY_ALLOC,
-    ERROR_WATCHDOG_TIMEOUT
+    ERROR_WATCHDOG_TIMEOUT,
+    ERROR_COUNT  // must be last — used for bounds checking error_strings[]
 } SystemError_t;
 
 static SystemError_t last_error = ERROR_NONE;
@@ -631,21 +633,42 @@ static bool system_emergency_state = false;
 SystemError_t checkSystemHealth(void) {
     SystemError_t current_error = ERROR_NONE;
 
-    // 1. Check AD9523 Clock Generator
+    // 0. Watchdog: detect main-loop stall (checkSystemHealth not called for >60 s).
-    static uint32_t last_clock_check = 0;
+    //    Timestamp is captured at function ENTRY and updated unconditionally, so
-    if (HAL_GetTick() - last_clock_check > 5000) {
+    //    any early return from a sub-check below cannot leave a stale value that
-        GPIO_PinState s0 = HAL_GPIO_ReadPin(AD9523_STATUS0_GPIO_Port, AD9523_STATUS0_Pin);
+    //    would later trip a spurious ERROR_WATCHDOG_TIMEOUT. A dedicated cold-start
-        GPIO_PinState s1 = HAL_GPIO_ReadPin(AD9523_STATUS1_GPIO_Port, AD9523_STATUS1_Pin);
+    //    branch ensures the first call after boot never trips (last_health_check==0
-        DIAG_GPIO("CLK", "AD9523 STATUS0", s0);
+    //    would otherwise make `HAL_GetTick() - 0 > 60000` true forever after the
-        DIAG_GPIO("CLK", "AD9523 STATUS1", s1);
+    //    60-s mark of the init sequence).
-        if (s0 == GPIO_PIN_RESET || s1 == GPIO_PIN_RESET) {
+    static uint32_t last_health_check = 0;
-            current_error = ERROR_AD9523_CLOCK;
+    uint32_t now_tick = HAL_GetTick();
-            DIAG_ERR("CLK", "AD9523 clock health check FAILED (STATUS0=%d STATUS1=%d)", s0, s1);
+    if (last_health_check == 0) {
+        last_health_check = now_tick;          // cold start: seed only
+    } else {
+        uint32_t elapsed = now_tick - last_health_check;
+        last_health_check = now_tick;          // update BEFORE any early return
+        if (elapsed > 60000) {
+            current_error = ERROR_WATCHDOG_TIMEOUT;
+            DIAG_ERR("SYS", "Health check: Watchdog timeout (>60s since last check)");
             return current_error;
         }
-        last_clock_check = HAL_GetTick();
     }
 
+    // 1. Check AD9523 Clock Generator
+    static uint32_t last_clock_check = 0;
+    if (HAL_GetTick() - last_clock_check > 5000) {
+        GPIO_PinState s0 = HAL_GPIO_ReadPin(AD9523_STATUS0_GPIO_Port, AD9523_STATUS0_Pin);
+        GPIO_PinState s1 = HAL_GPIO_ReadPin(AD9523_STATUS1_GPIO_Port, AD9523_STATUS1_Pin);
+        DIAG_GPIO("CLK", "AD9523 STATUS0", s0);
+        DIAG_GPIO("CLK", "AD9523 STATUS1", s1);
+        if (s0 == GPIO_PIN_RESET || s1 == GPIO_PIN_RESET) {
+            current_error = ERROR_AD9523_CLOCK;
+            DIAG_ERR("CLK", "AD9523 clock health check FAILED (STATUS0=%d STATUS1=%d)", s0, s1);
+            return current_error;
+        }
+        last_clock_check = HAL_GetTick();
+    }
+
     // 2. Check ADF4382 Lock Status
     bool tx_locked, rx_locked;
     if (ADF4382A_CheckLockStatus(&lo_manager, &tx_locked, &rx_locked) == ADF4382A_MANAGER_OK) {
@@ -679,37 +702,34 @@ SystemError_t checkSystemHealth(void) {
 
     // 4. Check IMU Communication
     static uint32_t last_imu_check = 0;
-    if (HAL_GetTick() - last_imu_check > 10000) {
+    if (HAL_GetTick() - last_imu_check > 10000) {
-        if (!GY85_Update(&imu)) {
+        if (!GY85_Update(&imu)) {
-            current_error = ERROR_IMU_COMM;
+            current_error = ERROR_IMU_COMM;
-            DIAG_ERR("IMU", "Health check: GY85_Update() FAILED");
+            DIAG_ERR("IMU", "Health check: GY85_Update() FAILED");
-            return current_error;
+            return current_error;
-        }
+        }
-        last_imu_check = HAL_GetTick();
+        last_imu_check = HAL_GetTick();
-    }
+    }
 
     // 5. Check BMP180 Communication
     static uint32_t last_bmp_check = 0;
-    if (HAL_GetTick() - last_bmp_check > 15000) {
+    if (HAL_GetTick() - last_bmp_check > 15000) {
-        double pressure = myBMP.getPressure();
+        double pressure = myBMP.getPressure();
-        if (pressure < 30000.0 || pressure > 110000.0 || isnan(pressure)) {
+        if (pressure < 30000.0 || pressure > 110000.0 || isnan(pressure)) {
-            current_error = ERROR_BMP180_COMM;
+            current_error = ERROR_BMP180_COMM;
-            DIAG_ERR("SYS", "Health check: BMP180 pressure out of range: %.0f", pressure);
+            DIAG_ERR("SYS", "Health check: BMP180 pressure out of range: %.0f", pressure);
-            return current_error;
+            return current_error;
-        }
+        }
-        last_bmp_check = HAL_GetTick();
+        last_bmp_check = HAL_GetTick();
-    }
+    }
 
-    // 6. Check GPS Communication
+    // 6. Check GPS Communication (30s grace period from boot / last valid fix)
-    static uint32_t last_gps_fix = 0;
+    uint32_t gps_fix_age = um982_position_age(&um982);
-    if (gps.location.isUpdated()) {
+    if (gps_fix_age > 30000) {
-        last_gps_fix = HAL_GetTick();
+        current_error = ERROR_GPS_COMM;
-    }
+        DIAG_WARN("SYS", "Health check: GPS no fix for >30s (age=%lu ms)", (unsigned long)gps_fix_age);
-    if (HAL_GetTick() - last_gps_fix > 30000) {
+        return current_error;
-        current_error = ERROR_GPS_COMM;
+    }
-        DIAG_WARN("SYS", "Health check: GPS no fix for >30s");
-        return current_error;
-    }
 
     // 7. Check RF Power Amplifier Current
     if (PowerAmplifier) {
@@ -734,14 +754,7 @@ SystemError_t checkSystemHealth(void) {
         return current_error;
     }
 
-    // 9. Simple watchdog check
+    // 9. Watchdog check is performed at function entry (see step 0).
-    static uint32_t last_health_check = 0;
-    if (HAL_GetTick() - last_health_check > 60000) {
-        current_error = ERROR_WATCHDOG_TIMEOUT;
-        DIAG_ERR("SYS", "Health check: Watchdog timeout (>60s since last check)");
-        return current_error;
-    }
-    last_health_check = HAL_GetTick();
 
     if (current_error != ERROR_NONE) {
         DIAG_ERR("SYS", "checkSystemHealth returning error code %d", current_error);
@@ -853,7 +866,7 @@ void handleSystemError(SystemError_t error) {
     DIAG_ERR("SYS", "handleSystemError: error=%d error_count=%lu", error, error_count);
 
     char error_msg[100];
-    const char* error_strings[] = {
+    static const char* const error_strings[] = {
         "No error",
         "AD9523 Clock failure",
         "ADF4382 TX LO unlocked",
@@ -873,9 +886,16 @@ void handleSystemError(SystemError_t error) {
         "Watchdog timeout"
     };
 
+    static_assert(sizeof(error_strings) / sizeof(error_strings[0]) == ERROR_COUNT,
+                  "error_strings[] and SystemError_t enum are out of sync");
+
+    const char* err_name = (error >= 0 && error < (int)(sizeof(error_strings) / sizeof(error_strings[0])))
+                           ? error_strings[error]
+                           : "Unknown error";
+
     snprintf(error_msg, sizeof(error_msg),
              "ERROR #%d: %s (Count: %lu)\r\n",
-             error, error_strings[error], error_count);
+             error, err_name, error_count);
     HAL_UART_Transmit(&huart3, (uint8_t*)error_msg, strlen(error_msg), 1000);
 
     // Blink LED pattern based on error code
@@ -885,9 +905,23 @@ void handleSystemError(SystemError_t error) {
         HAL_Delay(200);
     }
 
-    // Critical errors trigger emergency shutdown
+    // Critical errors trigger emergency shutdown.
-    if (error >= ERROR_RF_PA_OVERCURRENT && error <= ERROR_POWER_SUPPLY) {
+    //
-        DIAG_ERR("SYS", "CRITICAL ERROR (code %d: %s) -- initiating Emergency_Stop()", error, error_strings[error]);
+    // Safety-critical range: any fault that can damage the PAs or leave the
+    // system in an undefined state must cut the RF rails via Emergency_Stop().
+    // This covers:
+    //   ERROR_RF_PA_OVERCURRENT .. ERROR_POWER_SUPPLY (9..13) -- PA/supply faults
+    //   ERROR_TEMPERATURE_HIGH  (14) -- >75 C on the PA thermal sensors;
+    //                                  without cutting bias + 5V/5V5/RFPA rails
+    //                                  the GaN QPA2962 stage can thermal-runaway.
+    //   ERROR_WATCHDOG_TIMEOUT  (16) -- health-check loop has stalled (>60 s);
+    //                                  transmitter state is unknown, safest to
+    //                                  latch Emergency_Stop rather than rely on
+    //                                  IWDG reset (which re-energises the rails).
+    if ((error >= ERROR_RF_PA_OVERCURRENT && error <= ERROR_POWER_SUPPLY) ||
+        error == ERROR_TEMPERATURE_HIGH ||
+        error == ERROR_WATCHDOG_TIMEOUT) {
+        DIAG_ERR("SYS", "CRITICAL ERROR (code %d: %s) -- initiating Emergency_Stop()", error, err_name);
         snprintf(error_msg, sizeof(error_msg),
                  "CRITICAL ERROR! Initiating emergency shutdown.\r\n");
         HAL_UART_Transmit(&huart3, (uint8_t*)error_msg, strlen(error_msg), 1000);
@@ -1020,20 +1054,7 @@ static inline void delay_ms(uint32_t ms) { HAL_Delay(ms); }
 
 
 
-// This custom version of delay() ensures that the gps object
+// smartDelay removed -- replaced by non-blocking um982_process() in main loop
-// is being "fed".
-static void smartDelay(unsigned long ms)
-{
-    uint32_t start = HAL_GetTick();
-    uint8_t ch;
-
-    do {
-        // While there is new data available in UART (non-blocking)
-        if (HAL_UART_Receive(&huart5, &ch, 1, 0) == HAL_OK) {
-            gps.encode(ch);   // Pass received byte to TinyGPS++ equivalent parser
-        }
-    } while (HAL_GetTick() - start < ms);
-}
 
 // Small helper to enable DWT cycle counter for microdelay
 static void DWT_Init(void)
@@ -1177,7 +1198,14 @@ static int configure_ad9523(void)
 
     // init ad9523 defaults (fills any missing pdata defaults)
     DIAG("CLK", "Calling ad9523_init() -- fills pdata defaults");
-    ad9523_init(&init_param);
+    {
+        int32_t init_ret = ad9523_init(&init_param);
+        DIAG("CLK", "ad9523_init() returned %ld", (long)init_ret);
+        if (init_ret != 0) {
+            DIAG_ERR("CLK", "ad9523_init() FAILED (ret=%ld)", (long)init_ret);
+            return -1;
+        }
+    }
 
     /* [Bug #2 FIXED] Removed first ad9523_setup() call that was here.
      * It wrote to the chip while still in reset — writes were lost.
@@ -1566,6 +1594,12 @@ int main(void)
     Yaw_Sensor = (180*atan2(magRawY,magRawX)/PI) - Mag_Declination;
 
     if(Yaw_Sensor<0)Yaw_Sensor+=360;
+
+    // Override magnetometer heading with UM982 dual-antenna heading when available
+    if (um982_is_heading_valid(&um982)) {
+        Yaw_Sensor = um982_get_heading(&um982);
+    }
+
     RxEst_0 = RxEst_1;
     RyEst_0 = RyEst_1;
     RzEst_0 = RzEst_1;
@@ -1741,14 +1775,38 @@ int main(void)
   	//////////////////////////////////////////////////////////////////////////////////////
     //////////////////////////////////////////GPS/////////////////////////////////////////
     //////////////////////////////////////////////////////////////////////////////////////
-  for(int i=0; i<10;i++){
+  DIAG_SECTION("GPS INIT (UM982)");
-  smartDelay(1000);
+  DIAG("GPS", "Initializing UM982 on UART5 @ 115200 (baseline=50cm, tol=3cm)");
-  RADAR_Longitude = gps.location.lng();
+  if (!um982_init(&um982, &huart5, 50.0f, 3.0f)) {
-  RADAR_Latitude = gps.location.lat();
+      DIAG_WARN("GPS", "UM982 init: no VERSIONA response -- module may need more time");
+      // Not fatal: module may still start sending NMEA data after boot
+  } else {
+      DIAG("GPS", "UM982 init OK -- VERSIONA received");
   }
 
-  //move Stepper to position 1 = 0°
+  // Collect GPS data for a few seconds (non-blocking pump)
-  HAL_GPIO_WritePin(STEPPER_CW_P_GPIO_Port, STEPPER_CW_P_Pin, GPIO_PIN_RESET);//Set stepper motor spinning direction to CCW
+  DIAG("GPS", "Pumping GPS for 5 seconds to acquire initial fix...");
+  {
+      uint32_t gps_start = HAL_GetTick();
+      while (HAL_GetTick() - gps_start < 5000) {
+          um982_process(&um982);
+          HAL_Delay(10);
+      }
+  }
+  RADAR_Longitude = um982_get_longitude(&um982);
+  RADAR_Latitude = um982_get_latitude(&um982);
+  DIAG("GPS", "Initial position: lat=%.6f lon=%.6f fix=%d sats=%d",
+       RADAR_Latitude, RADAR_Longitude,
+       um982_get_fix_quality(&um982), um982_get_num_sats(&um982));
+
+  // Re-apply heading after GPS init so the north-alignment stepper move uses
+  // UM982 dual-antenna heading when available.
+  if (um982_is_heading_valid(&um982)) {
+      Yaw_Sensor = um982_get_heading(&um982);
+  }
+
+  //move Stepper to position 1 = 0°
+  HAL_GPIO_WritePin(STEPPER_CW_P_GPIO_Port, STEPPER_CW_P_Pin, GPIO_PIN_RESET);//Set stepper motor spinning direction to CCW
   //Point Stepper to North
   for(int i= 0;i<(int)(Yaw_Sensor*Stepper_steps/360);i++){
 	  HAL_GPIO_WritePin(STEPPER_CLK_P_GPIO_Port, STEPPER_CLK_P_Pin, GPIO_PIN_SET);
@@ -1770,29 +1828,11 @@ int main(void)
       HAL_UART_Transmit(&huart3, (uint8_t*)gps_send_error, sizeof(gps_send_error) - 1, 1000);
   }
 
-  // Check if start flag was received and settings are ready
+  /* [STM32-006 FIXED] Removed blocking do-while loop that waited for
-  do{
+   * usbHandler.isStartFlagReceived().  The production V7 PyQt GUI does not
-	  if (usbHandler.isStartFlagReceived() &&
+   * send the legacy 4-byte start flag [23,46,158,237], so this loop hung
-		  usbHandler.getState() == USBHandler::USBState::READY_FOR_DATA) {
+   * the MCU at boot indefinitely.  The USB settings handshake (if ever
-
+   * re-enabled) should be handled non-blocking in the main loop. */
-		  const RadarSettings& settings = usbHandler.getSettings();
-
-		  // Use the settings to configure your radar system
-		  /*
-			  settings.getSystemFrequency();
-			  settings.getChirpDuration1();
-			  settings.getChirpDuration2();
-			  settings.getChirpsPerPosition();
-			  settings.getFreqMin();
-			  settings.getFreqMax();
-			  settings.getPRF1();
-			  settings.getPRF2();
-			  settings.getMaxDistance();
-			  */
-
-
-              }
-  }while(!usbHandler.isStartFlagReceived());
 
   /***************************************************************/
   /************RF Power Amplifier Powering up sequence************/
@@ -2017,6 +2057,18 @@ int main(void)
 	        }
 	        DIAG("SYS", "Exited safe mode blink loop -- system_emergency_state cleared");
 	    }
+
+	  //////////////////////////////////////////////////////////////////////////////////////
+	  ////////////////////////// GPS: Non-blocking NMEA processing ////////////////////////
+	  //////////////////////////////////////////////////////////////////////////////////////
+	  um982_process(&um982);
+
+	  // Update position globals continuously
+	  if (um982_is_position_valid(&um982)) {
+	      RADAR_Latitude = um982_get_latitude(&um982);
+	      RADAR_Longitude = um982_get_longitude(&um982);
+	  }
+
 	  //////////////////////////////////////////////////////////////////////////////////////
 	  ////////////////////////// Monitor ADF4382A lock status periodically//////////////////
 	  //////////////////////////////////////////////////////////////////////////////////////
@@ -2127,9 +2179,24 @@ int main(void)
 
       runRadarPulseSequence();
 
-      /* [AGC] Outer-loop AGC: read FPGA saturation flag (DIG_5 / PD13),
+      /* [AGC] Outer-loop AGC: sync enable from FPGA via DIG_6 (PD14),
-       * adjust ADAR1000 VGA common gain once per radar frame (~258 ms).
+       * then read saturation flag (DIG_5 / PD13) and adjust ADAR1000 VGA
-       * Only run when AGC is enabled — otherwise leave VGA gains untouched. */
+       * common gain once per radar frame (~258 ms).
+       * FPGA register host_agc_enable is the single source of truth —
+       * DIG_6 propagates it to MCU every frame.
+       * 2-frame confirmation debounce: only change outerAgc.enabled when
+       * two consecutive frames read the same DIG_6 value. Prevents a
+       * single-sample glitch from causing a spurious AGC state transition.
+       * Added latency: 1 extra frame (~258 ms), acceptable for control plane. */
+      {
+          bool dig6_now = (HAL_GPIO_ReadPin(FPGA_DIG6_GPIO_Port,
+                                            FPGA_DIG6_Pin) == GPIO_PIN_SET);
+          static bool dig6_prev = false;  // matches boot default (AGC off)
+          if (dig6_now == dig6_prev) {
+              outerAgc.enabled = dig6_now;
+          }
+          dig6_prev = dig6_now;
+      }
       if (outerAgc.enabled) {
           bool sat = HAL_GPIO_ReadPin(FPGA_DIG5_SAT_GPIO_Port,
                                       FPGA_DIG5_SAT_Pin) == GPIO_PIN_SET;
@@ -2567,7 +2634,7 @@ static void MX_UART5_Init(void)
 
   /* USER CODE END UART5_Init 1 */
   huart5.Instance = UART5;
-  huart5.Init.BaudRate = 9600;
+  huart5.Init.BaudRate = 115200;
   huart5.Init.WordLength = UART_WORDLENGTH_8B;
   huart5.Init.StopBits = UART_STOPBITS_1;
   huart5.Init.Parity = UART_PARITY_NONE;

9_Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/um982_gps.c

@@ -0,0 +1,586 @@
+/*******************************************************************************
+ * um982_gps.c -- UM982 dual-antenna GNSS receiver driver implementation
+ *
+ * See um982_gps.h for API documentation.
+ * Command syntax per Unicore N4 Command Reference EN R1.14.
+ ******************************************************************************/
+#include "um982_gps.h"
+#include <string.h>
+#include <stdlib.h>
+#include <stdio.h>
+
+/* ========================= Internal helpers ========================== */
+
+/**
+ * Advance to the next comma-delimited field in an NMEA sentence.
+ * Returns pointer to the start of the next field (after the comma),
+ * or NULL if no more commas found before end-of-string or '*'.
+ *
+ * Handles empty fields (consecutive commas) correctly by returning
+ * a pointer to the character after the comma (which may be another comma).
+ */
+static const char *next_field(const char *p)
+{
+    if (p == NULL) return NULL;
+    while (*p != '\0' && *p != ',' && *p != '*') {
+        p++;
+    }
+    if (*p == ',') return p + 1;
+    return NULL;  /* End of sentence or checksum marker */
+}
+
+/**
+ * Get the length of the current field (up to next comma, '*', or '\0').
+ */
+static int field_len(const char *p)
+{
+    int len = 0;
+    if (p == NULL) return 0;
+    while (p[len] != '\0' && p[len] != ',' && p[len] != '*') {
+        len++;
+    }
+    return len;
+}
+
+/**
+ * Check if a field is non-empty (has at least one character before delimiter).
+ */
+static bool field_valid(const char *p)
+{
+    return p != NULL && field_len(p) > 0;
+}
+
+/**
+ * Parse a floating-point value from a field, returning 0.0 if empty.
+ */
+static double field_to_double(const char *p)
+{
+    if (!field_valid(p)) return 0.0;
+    return strtod(p, NULL);
+}
+
+static float field_to_float(const char *p)
+{
+    return (float)field_to_double(p);
+}
+
+static int field_to_int(const char *p)
+{
+    if (!field_valid(p)) return 0;
+    return (int)strtol(p, NULL, 10);
+}
+
+/* ========================= Checksum ================================== */
+
+bool um982_verify_checksum(const char *sentence)
+{
+    if (sentence == NULL || sentence[0] != '$') return false;
+
+    const char *p = sentence + 1;  /* Skip '$' */
+    uint8_t computed = 0;
+
+    while (*p != '\0' && *p != '*') {
+        computed ^= (uint8_t)*p;
+        p++;
+    }
+
+    if (*p != '*') return false;  /* No checksum marker found */
+    p++;  /* Skip '*' */
+
+    /* Parse 2-char hex checksum */
+    if (p[0] == '\0' || p[1] == '\0') return false;
+
+    char hex_str[3] = { p[0], p[1], '\0' };
+    unsigned long expected = strtoul(hex_str, NULL, 16);
+
+    return computed == (uint8_t)expected;
+}
+
+/* ========================= Coordinate parsing ======================== */
+
+double um982_parse_coord(const char *field, char hemisphere)
+{
+    if (field == NULL || field[0] == '\0') return NAN;
+
+    /* Find the decimal point to determine degree digit count.
+     * Latitude:  ddmm.mmmm  (dot at index 4, degrees = 2)
+     * Longitude: dddmm.mmmm (dot at index 5, degrees = 3)
+     * General:   degree_digits = dot_position - 2
+     */
+    const char *dot = strchr(field, '.');
+    if (dot == NULL) return NAN;
+
+    int dot_pos = (int)(dot - field);
+    int deg_digits = dot_pos - 2;
+
+    if (deg_digits < 1 || deg_digits > 3) return NAN;
+
+    /* Extract degree portion */
+    double degrees = 0.0;
+    for (int i = 0; i < deg_digits; i++) {
+        if (field[i] < '0' || field[i] > '9') return NAN;
+        degrees = degrees * 10.0 + (field[i] - '0');
+    }
+
+    /* Extract minutes portion (everything from deg_digits onward) */
+    double minutes = strtod(field + deg_digits, NULL);
+    if (minutes < 0.0 || minutes >= 60.0) return NAN;
+
+    double result = degrees + minutes / 60.0;
+
+    /* Apply hemisphere sign */
+    if (hemisphere == 'S' || hemisphere == 'W') {
+        result = -result;
+    }
+
+    return result;
+}
+
+/* ========================= Sentence parsers ========================== */
+
+/**
+ * Identify the NMEA sentence type by skipping the 2-char talker ID
+ * and comparing the 3-letter formatter.
+ *
+ * "$GNGGA,..." -> talker="GN", formatter="GGA"
+ * "$GPTHS,..." -> talker="GP", formatter="THS"
+ *
+ * Returns pointer to the formatter (3 chars at sentence+3), or NULL
+ * if sentence is too short.
+ */
+static const char *get_formatter(const char *sentence)
+{
+    /* sentence starts with '$', followed by 2-char talker + 3-char formatter */
+    if (sentence == NULL || strlen(sentence) < 6) return NULL;
+    return sentence + 3;  /* Skip "$XX" -> points to formatter */
+}
+
+/**
+ * Parse GGA sentence — position and fix quality.
+ *
+ * Format: $--GGA,time,lat,N/S,lon,E/W,quality,numSat,hdop,alt,M,geoidSep,M,dgpsAge,refID*XX
+ *         field:  1    2   3    4   5     6      7     8    9 10    11    12   13     14
+ */
+static void parse_gga(UM982_GPS_t *gps, const char *sentence)
+{
+    /* Skip to first field (after "$XXGGA,") */
+    const char *f = strchr(sentence, ',');
+    if (f == NULL) return;
+    f++;  /* f -> field 1 (time) */
+
+    /* Field 1: UTC time — skip for now */
+    const char *f2 = next_field(f);   /* lat */
+    const char *f3 = next_field(f2);  /* N/S */
+    const char *f4 = next_field(f3);  /* lon */
+    const char *f5 = next_field(f4);  /* E/W */
+    const char *f6 = next_field(f5);  /* quality */
+    const char *f7 = next_field(f6);  /* numSat */
+    const char *f8 = next_field(f7);  /* hdop */
+    const char *f9 = next_field(f8);  /* altitude */
+    const char *f10 = next_field(f9); /* M */
+    const char *f11 = next_field(f10); /* geoid sep */
+
+    uint32_t now = HAL_GetTick();
+
+    /* Parse fix quality first — if 0, position is meaningless */
+    gps->fix_quality = (uint8_t)field_to_int(f6);
+
+    /* Parse coordinates */
+    if (field_valid(f2) && field_valid(f3)) {
+        char hem = field_valid(f3) ? *f3 : 'N';
+        double lat = um982_parse_coord(f2, hem);
+        if (!isnan(lat)) gps->latitude = lat;
+    }
+
+    if (field_valid(f4) && field_valid(f5)) {
+        char hem = field_valid(f5) ? *f5 : 'E';
+        double lon = um982_parse_coord(f4, hem);
+        if (!isnan(lon)) gps->longitude = lon;
+    }
+
+    /* Number of satellites */
+    gps->num_satellites = (uint8_t)field_to_int(f7);
+
+    /* HDOP */
+    if (field_valid(f8)) {
+        gps->hdop = field_to_float(f8);
+    }
+
+    /* Altitude */
+    if (field_valid(f9)) {
+        gps->altitude = field_to_float(f9);
+    }
+
+    /* Geoid separation */
+    if (field_valid(f11)) {
+        gps->geoid_sep = field_to_float(f11);
+    }
+
+    gps->last_gga_tick = now;
+    if (gps->fix_quality != UM982_FIX_NONE) {
+        gps->last_fix_tick = now;
+    }
+}
+
+/**
+ * Parse RMC sentence — recommended minimum (position, speed, date).
+ *
+ * Format: $--RMC,time,status,lat,N/S,lon,E/W,speed,course,date,magVar,E/W,mode*XX
+ *         field:  1     2      3   4   5   6    7      8     9    10    11   12
+ */
+static void parse_rmc(UM982_GPS_t *gps, const char *sentence)
+{
+    const char *f = strchr(sentence, ',');
+    if (f == NULL) return;
+    f++;  /* f -> field 1 (time) */
+
+    const char *f2 = next_field(f);   /* status */
+    const char *f3 = next_field(f2);  /* lat */
+    const char *f4 = next_field(f3);  /* N/S */
+    const char *f5 = next_field(f4);  /* lon */
+    const char *f6 = next_field(f5);  /* E/W */
+    const char *f7 = next_field(f6);  /* speed knots */
+    const char *f8 = next_field(f7);  /* course true */
+
+    /* Status */
+    if (field_valid(f2)) {
+        gps->rmc_status = *f2;
+    }
+
+    /* Position (only if status = A for valid) */
+    if (field_valid(f2) && *f2 == 'A') {
+        if (field_valid(f3) && field_valid(f4)) {
+            double lat = um982_parse_coord(f3, *f4);
+            if (!isnan(lat)) gps->latitude = lat;
+        }
+        if (field_valid(f5) && field_valid(f6)) {
+            double lon = um982_parse_coord(f5, *f6);
+            if (!isnan(lon)) gps->longitude = lon;
+        }
+    }
+
+    /* Speed (knots) */
+    if (field_valid(f7)) {
+        gps->speed_knots = field_to_float(f7);
+    }
+
+    /* Course */
+    if (field_valid(f8)) {
+        gps->course_true = field_to_float(f8);
+    }
+
+    gps->last_rmc_tick = HAL_GetTick();
+}
+
+/**
+ * Parse THS sentence — true heading and status (UM982-specific).
+ *
+ * Format: $--THS,heading,mode*XX
+ *         field:    1      2
+ */
+static void parse_ths(UM982_GPS_t *gps, const char *sentence)
+{
+    const char *f = strchr(sentence, ',');
+    if (f == NULL) return;
+    f++;  /* f -> field 1 (heading) */
+
+    const char *f2 = next_field(f);  /* mode */
+
+    /* Heading */
+    if (field_valid(f)) {
+        gps->heading = field_to_float(f);
+    } else {
+        gps->heading = NAN;
+    }
+
+    /* Mode */
+    if (field_valid(f2)) {
+        gps->heading_mode = *f2;
+    } else {
+        gps->heading_mode = 'V';  /* Not valid if missing */
+    }
+
+    gps->last_ths_tick = HAL_GetTick();
+}
+
+/**
+ * Parse VTG sentence — course and speed over ground.
+ *
+ * Format: $--VTG,courseTrue,T,courseMag,M,speedKnots,N,speedKmh,K,mode*XX
+ *         field:     1      2     3      4     5      6    7     8   9
+ */
+static void parse_vtg(UM982_GPS_t *gps, const char *sentence)
+{
+    const char *f = strchr(sentence, ',');
+    if (f == NULL) return;
+    f++;  /* f -> field 1 (course true) */
+
+    const char *f2 = next_field(f);   /* T */
+    const char *f3 = next_field(f2);  /* course mag */
+    const char *f4 = next_field(f3);  /* M */
+    const char *f5 = next_field(f4);  /* speed knots */
+    const char *f6 = next_field(f5);  /* N */
+    const char *f7 = next_field(f6);  /* speed km/h */
+
+    /* Course true */
+    if (field_valid(f)) {
+        gps->course_true = field_to_float(f);
+    }
+
+    /* Speed knots */
+    if (field_valid(f5)) {
+        gps->speed_knots = field_to_float(f5);
+    }
+
+    /* Speed km/h */
+    if (field_valid(f7)) {
+        gps->speed_kmh = field_to_float(f7);
+    }
+
+    gps->last_vtg_tick = HAL_GetTick();
+}
+
+/* ========================= Sentence dispatch ========================= */
+
+void um982_parse_sentence(UM982_GPS_t *gps, const char *sentence)
+{
+    if (sentence == NULL || sentence[0] != '$') return;
+
+    /* Verify checksum before parsing */
+    if (!um982_verify_checksum(sentence)) return;
+
+    /* Check for VERSIONA response (starts with '#', not '$') -- handled separately */
+    /* Actually VERSIONA starts with '#', so it won't enter here. We check in feed(). */
+
+    /* Identify sentence type */
+    const char *fmt = get_formatter(sentence);
+    if (fmt == NULL) return;
+
+    if (strncmp(fmt, "GGA", 3) == 0) {
+        gps->initialized = true;
+        parse_gga(gps, sentence);
+    } else if (strncmp(fmt, "RMC", 3) == 0) {
+        gps->initialized = true;
+        parse_rmc(gps, sentence);
+    } else if (strncmp(fmt, "THS", 3) == 0) {
+        gps->initialized = true;
+        parse_ths(gps, sentence);
+    } else if (strncmp(fmt, "VTG", 3) == 0) {
+        gps->initialized = true;
+        parse_vtg(gps, sentence);
+    }
+    /* Other sentences silently ignored */
+}
+
+/* ========================= Command interface ========================= */
+
+bool um982_send_command(UM982_GPS_t *gps, const char *cmd)
+{
+    if (gps == NULL || gps->huart == NULL || cmd == NULL) return false;
+
+    /* Build command with \r\n termination */
+    char buf[UM982_CMD_BUF_SIZE];
+    int len = snprintf(buf, sizeof(buf), "%s\r\n", cmd);
+    if (len <= 0 || (size_t)len >= sizeof(buf)) return false;
+
+    HAL_StatusTypeDef status = HAL_UART_Transmit(
+        gps->huart, (const uint8_t *)buf, (uint16_t)len, 100);
+
+    return status == HAL_OK;
+}
+
+/* ========================= Line assembly + feed ====================== */
+
+/**
+ * Process a completed line from the line buffer.
+ */
+static void process_line(UM982_GPS_t *gps, const char *line)
+{
+    if (line == NULL || line[0] == '\0') return;
+
+    /* NMEA sentence starts with '$' */
+    if (line[0] == '$') {
+        um982_parse_sentence(gps, line);
+        return;
+    }
+
+    /* Unicore proprietary response starts with '#' (e.g. #VERSIONA) */
+    if (line[0] == '#') {
+        if (strncmp(line + 1, "VERSIONA", 8) == 0) {
+            gps->version_received = true;
+            gps->initialized = true;
+        }
+        return;
+    }
+}
+
+void um982_feed(UM982_GPS_t *gps, const uint8_t *data, uint16_t len)
+{
+    if (gps == NULL || data == NULL || len == 0) return;
+
+    for (uint16_t i = 0; i < len; i++) {
+        uint8_t ch = data[i];
+
+        /* End of line: process if we have content */
+        if (ch == '\n' || ch == '\r') {
+            if (gps->line_len > 0 && !gps->line_overflow) {
+                gps->line_buf[gps->line_len] = '\0';
+                process_line(gps, gps->line_buf);
+            }
+            gps->line_len = 0;
+            gps->line_overflow = false;
+            continue;
+        }
+
+        /* Accumulate into line buffer */
+        if (gps->line_len < UM982_LINE_BUF_SIZE - 1) {
+            gps->line_buf[gps->line_len++] = (char)ch;
+        } else {
+            gps->line_overflow = true;
+        }
+    }
+}
+
+/* ========================= UART process (production) ================= */
+
+void um982_process(UM982_GPS_t *gps)
+{
+    if (gps == NULL || gps->huart == NULL) return;
+
+    /* Read all available bytes from the UART one at a time.
+     * At 115200 baud (~11.5 KB/s) and a typical main-loop period of ~10 ms,
+     * we expect ~115 bytes per call — negligible overhead on a 168 MHz STM32.
+     *
+     * Note: batch reads (HAL_UART_Receive with Size > 1 and Timeout = 0) are
+     * NOT safe here because the HAL consumes bytes from the data register as
+     * it reads them.  If fewer than Size bytes are available, the consumed
+     * bytes are lost (HAL_TIMEOUT is returned and the caller has no way to
+     * know how many bytes were actually placed into the buffer). */
+    uint8_t ch;
+    while (HAL_UART_Receive(gps->huart, &ch, 1, 0) == HAL_OK) {
+        um982_feed(gps, &ch, 1);
+    }
+}
+
+/* ========================= Validity checks =========================== */
+
+bool um982_is_heading_valid(const UM982_GPS_t *gps)
+{
+    if (gps == NULL) return false;
+    if (isnan(gps->heading)) return false;
+
+    /* Mode must be Autonomous or Differential */
+    if (gps->heading_mode != 'A' && gps->heading_mode != 'D') return false;
+
+    /* Check age */
+    uint32_t age = HAL_GetTick() - gps->last_ths_tick;
+    return age < UM982_HEADING_TIMEOUT_MS;
+}
+
+bool um982_is_position_valid(const UM982_GPS_t *gps)
+{
+    if (gps == NULL) return false;
+    if (gps->fix_quality == UM982_FIX_NONE) return false;
+
+    /* Check age of the last valid fix */
+    uint32_t age = HAL_GetTick() - gps->last_fix_tick;
+    return age < UM982_POSITION_TIMEOUT_MS;
+}
+
+uint32_t um982_heading_age(const UM982_GPS_t *gps)
+{
+    if (gps == NULL) return UINT32_MAX;
+    return HAL_GetTick() - gps->last_ths_tick;
+}
+
+uint32_t um982_position_age(const UM982_GPS_t *gps)
+{
+    if (gps == NULL) return UINT32_MAX;
+    return HAL_GetTick() - gps->last_fix_tick;
+}
+
+/* ========================= Initialization ============================ */
+
+bool um982_init(UM982_GPS_t *gps, UART_HandleTypeDef *huart,
+                float baseline_cm, float tolerance_cm)
+{
+    if (gps == NULL || huart == NULL) return false;
+
+    /* Zero-init entire structure */
+    memset(gps, 0, sizeof(UM982_GPS_t));
+
+    gps->huart = huart;
+    gps->heading = NAN;
+    gps->heading_mode = 'V';
+    gps->rmc_status = 'V';
+    gps->speed_knots = 0.0f;
+
+    /* Seed fix timestamp so position_age() returns ~0 instead of uptime.
+     * Gives the module a full 30s grace window from init to acquire a fix
+     * before the health check fires ERROR_GPS_COMM. */
+    gps->last_fix_tick = HAL_GetTick();
+    gps->speed_kmh = 0.0f;
+    gps->course_true = 0.0f;
+
+    /* Step 1: Stop all current output to get a clean slate */
+    um982_send_command(gps, "UNLOG");
+    HAL_Delay(100);
+
+    /* Step 2: Configure heading mode
+     * Per N4 Reference 4.18: CONFIG HEADING FIXLENGTH (default mode)
+     * "The distance between ANT1 and ANT2 is fixed. They move synchronously." */
+    um982_send_command(gps, "CONFIG HEADING FIXLENGTH");
+    HAL_Delay(50);
+
+    /* Step 3: Set baseline length if specified
+     * Per N4 Reference: CONFIG HEADING LENGTH <cm> <tolerance_cm>
+     * "parameter1: Fixed baseline length (cm), valid range >= 0"
+     * "parameter2: Tolerable error margin (cm), valid range > 0" */
+    if (baseline_cm > 0.0f) {
+        char cmd[64];
+        if (tolerance_cm > 0.0f) {
+            snprintf(cmd, sizeof(cmd), "CONFIG HEADING LENGTH %.0f %.0f",
+                     baseline_cm, tolerance_cm);
+        } else {
+            snprintf(cmd, sizeof(cmd), "CONFIG HEADING LENGTH %.0f",
+                     baseline_cm);
+        }
+        um982_send_command(gps, cmd);
+        HAL_Delay(50);
+    }
+
+    /* Step 4: Enable NMEA output sentences on COM2.
+     * Per N4 Reference: "When requesting NMEA messages, users should add GP
+     * before each command name"
+     *
+     * We target COM2 because the ELT0213 board (GNSS.STORE) exposes COM2
+     * (RXD2/TXD2) on its 12-pin JST connector (pins 5 & 6).  The STM32
+     * UART5 (PC12-TX, PD2-RX) connects to these pins via JP8.
+     * COM2 defaults to 115200 baud — matching our UART5 config. */
+    um982_send_command(gps, "GPGGA COM2 1");     /* GGA at 1 Hz */
+    HAL_Delay(50);
+    um982_send_command(gps, "GPRMC COM2 1");     /* RMC at 1 Hz */
+    HAL_Delay(50);
+    um982_send_command(gps, "GPTHS COM2 0.2");   /* THS at 5 Hz (heading primary) */
+    HAL_Delay(50);
+
+    /* Step 5: Skip SAVECONFIG -- NMEA config is re-sent every boot anyway.
+     * Saving to NVM on every power cycle would wear flash.  If persistent
+     * config is needed, call um982_send_command(gps, "SAVECONFIG") once
+     * during commissioning. */
+
+    /* Step 6: Query version to verify communication */
+    gps->version_received = false;
+    um982_send_command(gps, "VERSIONA");
+
+    /* Wait for VERSIONA response (non-blocking poll) */
+    uint32_t start = HAL_GetTick();
+    while (!gps->version_received &&
+           (HAL_GetTick() - start) < UM982_INIT_TIMEOUT_MS) {
+        um982_process(gps);
+        HAL_Delay(10);
+    }
+
+    gps->initialized = gps->version_received;
+    return gps->initialized;
+}

9_Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/um982_gps.h

@@ -0,0 +1,213 @@
+/*******************************************************************************
+ * um982_gps.h -- UM982 dual-antenna GNSS receiver driver
+ *
+ * Parses NMEA sentences (GGA, RMC, THS, VTG) from the Unicore UM982 module
+ * and provides position, heading, and velocity data.
+ *
+ * Design principles:
+ *   - Non-blocking: process() reads available UART bytes without waiting
+ *   - Correct NMEA parsing: proper tokenizer handles empty fields
+ *   - Longitude handles 3-digit degrees (dddmm.mmmm) via decimal-point detection
+ *   - Checksum verified on every sentence
+ *   - Command syntax verified against Unicore N4 Command Reference EN R1.14
+ *
+ * Hardware: UM982 on UART5 @ 115200 baud, dual-antenna heading mode
+ ******************************************************************************/
+#ifndef UM982_GPS_H
+#define UM982_GPS_H
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <math.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Forward-declare the HAL UART handle type.  The real definition comes from
+ * stm32f7xx_hal.h (production) or stm32_hal_mock.h (tests). */
+#ifndef STM32_HAL_MOCK_H
+#include "stm32f7xx_hal.h"
+#else
+/* Already included via mock -- nothing to do */
+#endif
+
+/* ========================= Constants ================================= */
+
+#define UM982_RX_BUF_SIZE    512   /* Ring buffer for incoming UART bytes */
+#define UM982_LINE_BUF_SIZE   96   /* Max NMEA sentence (82 chars + margin) */
+#define UM982_CMD_BUF_SIZE   128   /* Outgoing command buffer */
+#define UM982_INIT_TIMEOUT_MS 3000 /* Timeout waiting for VERSIONA response */
+
+/* Fix quality values (from GGA field 6) */
+#define UM982_FIX_NONE       0
+#define UM982_FIX_GPS        1
+#define UM982_FIX_DGPS       2
+#define UM982_FIX_RTK_FIXED  4
+#define UM982_FIX_RTK_FLOAT  5
+
+/* Validity timeout defaults (ms) */
+#define UM982_HEADING_TIMEOUT_MS 2000
+#define UM982_POSITION_TIMEOUT_MS 5000
+
+/* ========================= Data Types ================================ */
+
+typedef struct {
+    /* Position */
+    double   latitude;       /* Decimal degrees, positive = North */
+    double   longitude;      /* Decimal degrees, positive = East */
+    float    altitude;       /* Meters above MSL */
+    float    geoid_sep;      /* Geoid separation (meters) */
+
+    /* Heading (from dual-antenna THS) */
+    float    heading;        /* True heading 0-360 degrees, NAN if invalid */
+    char     heading_mode;   /* A=autonomous, D=diff, E=est, M=manual, S=sim, V=invalid */
+
+    /* Velocity */
+    float    speed_knots;    /* Speed over ground (knots) */
+    float    speed_kmh;      /* Speed over ground (km/h) */
+    float    course_true;    /* Course over ground (degrees true) */
+
+    /* Quality */
+    uint8_t  fix_quality;    /* 0=none, 1=GPS, 2=DGPS, 4=RTK fixed, 5=RTK float */
+    uint8_t  num_satellites; /* Satellites used in fix */
+    float    hdop;           /* Horizontal dilution of precision */
+
+    /* RMC status */
+    char     rmc_status;     /* A=valid, V=warning */
+
+    /* Timestamps (HAL_GetTick() at last update) */
+    uint32_t last_fix_tick;   /* Last valid GGA fix (fix_quality > 0) */
+    uint32_t last_gga_tick;
+    uint32_t last_rmc_tick;
+    uint32_t last_ths_tick;
+    uint32_t last_vtg_tick;
+
+    /* Communication state */
+    bool     initialized;      /* VERSIONA or supported NMEA traffic seen */
+    bool     version_received; /* VERSIONA response seen */
+
+    /* ---- Internal parser state (not for external use) ---- */
+
+    /* Ring buffer */
+    uint8_t  rx_buf[UM982_RX_BUF_SIZE];
+    uint16_t rx_head;        /* Write index */
+    uint16_t rx_tail;        /* Read index */
+
+    /* Line assembler */
+    char     line_buf[UM982_LINE_BUF_SIZE];
+    uint8_t  line_len;
+    bool     line_overflow;  /* Current line exceeded buffer */
+
+    /* UART handle */
+    UART_HandleTypeDef *huart;
+
+} UM982_GPS_t;
+
+/* ========================= Public API ================================ */
+
+/**
+ * Initialize the UM982_GPS_t structure and configure the module.
+ *
+ * Sends: UNLOG, CONFIG HEADING, optional CONFIG HEADING LENGTH,
+ *        GPGGA, GPRMC, GPTHS
+ * Queries VERSIONA to verify communication.
+ *
+ * @param gps          Pointer to UM982_GPS_t instance
+ * @param huart        UART handle (e.g. &huart5)
+ * @param baseline_cm  Distance between antennas in cm (0 = use module default)
+ * @param tolerance_cm Baseline tolerance in cm (0 = use module default)
+ * @return true if VERSIONA response received within timeout
+ */
+bool um982_init(UM982_GPS_t *gps, UART_HandleTypeDef *huart,
+                float baseline_cm, float tolerance_cm);
+
+/**
+ * Process available UART data. Call from main loop — non-blocking.
+ *
+ * Reads all available bytes from UART, assembles lines, and dispatches
+ * complete NMEA sentences to the appropriate parser.
+ *
+ * @param gps  Pointer to UM982_GPS_t instance
+ */
+void um982_process(UM982_GPS_t *gps);
+
+/**
+ * Feed raw bytes directly into the parser (useful for testing).
+ * In production, um982_process() calls this internally after UART read.
+ *
+ * @param gps   Pointer to UM982_GPS_t instance
+ * @param data  Pointer to byte array
+ * @param len   Number of bytes
+ */
+void um982_feed(UM982_GPS_t *gps, const uint8_t *data, uint16_t len);
+
+/* ---- Getters ---- */
+
+static inline float    um982_get_heading(const UM982_GPS_t *gps)     { return gps->heading; }
+static inline double   um982_get_latitude(const UM982_GPS_t *gps)    { return gps->latitude; }
+static inline double   um982_get_longitude(const UM982_GPS_t *gps)   { return gps->longitude; }
+static inline float    um982_get_altitude(const UM982_GPS_t *gps)    { return gps->altitude; }
+static inline uint8_t  um982_get_fix_quality(const UM982_GPS_t *gps) { return gps->fix_quality; }
+static inline uint8_t  um982_get_num_sats(const UM982_GPS_t *gps)    { return gps->num_satellites; }
+static inline float    um982_get_hdop(const UM982_GPS_t *gps)        { return gps->hdop; }
+static inline float    um982_get_speed_knots(const UM982_GPS_t *gps) { return gps->speed_knots; }
+static inline float    um982_get_speed_kmh(const UM982_GPS_t *gps)   { return gps->speed_kmh; }
+static inline float    um982_get_course(const UM982_GPS_t *gps)      { return gps->course_true; }
+
+/**
+ * Check if heading is valid (mode A or D, and within timeout).
+ */
+bool um982_is_heading_valid(const UM982_GPS_t *gps);
+
+/**
+ * Check if position is valid (fix_quality > 0, and within timeout).
+ */
+bool um982_is_position_valid(const UM982_GPS_t *gps);
+
+/**
+ * Get age of last heading update in milliseconds.
+ */
+uint32_t um982_heading_age(const UM982_GPS_t *gps);
+
+/**
+ * Get age of the last valid position fix in milliseconds.
+ */
+uint32_t um982_position_age(const UM982_GPS_t *gps);
+
+/* ========================= Internal (exposed for testing) ============ */
+
+/**
+ * Verify NMEA checksum. Returns true if valid.
+ * Sentence must start with '$' and contain '*XX' before termination.
+ */
+bool um982_verify_checksum(const char *sentence);
+
+/**
+ * Parse a complete NMEA line (with $ prefix and *XX checksum).
+ * Dispatches to GGA/RMC/THS/VTG parsers as appropriate.
+ */
+void um982_parse_sentence(UM982_GPS_t *gps, const char *sentence);
+
+/**
+ * Parse NMEA coordinate string to decimal degrees.
+ * Works for both latitude (ddmm.mmmm) and longitude (dddmm.mmmm)
+ * by detecting the decimal point position.
+ *
+ * @param field     NMEA coordinate field (e.g. "4404.14036" or "12118.85961")
+ * @param hemisphere 'N', 'S', 'E', or 'W'
+ * @return Decimal degrees (negative for S/W), or NAN on parse error
+ */
+double um982_parse_coord(const char *field, char hemisphere);
+
+/**
+ * Send a command to the UM982. Appends \r\n automatically.
+ * @return true if UART transmit succeeded
+ */
+bool um982_send_command(UM982_GPS_t *gps, const char *cmd);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* UM982_GPS_H */

9_Firmware/9_1_Microcontroller/tests/.gitignore

@@ -3,18 +3,38 @@
 *.dSYM/
 
 # Test binaries (built by Makefile)
+# TESTS_WITH_REAL
 test_bug1_timed_sync_init_ordering
-test_bug2_ad9523_double_setup
 test_bug3_timed_sync_noop
 test_bug4_phase_shift_before_check
 test_bug5_fine_phase_gpio_only
+test_bug9_platform_ops_null
+test_bug10_spi_cs_not_toggled
+test_bug15_htim3_dangling_extern
+
+# TESTS_MOCK_ONLY
+test_bug2_ad9523_double_setup
 test_bug6_timer_variable_collision
 test_bug7_gpio_pin_conflict
 test_bug8_uart_commented_out
-test_bug9_platform_ops_null
+test_bug14_diag_section_args
-test_bug10_spi_cs_not_toggled
+test_gap3_emergency_stop_rails
-test_bug11_platform_spi_transmit_only
+
+# TESTS_STANDALONE
 test_bug12_pa_cal_loop_inverted
 test_bug13_dac2_adc_buffer_mismatch
-test_bug14_diag_section_args
+test_gap3_iwdg_config
-test_bug15_htim3_dangling_extern
+test_gap3_temperature_max
+test_gap3_idq_periodic_reread
+test_gap3_emergency_state_ordering
+test_gap3_overtemp_emergency_stop
+test_gap3_health_watchdog_cold_start
+
+# TESTS_WITH_PLATFORM
+test_bug11_platform_spi_transmit_only
+
+# TESTS_WITH_CXX
+test_agc_outer_loop
+
+# Manual / one-off test builds
+test_um982_gps

9_Firmware/9_1_Microcontroller/tests/Makefile

@@ -27,6 +27,10 @@ CXX_LIB_DIR := ../9_1_1_C_Cpp_Libraries
 CXX_SRCS    := $(CXX_LIB_DIR)/ADAR1000_AGC.cpp $(CXX_LIB_DIR)/ADAR1000_Manager.cpp
 CXX_OBJS    := ADAR1000_AGC.o ADAR1000_Manager.o
 
+# GPS driver source
+GPS_SRC := ../9_1_3_C_Cpp_Code/um982_gps.c
+GPS_OBJ := um982_gps.o
+
 # Real source files compiled against mock headers
 REAL_SRC := ../9_1_1_C_Cpp_Libraries/adf4382a_manager.c
 
@@ -64,7 +68,9 @@ TESTS_STANDALONE := test_bug12_pa_cal_loop_inverted \
                     test_gap3_iwdg_config \
                     test_gap3_temperature_max \
                     test_gap3_idq_periodic_reread \
-                    test_gap3_emergency_state_ordering
+                    test_gap3_emergency_state_ordering \
+                    test_gap3_overtemp_emergency_stop \
+                    test_gap3_health_watchdog_cold_start
 
 # Tests that need platform_noos_stm32.o + mocks
 TESTS_WITH_PLATFORM := test_bug11_platform_spi_transmit_only
@@ -72,11 +78,15 @@ TESTS_WITH_PLATFORM := test_bug11_platform_spi_transmit_only
 # C++ tests (AGC outer loop)
 TESTS_WITH_CXX := test_agc_outer_loop
 
-ALL_TESTS := $(TESTS_WITH_REAL) $(TESTS_MOCK_ONLY) $(TESTS_STANDALONE) $(TESTS_WITH_PLATFORM) $(TESTS_WITH_CXX)
+# GPS driver tests (need mocks + GPS source + -lm)
+TESTS_GPS := test_um982_gps
+
+ALL_TESTS := $(TESTS_WITH_REAL) $(TESTS_MOCK_ONLY) $(TESTS_STANDALONE) $(TESTS_WITH_PLATFORM) $(TESTS_WITH_CXX) $(TESTS_GPS)
 
 .PHONY: all build test clean \
         $(addprefix test_,bug1 bug2 bug3 bug4 bug5 bug6 bug7 bug8 bug9 bug10 bug11 bug12 bug13 bug14 bug15) \
-        test_gap3_estop test_gap3_iwdg test_gap3_temp test_gap3_idq test_gap3_order
+        test_gap3_estop test_gap3_iwdg test_gap3_temp test_gap3_idq test_gap3_order \
+        test_gap3_overtemp test_gap3_wdog
 
 all: build test
 
@@ -162,6 +172,12 @@ test_gap3_idq_periodic_reread: test_gap3_idq_periodic_reread.c
 test_gap3_emergency_state_ordering: test_gap3_emergency_state_ordering.c
 	$(CC) $(CFLAGS) $< -o $@
 
+test_gap3_overtemp_emergency_stop: test_gap3_overtemp_emergency_stop.c
+	$(CC) $(CFLAGS) $< -o $@
+
+test_gap3_health_watchdog_cold_start: test_gap3_health_watchdog_cold_start.c
+	$(CC) $(CFLAGS) $< -o $@
+
 # Tests that need platform_noos_stm32.o + mocks
 $(TESTS_WITH_PLATFORM): %: %.c $(MOCK_OBJS) $(PLATFORM_OBJ)
 	$(CC) $(CFLAGS) $(INCLUDES) $< $(MOCK_OBJS) $(PLATFORM_OBJ) -o $@
@@ -184,6 +200,20 @@ test_agc_outer_loop: test_agc_outer_loop.cpp $(CXX_OBJS) $(MOCK_OBJS)
 test_agc: test_agc_outer_loop
 	./test_agc_outer_loop
 
+# --- GPS driver rules ---
+
+$(GPS_OBJ): $(GPS_SRC)
+	$(CC) $(CFLAGS) $(INCLUDES) -I../9_1_3_C_Cpp_Code -c $< -o $@
+
+# Note: test includes um982_gps.c directly for white-box testing (static fn access)
+test_um982_gps: test_um982_gps.c $(MOCK_OBJS)
+	$(CC) $(CFLAGS) $(INCLUDES) -I../9_1_3_C_Cpp_Code $< $(MOCK_OBJS) -lm -o $@
+
+# Convenience target
+.PHONY: test_gps
+test_gps: test_um982_gps
+	./test_um982_gps
+
 # --- Individual test targets ---
 
 test_bug1: test_bug1_timed_sync_init_ordering
@@ -246,6 +276,12 @@ test_gap3_idq: test_gap3_idq_periodic_reread
 test_gap3_order: test_gap3_emergency_state_ordering
 	./test_gap3_emergency_state_ordering
 
+test_gap3_overtemp: test_gap3_overtemp_emergency_stop
+	./test_gap3_overtemp_emergency_stop
+
+test_gap3_wdog: test_gap3_health_watchdog_cold_start
+	./test_gap3_health_watchdog_cold_start
+
 # --- Clean ---
 
 clean:

9_Firmware/9_1_Microcontroller/tests/stm32_hal_mock.c

@@ -21,6 +21,7 @@ SPI_HandleTypeDef  hspi4 = { .id = 4 };
 I2C_HandleTypeDef  hi2c1 = { .id = 1 };
 I2C_HandleTypeDef  hi2c2 = { .id = 2 };
 UART_HandleTypeDef huart3 = { .id = 3 };
+UART_HandleTypeDef huart5 = { .id = 5 };  /* GPS UART */
 ADC_HandleTypeDef  hadc3 = { .id = 3 };
 TIM_HandleTypeDef  htim3 = { .id = 3 };
 
@@ -34,6 +35,26 @@ uint32_t mock_tick = 0;
 /* ========================= Printf control ========================= */
 int mock_printf_enabled = 0;
 
+/* ========================= Mock UART TX capture =================== */
+uint8_t  mock_uart_tx_buf[MOCK_UART_TX_BUF_SIZE];
+uint16_t mock_uart_tx_len = 0;
+
+/* ========================= Mock UART RX buffer ==================== */
+#define MOCK_UART_RX_SLOTS 8
+
+static struct {
+    uint32_t uart_id;
+    uint8_t  buf[MOCK_UART_RX_BUF_SIZE];
+    uint16_t head;
+    uint16_t tail;
+} mock_uart_rx[MOCK_UART_RX_SLOTS];
+
+void mock_uart_tx_clear(void)
+{
+    mock_uart_tx_len = 0;
+    memset(mock_uart_tx_buf, 0, sizeof(mock_uart_tx_buf));
+}
+
 /* ========================= Mock GPIO read ========================= */
 #define GPIO_READ_TABLE_SIZE 32
 static struct {
@@ -49,6 +70,9 @@ void spy_reset(void)
     mock_tick = 0;
     mock_printf_enabled = 0;
     memset(gpio_read_table, 0, sizeof(gpio_read_table));
+    memset(mock_uart_rx, 0, sizeof(mock_uart_rx));
+    mock_uart_tx_len = 0;
+    memset(mock_uart_tx_buf, 0, sizeof(mock_uart_tx_buf));
 }
 
 const SpyRecord *spy_get(int index)
@@ -185,6 +209,83 @@ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pD
         .value = Timeout,
         .extra = huart
     });
+    /* Capture TX data for test inspection */
+    for (uint16_t i = 0; i < Size && mock_uart_tx_len < MOCK_UART_TX_BUF_SIZE; i++) {
+        mock_uart_tx_buf[mock_uart_tx_len++] = pData[i];
+    }
+    return HAL_OK;
+}
+
+/* ========================= Mock UART RX helpers ====================== */
+
+/* find_rx_slot, mock_uart_rx_load, etc. use the mock_uart_rx declared above */
+
+static int find_rx_slot(UART_HandleTypeDef *huart)
+{
+    if (huart == NULL) return -1;
+    /* Find existing slot */
+    for (int i = 0; i < MOCK_UART_RX_SLOTS; i++) {
+        if (mock_uart_rx[i].uart_id == huart->id && mock_uart_rx[i].head != mock_uart_rx[i].tail) {
+            return i;
+        }
+        if (mock_uart_rx[i].uart_id == huart->id) {
+            return i;
+        }
+    }
+    /* Find empty slot */
+    for (int i = 0; i < MOCK_UART_RX_SLOTS; i++) {
+        if (mock_uart_rx[i].uart_id == 0) {
+            mock_uart_rx[i].uart_id = huart->id;
+            return i;
+        }
+    }
+    return -1;
+}
+
+void mock_uart_rx_load(UART_HandleTypeDef *huart, const uint8_t *data, uint16_t len)
+{
+    int slot = find_rx_slot(huart);
+    if (slot < 0) return;
+    mock_uart_rx[slot].uart_id = huart->id;
+    for (uint16_t i = 0; i < len; i++) {
+        uint16_t next = (mock_uart_rx[slot].head + 1) % MOCK_UART_RX_BUF_SIZE;
+        if (next == mock_uart_rx[slot].tail) break;  /* Buffer full */
+        mock_uart_rx[slot].buf[mock_uart_rx[slot].head] = data[i];
+        mock_uart_rx[slot].head = next;
+    }
+}
+
+void mock_uart_rx_clear(UART_HandleTypeDef *huart)
+{
+    int slot = find_rx_slot(huart);
+    if (slot < 0) return;
+    mock_uart_rx[slot].head = 0;
+    mock_uart_rx[slot].tail = 0;
+}
+
+HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData,
+                                    uint16_t Size, uint32_t Timeout)
+{
+    (void)Timeout;
+    int slot = find_rx_slot(huart);
+    if (slot < 0) return HAL_TIMEOUT;
+
+    for (uint16_t i = 0; i < Size; i++) {
+        if (mock_uart_rx[slot].head == mock_uart_rx[slot].tail) {
+            return HAL_TIMEOUT;  /* No more data */
+        }
+        pData[i] = mock_uart_rx[slot].buf[mock_uart_rx[slot].tail];
+        mock_uart_rx[slot].tail = (mock_uart_rx[slot].tail + 1) % MOCK_UART_RX_BUF_SIZE;
+    }
+
+    spy_push((SpyRecord){
+        .type  = SPY_UART_RX,
+        .port  = NULL,
+        .pin   = Size,
+        .value = Timeout,
+        .extra = huart
+    });
+
     return HAL_OK;
 }
 

9_Firmware/9_1_Microcontroller/tests/stm32_hal_mock.h

@@ -105,6 +105,7 @@ typedef struct {
 extern SPI_HandleTypeDef  hspi1, hspi4;
 extern I2C_HandleTypeDef  hi2c1, hi2c2;
 extern UART_HandleTypeDef huart3;
+extern UART_HandleTypeDef huart5;  /* GPS UART */
 extern ADC_HandleTypeDef  hadc3;
 extern TIM_HandleTypeDef  htim3;  /* Timer for DELADJ PWM */
 
@@ -139,6 +140,7 @@ typedef enum {
     SPY_TIM_SET_COMPARE,
     SPY_SPI_TRANSMIT_RECEIVE,
     SPY_SPI_TRANSMIT,
+    SPY_UART_RX,
 } SpyCallType;
 
 typedef struct {
@@ -187,6 +189,23 @@ void          HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
 uint32_t      HAL_GetTick(void);
 void          HAL_Delay(uint32_t Delay);
 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout);
+HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
+
+/* ========================= Mock UART RX buffer ======================= */
+
+/* Inject bytes into the mock UART RX buffer for a specific UART handle.
+ * HAL_UART_Receive will return these bytes one at a time. */
+#define MOCK_UART_RX_BUF_SIZE 2048
+
+void mock_uart_rx_load(UART_HandleTypeDef *huart, const uint8_t *data, uint16_t len);
+void mock_uart_rx_clear(UART_HandleTypeDef *huart);
+
+/* Capture buffer for UART TX data (to verify commands sent to GPS module) */
+#define MOCK_UART_TX_BUF_SIZE 2048
+
+extern uint8_t  mock_uart_tx_buf[MOCK_UART_TX_BUF_SIZE];
+extern uint16_t mock_uart_tx_len;
+void mock_uart_tx_clear(void);
 
 /* ========================= SPI stubs ============================== */
 

9_Firmware/9_1_Microcontroller/tests/test_agc_outer_loop.cpp

@@ -50,7 +50,7 @@ static void test_defaults()
     assert(agc.min_gain == 0);
     assert(agc.max_gain == 127);
     assert(agc.holdoff_frames == 4);
-    assert(agc.enabled == true);
+    assert(agc.enabled == false);  // disabled by default — FPGA DIG_6 is source of truth
     assert(agc.holdoff_counter == 0);
     assert(agc.last_saturated == false);
     assert(agc.saturation_event_count == 0);
@@ -67,6 +67,7 @@ static void test_defaults()
 static void test_saturation_reduces_gain()
 {
     ADAR1000_AGC agc;
+    agc.enabled = true;  // default is OFF; enable for this test
     uint8_t initial = agc.agc_base_gain;  // 30
 
     agc.update(true);  // saturation
@@ -82,6 +83,7 @@ static void test_saturation_reduces_gain()
 static void test_holdoff_prevents_early_gain_up()
 {
     ADAR1000_AGC agc;
+    agc.enabled = true;  // default is OFF; enable for this test
     agc.update(true);  // saturate once -> gain = 26
     uint8_t after_sat = agc.agc_base_gain;
 
@@ -101,6 +103,7 @@ static void test_holdoff_prevents_early_gain_up()
 static void test_recovery_after_holdoff()
 {
     ADAR1000_AGC agc;
+    agc.enabled = true;  // default is OFF; enable for this test
     agc.update(true);  // saturate -> gain = 26
     uint8_t after_sat = agc.agc_base_gain;
 
@@ -119,6 +122,7 @@ static void test_recovery_after_holdoff()
 static void test_min_gain_clamp()
 {
     ADAR1000_AGC agc;
+    agc.enabled = true;  // default is OFF; enable for this test
     agc.min_gain = 10;
     agc.agc_base_gain = 12;
     agc.gain_step_down = 4;
@@ -136,6 +140,7 @@ static void test_min_gain_clamp()
 static void test_max_gain_clamp()
 {
     ADAR1000_AGC agc;
+    agc.enabled = true;  // default is OFF; enable for this test
     agc.max_gain = 32;
     agc.agc_base_gain = 31;
     agc.gain_step_up = 2;
@@ -226,6 +231,7 @@ static void test_apply_gain_spi()
 static void test_reset_preserves_config()
 {
     ADAR1000_AGC agc;
+    agc.enabled = true;  // default is OFF; enable for this test
     agc.agc_base_gain = 42;
     agc.gain_step_down = 8;
     agc.cal_offset[3] = -5;
@@ -255,6 +261,7 @@ static void test_reset_preserves_config()
 static void test_saturation_counter()
 {
     ADAR1000_AGC agc;
+    agc.enabled = true;  // default is OFF; enable for this test
 
     for (int i = 0; i < 10; ++i) {
         agc.update(true);
@@ -274,6 +281,7 @@ static void test_saturation_counter()
 static void test_mixed_sequence()
 {
     ADAR1000_AGC agc;
+    agc.enabled = true;  // default is OFF; enable for this test
     agc.agc_base_gain = 30;
     agc.gain_step_down = 4;
     agc.gain_step_up = 1;

9_Firmware/9_1_Microcontroller/tests/test_gap3_emergency_state_ordering.c

@@ -34,22 +34,25 @@ static void Mock_Emergency_Stop(void)
     state_was_true_when_estop_called = system_emergency_state;
 }
 
-/* Error codes (subset matching main.cpp) */
+/* Error codes (subset matching main.cpp SystemError_t) */
 typedef enum {
     ERROR_NONE = 0,
     ERROR_RF_PA_OVERCURRENT = 9,
     ERROR_RF_PA_BIAS = 10,
-    ERROR_STEPPER_FAULT = 11,
+    ERROR_STEPPER_MOTOR = 11,
     ERROR_FPGA_COMM = 12,
     ERROR_POWER_SUPPLY = 13,
     ERROR_TEMPERATURE_HIGH = 14,
+    ERROR_MEMORY_ALLOC = 15,
+    ERROR_WATCHDOG_TIMEOUT = 16,
 } SystemError_t;
 
-/* Extracted critical-error handling logic (post-fix ordering) */
+/* Extracted critical-error handling logic (matches post-fix main.cpp predicate) */
 static void simulate_handleSystemError_critical(SystemError_t error)
 {
-    /* Only critical errors (PA overcurrent through power supply) trigger e-stop */
+    if ((error >= ERROR_RF_PA_OVERCURRENT && error <= ERROR_POWER_SUPPLY) ||
-    if (error >= ERROR_RF_PA_OVERCURRENT && error <= ERROR_POWER_SUPPLY) {
+        error == ERROR_TEMPERATURE_HIGH ||
+        error == ERROR_WATCHDOG_TIMEOUT) {
         /* FIX 5: set flag BEFORE calling Emergency_Stop */
         system_emergency_state = true;
         Mock_Emergency_Stop();
@@ -93,17 +96,39 @@ int main(void)
     assert(state_was_true_when_estop_called == true);
     printf("PASS\n");
 
-    /* Test 4: Non-critical error → no e-stop, flag stays false */
+    /* Test 4: Overtemp → MUST trigger e-stop (was incorrectly non-critical before fix) */
-    printf("  Test 4: Non-critical error (no e-stop)... ");
+    printf("  Test 4: Overtemp triggers e-stop... ");
     system_emergency_state = false;
     emergency_stop_called = false;
+    state_was_true_when_estop_called = false;
     simulate_handleSystemError_critical(ERROR_TEMPERATURE_HIGH);
+    assert(emergency_stop_called == true);
+    assert(system_emergency_state == true);
+    assert(state_was_true_when_estop_called == true);
+    printf("PASS\n");
+
+    /* Test 5: Watchdog timeout → MUST trigger e-stop */
+    printf("  Test 5: Watchdog timeout triggers e-stop... ");
+    system_emergency_state = false;
+    emergency_stop_called = false;
+    state_was_true_when_estop_called = false;
+    simulate_handleSystemError_critical(ERROR_WATCHDOG_TIMEOUT);
+    assert(emergency_stop_called == true);
+    assert(system_emergency_state == true);
+    assert(state_was_true_when_estop_called == true);
+    printf("PASS\n");
+
+    /* Test 6: Non-critical error (memory alloc) → no e-stop */
+    printf("  Test 6: Non-critical error (no e-stop)... ");
+    system_emergency_state = false;
+    emergency_stop_called = false;
+    simulate_handleSystemError_critical(ERROR_MEMORY_ALLOC);
     assert(emergency_stop_called == false);
     assert(system_emergency_state == false);
     printf("PASS\n");
 
-    /* Test 5: ERROR_NONE → no e-stop */
+    /* Test 7: ERROR_NONE → no e-stop */
-    printf("  Test 5: ERROR_NONE (no action)... ");
+    printf("  Test 7: ERROR_NONE (no action)... ");
     system_emergency_state = false;
     emergency_stop_called = false;
     simulate_handleSystemError_critical(ERROR_NONE);
@@ -111,6 +136,6 @@ int main(void)
     assert(system_emergency_state == false);
     printf("PASS\n");
 
-    printf("\n=== Gap-3 Fix 5: ALL TESTS PASSED ===\n\n");
+    printf("\n=== Gap-3 Fix 5: ALL 7 TESTS PASSED ===\n\n");
     return 0;
 }

9_Firmware/9_1_Microcontroller/tests/test_gap3_health_watchdog_cold_start.c

@@ -0,0 +1,132 @@
+/*******************************************************************************
+ * test_gap3_health_watchdog_cold_start.c
+ *
+ * Safety bug: checkSystemHealth()'s internal watchdog (step 9, pre-fix) had two
+ * linked defects that, once ERROR_WATCHDOG_TIMEOUT was escalated to
+ * Emergency_Stop() by the overtemp/watchdog PR, would false-latch the radar:
+ *
+ *   (1) Cold-start false trip:
+ *         static uint32_t last_health_check = 0;
+ *         if (HAL_GetTick() - last_health_check > 60000) { ... }
+ *       On the very first call, last_health_check == 0, so once the MCU has
+ *       been up >60 s (which is typical after the ADAR1000 / AD9523 / ADF4382
+ *       init sequence) the subtraction `now - 0` exceeds 60 000 ms and the
+ *       watchdog trips spuriously.
+ *
+ *   (2) Stale-timestamp after early returns:
+ *         last_health_check = HAL_GetTick();   // at END of function
+ *       Every earlier sub-check (IMU, BMP180, GPS, PA Idq, temperature) has an
+ *       `if (fault) return current_error;` path that skips the update. After a
+ *       cumulative 60 s of transient faults, the next clean call compares
+ *       `now` against the long-stale `last_health_check` and trips.
+ *
+ * After fix:  Watchdog logic moved to function ENTRY. A dedicated cold-start
+ *             branch seeds the timestamp on the first call without checking.
+ *             On every subsequent call, the elapsed delta is captured FIRST
+ *             and last_health_check is updated BEFORE any sub-check runs, so
+ *             early returns no longer leave a stale value.
+ *
+ * Test strategy:
+ *   Extract the post-fix watchdog predicate into a standalone function that
+ *   takes a simulated HAL_GetTick() value and returns whether the watchdog
+ *   should trip. Walk through boot + fault sequences that would have tripped
+ *   the pre-fix code and assert the post-fix code does NOT trip.
+ ******************************************************************************/
+#include <assert.h>
+#include <stdint.h>
+#include <stdio.h>
+
+/* --- Post-fix watchdog state + predicate, extracted verbatim --- */
+static uint32_t last_health_check = 0;
+
+/* Returns 1 iff this call should raise ERROR_WATCHDOG_TIMEOUT.
+   Updates last_health_check BEFORE returning (matches post-fix behaviour). */
+static int health_watchdog_step(uint32_t now_tick)
+{
+    if (last_health_check == 0) {
+        last_health_check = now_tick;   /* cold start: seed only, never trip */
+        return 0;
+    }
+    uint32_t elapsed = now_tick - last_health_check;
+    last_health_check = now_tick;       /* update BEFORE any early return */
+    return (elapsed > 60000) ? 1 : 0;
+}
+
+/* Test helper: reset the static state between scenarios. */
+static void reset_state(void) { last_health_check = 0; }
+
+int main(void)
+{
+    printf("=== Safety fix: checkSystemHealth() watchdog cold-start + stale-ts ===\n");
+
+    /* ---------- Scenario 1: cold-start after 60 s of init must NOT trip ---- */
+    printf("  Test 1: first call at t=75000 ms (post-init) does not trip... ");
+    reset_state();
+    assert(health_watchdog_step(75000) == 0);
+    printf("PASS\n");
+
+    /* ---------- Scenario 2: first call far beyond 60 s (PRE-FIX BUG) ------- */
+    printf("  Test 2: first call at t=600000 ms still does not trip... ");
+    reset_state();
+    assert(health_watchdog_step(600000) == 0);
+    printf("PASS\n");
+
+    /* ---------- Scenario 3: healthy main-loop pacing (10 ms period) -------- */
+    printf("  Test 3: 1000 calls at 10 ms intervals never trip... ");
+    reset_state();
+    (void)health_watchdog_step(1000);  /* seed */
+    for (int i = 1; i <= 1000; i++) {
+        assert(health_watchdog_step(1000 + i * 10) == 0);
+    }
+    printf("PASS\n");
+
+    /* ---------- Scenario 4: stale-timestamp after a burst of early returns -
+       Pre-fix bug: many early returns skipped the timestamp update, so a
+       later clean call would compare `now` against a 60+ s old value. Post-fix,
+       every call (including ones that would have early-returned in the real
+       function) updates the timestamp at the top, so this scenario is modelled
+       by calling health_watchdog_step() on every iteration of the main loop. */
+    printf("  Test 4: 70 s of 100 ms-spaced calls after seed do not trip... ");
+    reset_state();
+    (void)health_watchdog_step(50000);   /* seed mid-run */
+    for (int i = 1; i <= 700; i++) {     /* 70 s @ 100 ms */
+        int tripped = health_watchdog_step(50000 + i * 100);
+        assert(tripped == 0);
+    }
+    printf("PASS\n");
+
+    /* ---------- Scenario 5: genuine stall MUST trip ------------------------ */
+    printf("  Test 5: real 60+ s gap between calls does trip... ");
+    reset_state();
+    (void)health_watchdog_step(10000);              /* seed */
+    assert(health_watchdog_step(10000 + 60001) == 1);
+    printf("PASS\n");
+
+    /* ---------- Scenario 6: exactly 60 s gap is the boundary -- do NOT trip
+       Post-fix predicate uses strict >60000, matching the pre-fix comparator. */
+    printf("  Test 6: exactly 60000 ms gap does not trip (boundary)... ");
+    reset_state();
+    (void)health_watchdog_step(10000);
+    assert(health_watchdog_step(10000 + 60000) == 0);
+    printf("PASS\n");
+
+    /* ---------- Scenario 7: trip, then recover on next paced call ---------- */
+    printf("  Test 7: after a genuine stall+trip, next paced call does not re-trip... ");
+    reset_state();
+    (void)health_watchdog_step(5000);                      /* seed */
+    assert(health_watchdog_step(5000 + 70000) == 1);       /* stall -> trip */
+    assert(health_watchdog_step(5000 + 70000 + 10) == 0);  /* resume paced */
+    printf("PASS\n");
+
+    /* ---------- Scenario 8: HAL_GetTick() 32-bit wrap (~49.7 days) ---------
+       Because we subtract unsigned 32-bit values, wrap is handled correctly as
+       long as the true elapsed time is < 2^32 ms. */
+    printf("  Test 8: tick wrap from 0xFFFFFF00 -> 0x00000064 (200 ms span) does not trip... ");
+    reset_state();
+    (void)health_watchdog_step(0xFFFFFF00u);
+    assert(health_watchdog_step(0x00000064u) == 0);  /* elapsed = 0x164 = 356 ms */
+    printf("PASS\n");
+
+    printf("\n=== Safety fix: ALL TESTS PASSED ===\n\n");
+    return 0;
+}

9_Firmware/9_1_Microcontroller/tests/test_gap3_overtemp_emergency_stop.c

@@ -0,0 +1,119 @@
+/*******************************************************************************
+ * test_gap3_overtemp_emergency_stop.c
+ *
+ * Safety bug: handleSystemError() did not escalate ERROR_TEMPERATURE_HIGH
+ * (or ERROR_WATCHDOG_TIMEOUT) to Emergency_Stop().
+ *
+ * Before fix:  The critical-error gate was
+ *                if (error >= ERROR_RF_PA_OVERCURRENT &&
+ *                    error <= ERROR_POWER_SUPPLY) { Emergency_Stop(); }
+ *              So overtemp (code 14) and watchdog timeout (code 16) fell
+ *              through to attemptErrorRecovery()'s default branch (log and
+ *              continue), leaving the 10 W GaN PAs biased at >75 °C.
+ *
+ * After fix:   The gate also matches ERROR_TEMPERATURE_HIGH and
+ *              ERROR_WATCHDOG_TIMEOUT, so thermal and watchdog faults
+ *              latch Emergency_Stop() exactly like PA overcurrent.
+ *
+ * Test strategy:
+ *   Replicate the critical-error predicate and assert that every error
+ *   enum value which threatens RF/power safety is accepted, and that the
+ *   non-critical ones (comm, sensor, memory) are not.
+ ******************************************************************************/
+#include <assert.h>
+#include <stdio.h>
+
+/* Mirror of SystemError_t from main.cpp (keep in lockstep). */
+typedef enum {
+    ERROR_NONE = 0,
+    ERROR_AD9523_CLOCK,
+    ERROR_ADF4382_TX_UNLOCK,
+    ERROR_ADF4382_RX_UNLOCK,
+    ERROR_ADAR1000_COMM,
+    ERROR_ADAR1000_TEMP,
+    ERROR_IMU_COMM,
+    ERROR_BMP180_COMM,
+    ERROR_GPS_COMM,
+    ERROR_RF_PA_OVERCURRENT,
+    ERROR_RF_PA_BIAS,
+    ERROR_STEPPER_MOTOR,
+    ERROR_FPGA_COMM,
+    ERROR_POWER_SUPPLY,
+    ERROR_TEMPERATURE_HIGH,
+    ERROR_MEMORY_ALLOC,
+    ERROR_WATCHDOG_TIMEOUT
+} SystemError_t;
+
+/* Extracted post-fix predicate: returns 1 when Emergency_Stop() must fire. */
+static int triggers_emergency_stop(SystemError_t e)
+{
+    return ((e >= ERROR_RF_PA_OVERCURRENT && e <= ERROR_POWER_SUPPLY) ||
+            e == ERROR_TEMPERATURE_HIGH ||
+            e == ERROR_WATCHDOG_TIMEOUT);
+}
+
+int main(void)
+{
+    printf("=== Safety fix: overtemp / watchdog -> Emergency_Stop() ===\n");
+
+    /* --- Errors that MUST latch Emergency_Stop --- */
+    printf("  Test 1: ERROR_RF_PA_OVERCURRENT triggers... ");
+    assert(triggers_emergency_stop(ERROR_RF_PA_OVERCURRENT));
+    printf("PASS\n");
+
+    printf("  Test 2: ERROR_RF_PA_BIAS triggers... ");
+    assert(triggers_emergency_stop(ERROR_RF_PA_BIAS));
+    printf("PASS\n");
+
+    printf("  Test 3: ERROR_STEPPER_MOTOR triggers... ");
+    assert(triggers_emergency_stop(ERROR_STEPPER_MOTOR));
+    printf("PASS\n");
+
+    printf("  Test 4: ERROR_FPGA_COMM triggers... ");
+    assert(triggers_emergency_stop(ERROR_FPGA_COMM));
+    printf("PASS\n");
+
+    printf("  Test 5: ERROR_POWER_SUPPLY triggers... ");
+    assert(triggers_emergency_stop(ERROR_POWER_SUPPLY));
+    printf("PASS\n");
+
+    printf("  Test 6: ERROR_TEMPERATURE_HIGH triggers (regression)... ");
+    assert(triggers_emergency_stop(ERROR_TEMPERATURE_HIGH));
+    printf("PASS\n");
+
+    printf("  Test 7: ERROR_WATCHDOG_TIMEOUT triggers (regression)... ");
+    assert(triggers_emergency_stop(ERROR_WATCHDOG_TIMEOUT));
+    printf("PASS\n");
+
+    /* --- Errors that MUST NOT escalate (recoverable / informational) --- */
+    printf("  Test 8: ERROR_NONE does not trigger... ");
+    assert(!triggers_emergency_stop(ERROR_NONE));
+    printf("PASS\n");
+
+    printf("  Test 9: ERROR_AD9523_CLOCK does not trigger... ");
+    assert(!triggers_emergency_stop(ERROR_AD9523_CLOCK));
+    printf("PASS\n");
+
+    printf("  Test 10: ERROR_ADF4382_TX_UNLOCK does not trigger (recoverable)... ");
+    assert(!triggers_emergency_stop(ERROR_ADF4382_TX_UNLOCK));
+    printf("PASS\n");
+
+    printf("  Test 11: ERROR_ADAR1000_COMM does not trigger... ");
+    assert(!triggers_emergency_stop(ERROR_ADAR1000_COMM));
+    printf("PASS\n");
+
+    printf("  Test 12: ERROR_IMU_COMM does not trigger... ");
+    assert(!triggers_emergency_stop(ERROR_IMU_COMM));
+    printf("PASS\n");
+
+    printf("  Test 13: ERROR_GPS_COMM does not trigger... ");
+    assert(!triggers_emergency_stop(ERROR_GPS_COMM));
+    printf("PASS\n");
+
+    printf("  Test 14: ERROR_MEMORY_ALLOC does not trigger... ");
+    assert(!triggers_emergency_stop(ERROR_MEMORY_ALLOC));
+    printf("PASS\n");
+
+    printf("\n=== Safety fix: ALL TESTS PASSED ===\n\n");
+    return 0;
+}

9_Firmware/9_1_Microcontroller/tests/test_um982_gps.c

@@ -0,0 +1,853 @@
+/*******************************************************************************
+ * test_um982_gps.c -- Unit tests for UM982 GPS driver
+ *
+ * Tests NMEA parsing, checksum validation, coordinate parsing, init sequence,
+ * and validity tracking. Uses the mock HAL infrastructure for UART.
+ *
+ * Build: see Makefile target test_um982_gps
+ * Run:   ./test_um982_gps
+ ******************************************************************************/
+#include "stm32_hal_mock.h"
+#include "../9_1_3_C_Cpp_Code/um982_gps.h"
+#include "../9_1_3_C_Cpp_Code/um982_gps.c"  /* Include .c directly for white-box testing */
+
+#include <stdio.h>
+#include <string.h>
+#include <assert.h>
+#include <math.h>
+
+/* ========================= Test helpers ============================== */
+
+static int tests_passed = 0;
+static int tests_failed = 0;
+
+#define TEST(name) \
+    do { printf("  [TEST] %-55s ", name); } while(0)
+
+#define PASS() \
+    do { printf("PASS\n"); tests_passed++; } while(0)
+
+#define FAIL(msg) \
+    do { printf("FAIL: %s\n", msg); tests_failed++; } while(0)
+
+#define ASSERT_TRUE(expr, msg) \
+    do { if (!(expr)) { FAIL(msg); return; } } while(0)
+
+#define ASSERT_FALSE(expr, msg) \
+    do { if (expr) { FAIL(msg); return; } } while(0)
+
+#define ASSERT_EQ_INT(a, b, msg) \
+    do { if ((a) != (b)) { \
+        char _buf[256]; \
+        snprintf(_buf, sizeof(_buf), "%s (got %d, expected %d)", msg, (int)(a), (int)(b)); \
+        FAIL(_buf); return; \
+    } } while(0)
+
+#define ASSERT_NEAR(a, b, tol, msg) \
+    do { if (fabs((double)(a) - (double)(b)) > (tol)) { \
+        char _buf[256]; \
+        snprintf(_buf, sizeof(_buf), "%s (got %.8f, expected %.8f)", msg, (double)(a), (double)(b)); \
+        FAIL(_buf); return; \
+    } } while(0)
+
+#define ASSERT_NAN(val, msg) \
+    do { if (!isnan(val)) { FAIL(msg); return; } } while(0)
+
+static UM982_GPS_t gps;
+
+static void reset_gps(void)
+{
+    spy_reset();
+    memset(&gps, 0, sizeof(gps));
+    gps.huart = &huart5;
+    gps.heading = NAN;
+    gps.heading_mode = 'V';
+    gps.rmc_status = 'V';
+}
+
+/* ========================= Checksum tests ============================ */
+
+static void test_checksum_valid(void)
+{
+    TEST("checksum: valid GGA");
+    ASSERT_TRUE(um982_verify_checksum(
+        "$GNGGA,001043.00,4404.14036,N,12118.85961,W,1,12,0.98,1113.0,M,-21.3,M*47"),
+        "should be valid");
+    PASS();
+}
+
+static void test_checksum_valid_ths(void)
+{
+    TEST("checksum: valid THS");
+    ASSERT_TRUE(um982_verify_checksum("$GNTHS,341.3344,A*1F"),
+        "should be valid");
+    PASS();
+}
+
+static void test_checksum_invalid(void)
+{
+    TEST("checksum: invalid (wrong value)");
+    ASSERT_FALSE(um982_verify_checksum("$GNTHS,341.3344,A*FF"),
+        "should be invalid");
+    PASS();
+}
+
+static void test_checksum_missing_star(void)
+{
+    TEST("checksum: missing * marker");
+    ASSERT_FALSE(um982_verify_checksum("$GNTHS,341.3344,A"),
+        "should be invalid");
+    PASS();
+}
+
+static void test_checksum_null(void)
+{
+    TEST("checksum: NULL input");
+    ASSERT_FALSE(um982_verify_checksum(NULL), "should be false");
+    PASS();
+}
+
+static void test_checksum_no_dollar(void)
+{
+    TEST("checksum: missing $ prefix");
+    ASSERT_FALSE(um982_verify_checksum("GNTHS,341.3344,A*1F"),
+        "should be invalid without $");
+    PASS();
+}
+
+/* ========================= Coordinate parsing tests ================== */
+
+static void test_coord_latitude_north(void)
+{
+    TEST("coord: latitude 4404.14036 N");
+    double lat = um982_parse_coord("4404.14036", 'N');
+    /* 44 + 04.14036/60 = 44.069006 */
+    ASSERT_NEAR(lat, 44.069006, 0.000001, "latitude");
+    PASS();
+}
+
+static void test_coord_latitude_south(void)
+{
+    TEST("coord: latitude 3358.92500 S (negative)");
+    double lat = um982_parse_coord("3358.92500", 'S');
+    ASSERT_TRUE(lat < 0.0, "should be negative for S");
+    ASSERT_NEAR(lat, -(33.0 + 58.925/60.0), 0.000001, "latitude");
+    PASS();
+}
+
+static void test_coord_longitude_3digit(void)
+{
+    TEST("coord: longitude 12118.85961 W (3-digit degrees)");
+    double lon = um982_parse_coord("12118.85961", 'W');
+    /* 121 + 18.85961/60 = 121.314327 */
+    ASSERT_TRUE(lon < 0.0, "should be negative for W");
+    ASSERT_NEAR(lon, -(121.0 + 18.85961/60.0), 0.000001, "longitude");
+    PASS();
+}
+
+static void test_coord_longitude_east(void)
+{
+    TEST("coord: longitude 11614.19729 E");
+    double lon = um982_parse_coord("11614.19729", 'E');
+    ASSERT_TRUE(lon > 0.0, "should be positive for E");
+    ASSERT_NEAR(lon, 116.0 + 14.19729/60.0, 0.000001, "longitude");
+    PASS();
+}
+
+static void test_coord_empty(void)
+{
+    TEST("coord: empty string returns NAN");
+    ASSERT_NAN(um982_parse_coord("", 'N'), "should be NAN");
+    PASS();
+}
+
+static void test_coord_null(void)
+{
+    TEST("coord: NULL returns NAN");
+    ASSERT_NAN(um982_parse_coord(NULL, 'N'), "should be NAN");
+    PASS();
+}
+
+static void test_coord_no_dot(void)
+{
+    TEST("coord: no decimal point returns NAN");
+    ASSERT_NAN(um982_parse_coord("440414036", 'N'), "should be NAN");
+    PASS();
+}
+
+/* ========================= GGA parsing tests ========================= */
+
+static void test_parse_gga_full(void)
+{
+    TEST("GGA: full sentence with all fields");
+    reset_gps();
+    mock_set_tick(1000);
+
+    um982_parse_sentence(&gps,
+        "$GNGGA,001043.00,4404.14036,N,12118.85961,W,1,12,0.98,1113.0,M,-21.3,M*47");
+
+    ASSERT_NEAR(gps.latitude, 44.069006, 0.0001, "latitude");
+    ASSERT_NEAR(gps.longitude, -(121.0 + 18.85961/60.0), 0.0001, "longitude");
+    ASSERT_EQ_INT(gps.fix_quality, 1, "fix quality");
+    ASSERT_EQ_INT(gps.num_satellites, 12, "num sats");
+    ASSERT_NEAR(gps.hdop, 0.98, 0.01, "hdop");
+    ASSERT_NEAR(gps.altitude, 1113.0, 0.1, "altitude");
+    ASSERT_NEAR(gps.geoid_sep, -21.3, 0.1, "geoid sep");
+    PASS();
+}
+
+static void test_parse_gga_rtk_fixed(void)
+{
+    TEST("GGA: RTK fixed (quality=4)");
+    reset_gps();
+
+    um982_parse_sentence(&gps,
+        "$GNGGA,023634.00,4004.73871635,N,11614.19729418,E,4,28,0.7,61.0988,M,-8.4923,M,,*5D");
+
+    ASSERT_EQ_INT(gps.fix_quality, 4, "RTK fixed");
+    ASSERT_EQ_INT(gps.num_satellites, 28, "num sats");
+    ASSERT_NEAR(gps.latitude, 40.0 + 4.73871635/60.0, 0.0000001, "latitude");
+    ASSERT_NEAR(gps.longitude, 116.0 + 14.19729418/60.0, 0.0000001, "longitude");
+    PASS();
+}
+
+static void test_parse_gga_no_fix(void)
+{
+    TEST("GGA: no fix (quality=0)");
+    reset_gps();
+
+    /* Compute checksum for this sentence */
+    um982_parse_sentence(&gps,
+        "$GNGGA,235959.00,,,,,0,00,99.99,,,,,,*79");
+
+    ASSERT_EQ_INT(gps.fix_quality, 0, "no fix");
+    PASS();
+}
+
+/* ========================= RMC parsing tests ========================= */
+
+static void test_parse_rmc_valid(void)
+{
+    TEST("RMC: valid position and speed");
+    reset_gps();
+    mock_set_tick(2000);
+
+    um982_parse_sentence(&gps,
+        "$GNRMC,001031.00,A,4404.13993,N,12118.86023,W,0.146,,100117,,,A*7B");
+
+    ASSERT_EQ_INT(gps.rmc_status, 'A', "status");
+    ASSERT_NEAR(gps.latitude, 44.0 + 4.13993/60.0, 0.0001, "latitude");
+    ASSERT_NEAR(gps.longitude, -(121.0 + 18.86023/60.0), 0.0001, "longitude");
+    ASSERT_NEAR(gps.speed_knots, 0.146, 0.001, "speed");
+    PASS();
+}
+
+static void test_parse_rmc_void(void)
+{
+    TEST("RMC: void status (no valid fix)");
+    reset_gps();
+    gps.latitude = 12.34;  /* Pre-set to check it doesn't get overwritten */
+
+    um982_parse_sentence(&gps,
+        "$GNRMC,235959.00,V,,,,,,,100117,,,N*64");
+
+    ASSERT_EQ_INT(gps.rmc_status, 'V', "void status");
+    ASSERT_NEAR(gps.latitude, 12.34, 0.001, "lat should not change on void");
+    PASS();
+}
+
+/* ========================= THS parsing tests ========================= */
+
+static void test_parse_ths_autonomous(void)
+{
+    TEST("THS: autonomous heading 341.3344");
+    reset_gps();
+    mock_set_tick(3000);
+
+    um982_parse_sentence(&gps, "$GNTHS,341.3344,A*1F");
+
+    ASSERT_NEAR(gps.heading, 341.3344, 0.001, "heading");
+    ASSERT_EQ_INT(gps.heading_mode, 'A', "mode");
+    PASS();
+}
+
+static void test_parse_ths_not_valid(void)
+{
+    TEST("THS: not valid mode");
+    reset_gps();
+
+    um982_parse_sentence(&gps, "$GNTHS,,V*10");
+
+    ASSERT_NAN(gps.heading, "heading should be NAN when empty");
+    ASSERT_EQ_INT(gps.heading_mode, 'V', "mode V");
+    PASS();
+}
+
+static void test_parse_ths_zero(void)
+{
+    TEST("THS: heading exactly 0.0000");
+    reset_gps();
+
+    um982_parse_sentence(&gps, "$GNTHS,0.0000,A*19");
+
+    ASSERT_NEAR(gps.heading, 0.0, 0.001, "heading zero");
+    ASSERT_EQ_INT(gps.heading_mode, 'A', "mode A");
+    PASS();
+}
+
+static void test_parse_ths_360_boundary(void)
+{
+    TEST("THS: heading near 360");
+    reset_gps();
+
+    um982_parse_sentence(&gps, "$GNTHS,359.9999,D*13");
+
+    ASSERT_NEAR(gps.heading, 359.9999, 0.001, "heading near 360");
+    ASSERT_EQ_INT(gps.heading_mode, 'D', "mode D");
+    PASS();
+}
+
+/* ========================= VTG parsing tests ========================= */
+
+static void test_parse_vtg(void)
+{
+    TEST("VTG: course and speed");
+    reset_gps();
+
+    um982_parse_sentence(&gps,
+        "$GPVTG,220.86,T,,M,2.550,N,4.724,K,A*34");
+
+    ASSERT_NEAR(gps.course_true, 220.86, 0.01, "course");
+    ASSERT_NEAR(gps.speed_knots, 2.550, 0.001, "speed knots");
+    ASSERT_NEAR(gps.speed_kmh, 4.724, 0.001, "speed kmh");
+    PASS();
+}
+
+/* ========================= Talker ID tests =========================== */
+
+static void test_talker_gp(void)
+{
+    TEST("talker: GP prefix parses correctly");
+    reset_gps();
+
+    um982_parse_sentence(&gps, "$GPTHS,123.4567,A*07");
+
+    ASSERT_NEAR(gps.heading, 123.4567, 0.001, "heading with GP");
+    PASS();
+}
+
+static void test_talker_gl(void)
+{
+    TEST("talker: GL prefix parses correctly");
+    reset_gps();
+
+    um982_parse_sentence(&gps, "$GLTHS,123.4567,A*1B");
+
+    ASSERT_NEAR(gps.heading, 123.4567, 0.001, "heading with GL");
+    PASS();
+}
+
+/* ========================= Feed / line assembly tests ================ */
+
+static void test_feed_single_sentence(void)
+{
+    TEST("feed: single complete sentence with CRLF");
+    reset_gps();
+    mock_set_tick(5000);
+
+    const char *data = "$GNTHS,341.3344,A*1F\r\n";
+    um982_feed(&gps, (const uint8_t *)data, (uint16_t)strlen(data));
+
+    ASSERT_NEAR(gps.heading, 341.3344, 0.001, "heading");
+    PASS();
+}
+
+static void test_feed_multiple_sentences(void)
+{
+    TEST("feed: multiple sentences in one chunk");
+    reset_gps();
+    mock_set_tick(5000);
+
+    const char *data =
+        "$GNTHS,100.0000,A*18\r\n"
+        "$GNGGA,001043.00,4404.14036,N,12118.85961,W,1,12,0.98,1113.0,M,-21.3,M*47\r\n";
+    um982_feed(&gps, (const uint8_t *)data, (uint16_t)strlen(data));
+
+    ASSERT_NEAR(gps.heading, 100.0, 0.01, "heading from THS");
+    ASSERT_EQ_INT(gps.fix_quality, 1, "fix from GGA");
+    PASS();
+}
+
+static void test_feed_partial_then_complete(void)
+{
+    TEST("feed: partial bytes then complete");
+    reset_gps();
+    mock_set_tick(5000);
+
+    const char *part1 = "$GNTHS,200.";
+    const char *part2 = "5000,A*1E\r\n";
+    um982_feed(&gps, (const uint8_t *)part1, (uint16_t)strlen(part1));
+    /* Heading should not be set yet */
+    ASSERT_NAN(gps.heading, "should be NAN before complete");
+
+    um982_feed(&gps, (const uint8_t *)part2, (uint16_t)strlen(part2));
+    ASSERT_NEAR(gps.heading, 200.5, 0.01, "heading after complete");
+    PASS();
+}
+
+static void test_feed_bad_checksum_rejected(void)
+{
+    TEST("feed: bad checksum sentence is rejected");
+    reset_gps();
+    mock_set_tick(5000);
+
+    const char *data = "$GNTHS,999.0000,A*FF\r\n";
+    um982_feed(&gps, (const uint8_t *)data, (uint16_t)strlen(data));
+
+    ASSERT_NAN(gps.heading, "heading should remain NAN");
+    PASS();
+}
+
+static void test_feed_versiona_response(void)
+{
+    TEST("feed: VERSIONA response sets flag");
+    reset_gps();
+
+    const char *data = "#VERSIONA,79,GPS,FINE,2326,378237000,15434,0,18,889;\"UM982\"\r\n";
+    um982_feed(&gps, (const uint8_t *)data, (uint16_t)strlen(data));
+
+    ASSERT_TRUE(gps.version_received, "version_received should be true");
+    ASSERT_TRUE(gps.initialized, "VERSIONA should mark communication alive");
+    PASS();
+}
+
+/* ========================= Validity / age tests ====================== */
+
+static void test_heading_valid_within_timeout(void)
+{
+    TEST("validity: heading valid within timeout");
+    reset_gps();
+    mock_set_tick(10000);
+
+    um982_parse_sentence(&gps, "$GNTHS,341.3344,A*1F");
+
+    /* Still at tick 10000 */
+    ASSERT_TRUE(um982_is_heading_valid(&gps), "should be valid");
+    PASS();
+}
+
+static void test_heading_invalid_after_timeout(void)
+{
+    TEST("validity: heading invalid after 2s timeout");
+    reset_gps();
+    mock_set_tick(10000);
+
+    um982_parse_sentence(&gps, "$GNTHS,341.3344,A*1F");
+
+    /* Advance past timeout */
+    mock_set_tick(12500);
+    ASSERT_FALSE(um982_is_heading_valid(&gps), "should be invalid after 2.5s");
+    PASS();
+}
+
+static void test_heading_invalid_mode_v(void)
+{
+    TEST("validity: heading invalid with mode V");
+    reset_gps();
+    mock_set_tick(10000);
+
+    um982_parse_sentence(&gps, "$GNTHS,,V*10");
+
+    ASSERT_FALSE(um982_is_heading_valid(&gps), "mode V is invalid");
+    PASS();
+}
+
+static void test_position_valid(void)
+{
+    TEST("validity: position valid with fix quality 1");
+    reset_gps();
+    mock_set_tick(10000);
+
+    um982_parse_sentence(&gps,
+        "$GNGGA,001043.00,4404.14036,N,12118.85961,W,1,12,0.98,1113.0,M,-21.3,M*47");
+
+    ASSERT_TRUE(um982_is_position_valid(&gps), "should be valid");
+    PASS();
+}
+
+static void test_position_invalid_no_fix(void)
+{
+    TEST("validity: position invalid with no fix");
+    reset_gps();
+    mock_set_tick(10000);
+
+    um982_parse_sentence(&gps,
+        "$GNGGA,235959.00,,,,,0,00,99.99,,,,,,*79");
+
+    ASSERT_FALSE(um982_is_position_valid(&gps), "no fix = invalid");
+    PASS();
+}
+
+static void test_position_age_uses_last_valid_fix(void)
+{
+    TEST("age: position age uses last valid fix, not no-fix GGA");
+    reset_gps();
+
+    mock_set_tick(10000);
+    um982_parse_sentence(&gps,
+        "$GNGGA,001043.00,4404.14036,N,12118.85961,W,1,12,0.98,1113.0,M,-21.3,M*47");
+
+    mock_set_tick(12000);
+    um982_parse_sentence(&gps,
+        "$GNGGA,235959.00,,,,,0,00,99.99,,,,,,*79");
+
+    mock_set_tick(12500);
+    ASSERT_EQ_INT(um982_position_age(&gps), 2500, "age should still be from last valid fix");
+    ASSERT_FALSE(um982_is_position_valid(&gps), "latest no-fix GGA should invalidate position");
+    PASS();
+}
+
+static void test_heading_age(void)
+{
+    TEST("age: heading age computed correctly");
+    reset_gps();
+    mock_set_tick(10000);
+
+    um982_parse_sentence(&gps, "$GNTHS,341.3344,A*1F");
+
+    mock_set_tick(10500);
+    uint32_t age = um982_heading_age(&gps);
+    ASSERT_EQ_INT(age, 500, "age should be 500ms");
+    PASS();
+}
+
+/* ========================= Send command tests ======================== */
+
+static void test_send_command_appends_crlf(void)
+{
+    TEST("send_command: appends \\r\\n");
+    reset_gps();
+
+    um982_send_command(&gps, "GPGGA COM2 1");
+
+    /* Check that TX buffer contains "GPGGA COM2 1\r\n" */
+    const char *expected = "GPGGA COM2 1\r\n";
+    ASSERT_TRUE(mock_uart_tx_len == strlen(expected), "TX length");
+    ASSERT_TRUE(memcmp(mock_uart_tx_buf, expected, strlen(expected)) == 0,
+        "TX content should be 'GPGGA COM2 1\\r\\n'");
+    PASS();
+}
+
+static void test_send_command_null_safety(void)
+{
+    TEST("send_command: NULL gps returns false");
+    ASSERT_FALSE(um982_send_command(NULL, "RESET"), "should return false");
+    PASS();
+}
+
+/* ========================= Init sequence tests ======================= */
+
+static void test_init_sends_correct_commands(void)
+{
+    TEST("init: sends correct command sequence");
+    spy_reset();
+    mock_uart_tx_clear();
+
+    /* Pre-load VERSIONA response so init succeeds */
+    const char *ver_resp = "#VERSIONA,79,GPS,FINE,2326,378237000,15434,0,18,889;\"UM982\"\r\n";
+    mock_uart_rx_load(&huart5, (const uint8_t *)ver_resp, (uint16_t)strlen(ver_resp));
+
+    UM982_GPS_t init_gps;
+    bool ok = um982_init(&init_gps, &huart5, 50.0f, 3.0f);
+
+    ASSERT_TRUE(ok, "init should succeed");
+    ASSERT_TRUE(init_gps.initialized, "should be initialized");
+
+    /* Verify TX buffer contains expected commands */
+    const char *tx = (const char *)mock_uart_tx_buf;
+    ASSERT_TRUE(strstr(tx, "UNLOG\r\n") != NULL, "should send UNLOG");
+    ASSERT_TRUE(strstr(tx, "CONFIG HEADING FIXLENGTH\r\n") != NULL, "should send CONFIG HEADING");
+    ASSERT_TRUE(strstr(tx, "CONFIG HEADING LENGTH 50 3\r\n") != NULL, "should send LENGTH");
+    ASSERT_TRUE(strstr(tx, "GPGGA COM2 1\r\n") != NULL, "should enable GGA");
+    ASSERT_TRUE(strstr(tx, "GPRMC COM2 1\r\n") != NULL, "should enable RMC");
+    ASSERT_TRUE(strstr(tx, "GPTHS COM2 0.2\r\n") != NULL, "should enable THS at 5Hz");
+    ASSERT_TRUE(strstr(tx, "SAVECONFIG\r\n") == NULL, "should NOT save config (NVM wear)");
+    ASSERT_TRUE(strstr(tx, "VERSIONA\r\n") != NULL, "should query version");
+
+    /* Verify command order: UNLOG should come before GPGGA */
+    const char *unlog_pos = strstr(tx, "UNLOG\r\n");
+    const char *gpgga_pos = strstr(tx, "GPGGA COM2 1\r\n");
+    ASSERT_TRUE(unlog_pos < gpgga_pos, "UNLOG should precede GPGGA");
+
+    PASS();
+}
+
+static void test_init_no_baseline(void)
+{
+    TEST("init: baseline=0 skips LENGTH command");
+    spy_reset();
+    mock_uart_tx_clear();
+
+    const char *ver_resp = "#VERSIONA,79,GPS,FINE,2326,378237000,15434,0,18,889;\"UM982\"\r\n";
+    mock_uart_rx_load(&huart5, (const uint8_t *)ver_resp, (uint16_t)strlen(ver_resp));
+
+    UM982_GPS_t init_gps;
+    um982_init(&init_gps, &huart5, 0.0f, 0.0f);
+
+    const char *tx = (const char *)mock_uart_tx_buf;
+    ASSERT_TRUE(strstr(tx, "CONFIG HEADING LENGTH") == NULL, "should NOT send LENGTH");
+    PASS();
+}
+
+static void test_init_fails_no_version(void)
+{
+    TEST("init: fails if no VERSIONA response");
+    spy_reset();
+    mock_uart_tx_clear();
+
+    /* Don't load any RX data — init should timeout */
+    UM982_GPS_t init_gps;
+    bool ok = um982_init(&init_gps, &huart5, 50.0f, 3.0f);
+
+    ASSERT_FALSE(ok, "init should fail without version response");
+    ASSERT_FALSE(init_gps.initialized, "should not be initialized");
+    PASS();
+}
+
+static void test_nmea_traffic_sets_initialized_without_versiona(void)
+{
+    TEST("init state: supported NMEA traffic sets initialized");
+    reset_gps();
+
+    ASSERT_FALSE(gps.initialized, "should start uninitialized");
+    um982_parse_sentence(&gps, "$GNTHS,341.3344,A*1F");
+    ASSERT_TRUE(gps.initialized, "supported NMEA should mark communication alive");
+    PASS();
+}
+
+/* ========================= Edge case tests =========================== */
+
+static void test_empty_fields_handled(void)
+{
+    TEST("edge: GGA with empty lat/lon fields");
+    reset_gps();
+    gps.latitude = 99.99;
+    gps.longitude = 99.99;
+
+    /* GGA with empty position fields (no fix) */
+    um982_parse_sentence(&gps,
+        "$GNGGA,235959.00,,,,,0,00,99.99,,,,,,*79");
+
+    ASSERT_EQ_INT(gps.fix_quality, 0, "no fix");
+    /* Latitude/longitude should not be updated (fields are empty) */
+    ASSERT_NEAR(gps.latitude, 99.99, 0.01, "lat unchanged");
+    ASSERT_NEAR(gps.longitude, 99.99, 0.01, "lon unchanged");
+    PASS();
+}
+
+static void test_sentence_too_short(void)
+{
+    TEST("edge: sentence too short to have formatter");
+    reset_gps();
+    /* Should not crash */
+    um982_parse_sentence(&gps, "$GN");
+    um982_parse_sentence(&gps, "$");
+    um982_parse_sentence(&gps, "");
+    um982_parse_sentence(&gps, NULL);
+    PASS();
+}
+
+static void test_line_overflow(void)
+{
+    TEST("edge: oversized line is dropped");
+    reset_gps();
+
+    /* Create a line longer than UM982_LINE_BUF_SIZE */
+    char big[200];
+    memset(big, 'X', sizeof(big));
+    big[0] = '$';
+    big[198] = '\n';
+    big[199] = '\0';
+
+    um982_feed(&gps, (const uint8_t *)big, 199);
+    /* Should not crash, heading should still be NAN */
+    ASSERT_NAN(gps.heading, "no valid data from overflow");
+    PASS();
+}
+
+static void test_process_via_mock_uart(void)
+{
+    TEST("process: reads from mock UART RX buffer");
+    reset_gps();
+    mock_set_tick(5000);
+
+    /* Load data into mock UART RX */
+    const char *data = "$GNTHS,275.1234,D*18\r\n";
+    mock_uart_rx_load(&huart5, (const uint8_t *)data, (uint16_t)strlen(data));
+
+    /* Call process() which reads from UART */
+    um982_process(&gps);
+
+    ASSERT_NEAR(gps.heading, 275.1234, 0.001, "heading via process()");
+    ASSERT_EQ_INT(gps.heading_mode, 'D', "mode D");
+    PASS();
+}
+
+/* ========================= PR #68 bug regression tests =============== */
+
+/* These tests specifically verify the bugs found in the reverted PR #68 */
+
+static void test_regression_sentence_id_with_gn_prefix(void)
+{
+    TEST("regression: GN-prefixed GGA is correctly identified");
+    reset_gps();
+
+    /* PR #68 bug: strncmp(sentence, "GGA", 3) compared "GNG" vs "GGA" — never matched.
+     * Our fix: skip 2-char talker ID, compare at sentence+3. */
+    um982_parse_sentence(&gps,
+        "$GNGGA,001043.00,4404.14036,N,12118.85961,W,1,12,0.98,1113.0,M,-21.3,M*47");
+
+    ASSERT_EQ_INT(gps.fix_quality, 1, "GGA should parse with GN prefix");
+    ASSERT_NEAR(gps.latitude, 44.069006, 0.001, "latitude should be parsed");
+    PASS();
+}
+
+static void test_regression_longitude_3digit_degrees(void)
+{
+    TEST("regression: 3-digit longitude degrees parsed correctly");
+    reset_gps();
+
+    /* PR #68 bug: hardcoded 2-digit degrees for longitude.
+     * 12118.85961 should be 121° 18.85961' = 121.314327° */
+    um982_parse_sentence(&gps,
+        "$GNGGA,001043.00,4404.14036,N,12118.85961,W,1,12,0.98,1113.0,M,-21.3,M*47");
+
+    ASSERT_NEAR(gps.longitude, -(121.0 + 18.85961/60.0), 0.0001,
+        "longitude 121° should not be parsed as 12°");
+    ASSERT_TRUE(gps.longitude < -100.0, "longitude should be > 100 degrees");
+    PASS();
+}
+
+static void test_regression_hemisphere_no_ptr_corrupt(void)
+{
+    TEST("regression: hemisphere parsing doesn't corrupt field pointer");
+    reset_gps();
+
+    /* PR #68 bug: GGA/RMC hemisphere cases manually advanced ptr,
+     * desynchronizing from field counter. Our parser uses proper tokenizer. */
+    um982_parse_sentence(&gps,
+        "$GNGGA,001043.00,4404.14036,N,12118.85961,W,1,12,0.98,1113.0,M,-21.3,M*47");
+
+    /* After lat/lon, remaining fields should be correct */
+    ASSERT_EQ_INT(gps.num_satellites, 12, "sats after hemisphere");
+    ASSERT_NEAR(gps.hdop, 0.98, 0.01, "hdop after hemisphere");
+    ASSERT_NEAR(gps.altitude, 1113.0, 0.1, "altitude after hemisphere");
+    PASS();
+}
+
+static void test_regression_rmc_also_parsed(void)
+{
+    TEST("regression: RMC sentence is actually parsed (not dead code)");
+    reset_gps();
+
+    /* PR #68 bug: identifySentence never matched GGA/RMC, so position
+     * parsing was dead code. */
+    um982_parse_sentence(&gps,
+        "$GNRMC,001031.00,A,4404.13993,N,12118.86023,W,0.146,,100117,,,A*7B");
+
+    ASSERT_TRUE(gps.latitude > 44.0, "RMC lat should be parsed");
+    ASSERT_TRUE(gps.longitude < -121.0, "RMC lon should be parsed");
+    ASSERT_NEAR(gps.speed_knots, 0.146, 0.001, "RMC speed");
+    PASS();
+}
+
+/* ========================= Main ====================================== */
+
+int main(void)
+{
+    printf("=== UM982 GPS Driver Tests ===\n\n");
+
+    printf("--- Checksum ---\n");
+    test_checksum_valid();
+    test_checksum_valid_ths();
+    test_checksum_invalid();
+    test_checksum_missing_star();
+    test_checksum_null();
+    test_checksum_no_dollar();
+
+    printf("\n--- Coordinate Parsing ---\n");
+    test_coord_latitude_north();
+    test_coord_latitude_south();
+    test_coord_longitude_3digit();
+    test_coord_longitude_east();
+    test_coord_empty();
+    test_coord_null();
+    test_coord_no_dot();
+
+    printf("\n--- GGA Parsing ---\n");
+    test_parse_gga_full();
+    test_parse_gga_rtk_fixed();
+    test_parse_gga_no_fix();
+
+    printf("\n--- RMC Parsing ---\n");
+    test_parse_rmc_valid();
+    test_parse_rmc_void();
+
+    printf("\n--- THS Parsing ---\n");
+    test_parse_ths_autonomous();
+    test_parse_ths_not_valid();
+    test_parse_ths_zero();
+    test_parse_ths_360_boundary();
+
+    printf("\n--- VTG Parsing ---\n");
+    test_parse_vtg();
+
+    printf("\n--- Talker IDs ---\n");
+    test_talker_gp();
+    test_talker_gl();
+
+    printf("\n--- Feed / Line Assembly ---\n");
+    test_feed_single_sentence();
+    test_feed_multiple_sentences();
+    test_feed_partial_then_complete();
+    test_feed_bad_checksum_rejected();
+    test_feed_versiona_response();
+
+    printf("\n--- Validity / Age ---\n");
+    test_heading_valid_within_timeout();
+    test_heading_invalid_after_timeout();
+    test_heading_invalid_mode_v();
+    test_position_valid();
+    test_position_invalid_no_fix();
+    test_position_age_uses_last_valid_fix();
+    test_heading_age();
+
+    printf("\n--- Send Command ---\n");
+    test_send_command_appends_crlf();
+    test_send_command_null_safety();
+
+    printf("\n--- Init Sequence ---\n");
+    test_init_sends_correct_commands();
+    test_init_no_baseline();
+    test_init_fails_no_version();
+    test_nmea_traffic_sets_initialized_without_versiona();
+
+    printf("\n--- Edge Cases ---\n");
+    test_empty_fields_handled();
+    test_sentence_too_short();
+    test_line_overflow();
+    test_process_via_mock_uart();
+
+    printf("\n--- PR #68 Regression ---\n");
+    test_regression_sentence_id_with_gn_prefix();
+    test_regression_longitude_3digit_degrees();
+    test_regression_hemisphere_no_ptr_corrupt();
+    test_regression_rmc_also_parsed();
+
+    printf("\n===============================================\n");
+    printf("  Results: %d passed, %d failed (of %d total)\n",
+           tests_passed, tests_failed, tests_passed + tests_failed);
+    printf("===============================================\n");
+
+    return tests_failed > 0 ? 1 : 0;
+}

9_Firmware/9_2_FPGA/constraints/README.md

@@ -32,8 +32,8 @@ the `USB_MODE` parameter in `radar_system_top.v`:
 
 | USB_MODE | Interface | Bus Width | Speed | Board Target |
 |----------|-----------|-----------|-------|--------------|
-| 0 (default) | FT601 (USB 3.0) | 32-bit | 100 MHz | 200T premium dev board |
+| 0 | FT601 (USB 3.0) | 32-bit | 100 MHz | 200T premium dev board |
-| 1 | FT2232H (USB 2.0) | 8-bit | 60 MHz | 50T production board |
+| 1 (default) | FT2232H (USB 2.0) | 8-bit | 60 MHz | 50T production board |
 
 ### How USB_MODE Works
 
@@ -72,7 +72,8 @@ The parameter is set via a **wrapper module** that overrides the default:
   ```
 
 - **200T dev board**: `radar_system_top` is used directly as the top module.
-  `USB_MODE` defaults to `0` (FT601). No wrapper needed.
+  `USB_MODE` defaults to `1` (FT2232H) since production is the primary target.
+  Override with `.USB_MODE(0)` for FT601 builds.
 
 ### RTL Files by USB Interface
 
@@ -158,7 +159,7 @@ The build scripts automatically select the correct top module and constraints:
 
 You do NOT need to set `USB_MODE` manually. The top module selection handles it:
 - `radar_system_top_50t` forces `USB_MODE=1` internally
-- `radar_system_top` defaults to `USB_MODE=0`
+- `radar_system_top` defaults to `USB_MODE=1` (FT2232H, production default)
 
 ## How to Select Constraints in Vivado
 
@@ -190,9 +191,9 @@ read_xdc constraints/te0713_te0701_minimal.xdc
 | Target | Top module | USB_MODE | USB Interface | Notes |
 |--------|------------|----------|---------------|-------|
 | 50T Production (FTG256) | `radar_system_top_50t` | 1 | FT2232H (8-bit) | Wrapper sets USB_MODE=1, ties off FT601 |
-| 200T Dev (FBG484) | `radar_system_top` | 0 (default) | FT601 (32-bit) | No wrapper needed |
+| 200T Dev (FBG484) | `radar_system_top` | 0 (override) | FT601 (32-bit) | Build script overrides default USB_MODE=1 |
-| Trenz TE0712/TE0701 | `radar_system_top_te0712_dev` | 0 (default) | FT601 (32-bit) | Minimal bring-up wrapper |
+| Trenz TE0712/TE0701 | `radar_system_top_te0712_dev` | 0 (override) | FT601 (32-bit) | Minimal bring-up wrapper |
-| Trenz TE0713/TE0701 | `radar_system_top_te0713_dev` | 0 (default) | FT601 (32-bit) | Alternate SoM wrapper |
+| Trenz TE0713/TE0701 | `radar_system_top_te0713_dev` | 0 (override) | FT601 (32-bit) | Alternate SoM wrapper |
 
 ## Trenz Split Status
 

9_Firmware/9_2_FPGA/constraints/xc7a50t_ftg256.xdc

@@ -70,9 +70,10 @@ set_input_jitter [get_clocks clk_100m] 0.1
 # NOTE: The physical DAC (U3, AD9708) receives its clock directly from the
 #       AD9523 via a separate net (DAC_CLOCK), NOT from the FPGA. The FPGA
 #       uses this clock input for internal DAC data timing only. The RTL port
-#       `dac_clk` is an output that assigns clk_120m directly — it has no
+#       `dac_clk` is an RTL output that assigns clk_120m directly. It has no
-#       separate physical pin on this board and should be removed from the
+#       physical pin on the 50T board and is left unconnected here. The port
-#       RTL or left unconnected.
+#       CANNOT be removed from the RTL because the 200T board uses it with
+#       ODDR clock forwarding (pin H17, see xc7a200t_fbg484.xdc).
 # FIX: Moved from C13 (IO_L12N = N-type) to D13 (IO_L12P = P-type MRCC).
 #      Clock inputs must use the P-type pin of an MRCC pair (PLIO-9 DRC).
 set_property PACKAGE_PIN D13 [get_ports {clk_120m_dac}]
@@ -224,7 +225,7 @@ set_property IOSTANDARD LVCMOS33 [get_ports {stm32_mixers_enable}]
 
 # DIG_5 = H11, DIG_6 = G12, DIG_7 = H12 — FPGA→STM32 status outputs
 # DIG_5: AGC saturation flag (PD13 on STM32)
-# DIG_6: reserved (PD14)
+# DIG_6: AGC enable flag (PD14) — mirrors FPGA host_agc_enable to STM32
 # DIG_7: reserved (PD15)
 set_property PACKAGE_PIN H11 [get_ports {gpio_dig5}]
 set_property PACKAGE_PIN G12 [get_ports {gpio_dig6}]
@@ -332,6 +333,44 @@ set_property DRIVE 8 [get_ports {ft_data[*]}]
 
 # ft_clkout constrained above in CLOCK CONSTRAINTS section (C4, 60 MHz)
 
+# --------------------------------------------------------------------------
+# FT2232H Source-Synchronous Timing Constraints
+# --------------------------------------------------------------------------
+# FT2232H 245 Synchronous FIFO mode timing (60 MHz, period = 16.667 ns):
+#
+# FPGA Read Path (FT2232H drives data, FPGA samples):
+#   - Data valid before CLKOUT rising edge: t_vr(max) = 7.0 ns
+#   - Data hold after CLKOUT rising edge:   t_hr(min) = 0.0 ns
+#   - Input delay max = period - t_vr = 16.667 - 7.0 = 9.667 ns
+#   - Input delay min = t_hr = 0.0 ns
+#
+# FPGA Write Path (FPGA drives data, FT2232H samples):
+#   - Data setup before next CLKOUT rising: t_su = 5.0 ns
+#   - Data hold after CLKOUT rising:        t_hd = 0.0 ns
+#   - Output delay max = period - t_su = 16.667 - 5.0 = 11.667 ns
+#   - Output delay min = t_hd = 0.0 ns
+# --------------------------------------------------------------------------
+
+# Input delays: FT2232H → FPGA (data bus and status signals)
+set_input_delay -clock [get_clocks ft_clkout] -max 9.667 [get_ports {ft_data[*]}]
+set_input_delay -clock [get_clocks ft_clkout] -min 0.0   [get_ports {ft_data[*]}]
+set_input_delay -clock [get_clocks ft_clkout] -max 9.667 [get_ports {ft_rxf_n}]
+set_input_delay -clock [get_clocks ft_clkout] -min 0.0   [get_ports {ft_rxf_n}]
+set_input_delay -clock [get_clocks ft_clkout] -max 9.667 [get_ports {ft_txe_n}]
+set_input_delay -clock [get_clocks ft_clkout] -min 0.0   [get_ports {ft_txe_n}]
+
+# Output delays: FPGA → FT2232H (control strobes and data bus when writing)
+set_output_delay -clock [get_clocks ft_clkout] -max 11.667 [get_ports {ft_data[*]}]
+set_output_delay -clock [get_clocks ft_clkout] -min 0.0    [get_ports {ft_data[*]}]
+set_output_delay -clock [get_clocks ft_clkout] -max 11.667 [get_ports {ft_rd_n}]
+set_output_delay -clock [get_clocks ft_clkout] -min 0.0    [get_ports {ft_rd_n}]
+set_output_delay -clock [get_clocks ft_clkout] -max 11.667 [get_ports {ft_wr_n}]
+set_output_delay -clock [get_clocks ft_clkout] -min 0.0    [get_ports {ft_wr_n}]
+set_output_delay -clock [get_clocks ft_clkout] -max 11.667 [get_ports {ft_oe_n}]
+set_output_delay -clock [get_clocks ft_clkout] -min 0.0    [get_ports {ft_oe_n}]
+set_output_delay -clock [get_clocks ft_clkout] -max 11.667 [get_ports {ft_siwu}]
+set_output_delay -clock [get_clocks ft_clkout] -min 0.0    [get_ports {ft_siwu}]
+
 # ============================================================================
 # STATUS / DEBUG OUTPUTS — NO PHYSICAL CONNECTIONS
 # ============================================================================
@@ -418,10 +457,10 @@ set_property BITSTREAM.CONFIG.UNUSEDPIN Pullup [current_design]
 # 4. JTAG: FPGA_TCK (L7), FPGA_TDI (N7), FPGA_TDO (N8), FPGA_TMS (M7).
 #    Dedicated pins — no XDC constraints needed.
 #
-# 5. dac_clk port: The RTL top module declares `dac_clk` as an output, but
+# 5. dac_clk port: Not connected on the 50T board (DAC clocked directly from
-#    the physical board wires the DAC clock (AD9708 CLOCK pin) directly from
+#    AD9523). The RTL port exists for 200T board compatibility, where the FPGA
-#    the AD9523, not from the FPGA. This port should be removed from the RTL
+#    forwards the DAC clock via ODDR to pin H17 with generated clock and
-#    or left unconnected. It currently just assigns clk_120m_dac passthrough.
+#    timing constraints (see xc7a200t_fbg484.xdc). Do NOT remove from RTL.
 #
 # ============================================================================
 # END OF CONSTRAINTS

9_Firmware/9_2_FPGA/radar_receiver_final.v

@@ -11,8 +11,10 @@ module radar_receiver_final (
     input wire adc_dco_n,            // Data Clock Output N (400MHz LVDS)
 	 output wire adc_pwdn,
     
-    // Chirp counter from transmitter (for frame sync and matched filter)
+    // Chirp counter from transmitter (for matched filter indexing)
     input wire [5:0] chirp_counter,
+    // Frame-start pulse from transmitter (CDC-synchronized, 1 clk_100m cycle)
+    input wire tx_frame_start,
     
     output wire [31:0] doppler_output,
     output wire doppler_valid,
@@ -392,32 +394,31 @@ mti_canceller #(
     .mti_first_chirp(mti_first_chirp)
 );
 
-// ========== FRAME SYNC USING chirp_counter ==========
+// ========== FRAME SYNC FROM TRANSMITTER ==========
-reg [5:0] chirp_counter_prev;
+// [FPGA-001 FIXED] Use the authoritative new_chirp_frame signal from the
+// transmitter (via plfm_chirp_controller_enhanced), CDC-synchronized to
+// clk_100m in radar_system_top.  Previous code tried to derive frame
+// boundaries from chirp_counter == 0, but that counter comes from the
+// transmitter path (plfm_chirp_controller_enhanced) which does NOT wrap
+// at chirps_per_elev — it overflows to N and only wraps at 6-bit rollover
+// (64).  This caused frame pulses at half the expected rate for N=32.
+reg tx_frame_start_prev;
 reg new_frame_pulse;
 
 always @(posedge clk or negedge reset_n) begin
     if (!reset_n) begin
-        chirp_counter_prev <= 6'd0;
+        tx_frame_start_prev <= 1'b0;
         new_frame_pulse <= 1'b0;
     end else begin
-        // Default: no pulse
         new_frame_pulse <= 1'b0;
         
-        // Dynamic frame detection using host_chirps_per_elev.
+        // Edge detect: tx_frame_start is a toggle-CDC derived pulse that
-        // Detect frame boundary when chirp_counter changes AND is a
+        // may be 1 clock wide.  Capture rising edge for clean 1-cycle pulse.
-        // multiple of host_chirps_per_elev (0, N, 2N, 3N, ...).
+        if (tx_frame_start && !tx_frame_start_prev) begin
-        // Uses a modulo counter that resets at host_chirps_per_elev.
+            new_frame_pulse <= 1'b1;
-        if (chirp_counter != chirp_counter_prev) begin
-            if (chirp_counter == 6'd0 ||
-                chirp_counter == host_chirps_per_elev ||
-                chirp_counter == {host_chirps_per_elev, 1'b0}) begin
-                new_frame_pulse <= 1'b1;
-            end
         end
         
-        // Store previous value
+        tx_frame_start_prev <= tx_frame_start;
-        chirp_counter_prev <= chirp_counter;
     end
 end
 
@@ -483,14 +484,6 @@ always @(posedge clk or negedge reset_n) begin
             `endif
             chirps_in_current_frame <= 0;
         end
-        
-        // Monitor chirp counter pattern
-        if (chirp_counter != chirp_counter_prev) begin
-            `ifdef SIMULATION
-            $display("[TOP] chirp_counter: %0d ? %0d", 
-                     chirp_counter_prev, chirp_counter);
-            `endif
-        end
     end
 end
 

9_Firmware/9_2_FPGA/radar_system_top.v

@@ -130,7 +130,7 @@ module radar_system_top (
     // FPGA→STM32 GPIO outputs (DIG_5..DIG_7 on 50T board)
     // Used by STM32 outer AGC loop to read saturation state without USB polling.
     output wire gpio_dig5,          // DIG_5 (H11→PD13): AGC saturation flag (1=clipping detected)
-    output wire gpio_dig6,          // DIG_6 (G12→PD14): reserved (tied low)
+    output wire gpio_dig6,          // DIG_6 (G12→PD14): AGC enable flag (mirrors host_agc_enable)
     output wire gpio_dig7           // DIG_7 (H12→PD15): reserved (tied low)
 );
 
@@ -142,7 +142,7 @@ module radar_system_top (
 parameter USE_LONG_CHIRP = 1'b1;          // Default to long chirp
 parameter DOPPLER_ENABLE = 1'b1;           // Enable Doppler processing
 parameter USB_ENABLE = 1'b1;               // Enable USB data transfer
-parameter USB_MODE = 0;                    // 0=FT601 (32-bit, 200T), 1=FT2232H (8-bit, 50T)
+parameter USB_MODE = 1;                    // 0=FT601 (32-bit, 200T), 1=FT2232H (8-bit, 50T production default)
 
 // ============================================================================
 // INTERNAL SIGNALS
@@ -505,6 +505,8 @@ radar_receiver_final rx_inst (
     
     // Chirp counter from transmitter (CDC-synchronized from 120 MHz domain)
     .chirp_counter(tx_current_chirp_sync),
+    // Frame-start pulse from transmitter (CDC-synchronized toggle→pulse)
+    .tx_frame_start(tx_new_chirp_frame_sync),
     
     // ADC Physical Interface
     .adc_d_p(adc_d_p),
@@ -1035,9 +1037,11 @@ assign system_status = status_reg;
 // ============================================================================
 // DIG_5: AGC saturation flag — high when per-frame saturation_count > 0.
 //        STM32 reads PD13 to detect clipping and adjust ADAR1000 VGA gain.
-// DIG_6, DIG_7: Reserved (tied low for future use).
+// DIG_6: AGC enable flag — mirrors host_agc_enable so STM32 outer-loop AGC
+//        tracks the FPGA register as single source of truth.
+// DIG_7: Reserved (tied low for future use).
 assign gpio_dig5 = (rx_agc_saturation_count != 8'd0);
-assign gpio_dig6 = 1'b0;
+assign gpio_dig6 = host_agc_enable;
 assign gpio_dig7 = 1'b0;
 
 // ============================================================================

9_Firmware/9_2_FPGA/radar_system_top_te0713_umft601x_dev.v

@@ -138,7 +138,12 @@ usb_data_interface usb_inst (
     .status_range_mode(2'b01),
     .status_self_test_flags(5'b11111),
     .status_self_test_detail(8'hA5),
-    .status_self_test_busy(1'b0)
+    .status_self_test_busy(1'b0),
+    // AGC status: tie off with benign defaults (no AGC on dev board)
+    .status_agc_current_gain(4'd0),
+    .status_agc_peak_magnitude(8'd0),
+    .status_agc_saturation_count(8'd0),
+    .status_agc_enable(1'b0)
 );
 
 endmodule

9_Firmware/9_2_FPGA/run_regression.sh

@@ -70,6 +70,7 @@ PROD_RTL=(
     xfft_16.v
     fft_engine.v
     usb_data_interface.v
+    usb_data_interface_ft2232h.v
     edge_detector.v
     radar_mode_controller.v
     rx_gain_control.v
@@ -86,6 +87,33 @@ EXTRA_RTL=(
     frequency_matched_filter.v
 )
 
+# ---------------------------------------------------------------------------
+# Shared RTL file lists for integration / system tests
+# Centralised here so a new module only needs adding once.
+# ---------------------------------------------------------------------------
+
+# Receiver chain (used by golden generate/compare tests)
+RECEIVER_RTL=(
+    radar_receiver_final.v
+    radar_mode_controller.v
+    tb/ad9484_interface_400m_stub.v
+    ddc_400m.v nco_400m_enhanced.v cic_decimator_4x_enhanced.v
+    cdc_modules.v fir_lowpass.v ddc_input_interface.v
+    chirp_memory_loader_param.v latency_buffer.v
+    matched_filter_multi_segment.v matched_filter_processing_chain.v
+    range_bin_decimator.v doppler_processor.v xfft_16.v fft_engine.v
+    rx_gain_control.v mti_canceller.v
+)
+
+# Full system top (receiver chain + TX + USB + detection + self-test)
+SYSTEM_RTL=(
+    radar_system_top.v
+    radar_transmitter.v dac_interface_single.v plfm_chirp_controller.v
+    "${RECEIVER_RTL[@]}"
+    usb_data_interface.v usb_data_interface_ft2232h.v edge_detector.v
+    cfar_ca.v fpga_self_test.v
+)
+
 # ---- Layer A: iverilog -Wall compilation ----
 run_lint_iverilog() {
     local label="$1"
@@ -219,26 +247,9 @@ run_lint_static() {
         fi
     done
 
-    # --- Single-line regex checks across all production RTL ---
+    # CHECK 5 ($readmemh in synth code) and CHECK 6 (unused includes)
-    for f in "$@"; do
+    # require multi-line ifdef tracking / cross-file analysis. Not feasible
-        [[ -f "$f" ]] || continue
+    # with line-by-line regex. Omitted — use Vivado lint instead.
-        case "$f" in tb/*) continue ;; esac
-
-        local linenum=0
-        while IFS= read -r line; do
-            linenum=$((linenum + 1))
-
-            # CHECK 5: $readmemh / $readmemb in synthesizable code
-            # (Only valid in simulation blocks — flag if outside `ifdef SIMULATION)
-            # This is hard to check line-by-line without tracking ifdefs.
-            # Skip for v1.
-
-            # CHECK 6: Unused `include files (informational only)
-            # Skip for v1.
-
-            :  # placeholder — prevents empty loop body
-        done < "$f"
-    done
 
     if [[ "$err_count" -gt 0 ]]; then
         echo -e "${RED}FAIL${NC} ($err_count errors, $warn_count warnings)"
@@ -420,57 +431,36 @@ if [[ "$QUICK" -eq 0 ]]; then
     run_test "Receiver (golden generate)" \
         tb/tb_rx_golden_reg.vvp \
         -DGOLDEN_GENERATE \
-        tb/tb_radar_receiver_final.v radar_receiver_final.v \
+        tb/tb_radar_receiver_final.v "${RECEIVER_RTL[@]}"
-        radar_mode_controller.v tb/ad9484_interface_400m_stub.v \
-        ddc_400m.v nco_400m_enhanced.v cic_decimator_4x_enhanced.v \
-        cdc_modules.v fir_lowpass.v ddc_input_interface.v \
-        chirp_memory_loader_param.v latency_buffer.v \
-        matched_filter_multi_segment.v matched_filter_processing_chain.v \
-        range_bin_decimator.v doppler_processor.v xfft_16.v fft_engine.v \
-        rx_gain_control.v mti_canceller.v
 
     # Golden compare
     run_test "Receiver (golden compare)" \
         tb/tb_rx_compare_reg.vvp \
-        tb/tb_radar_receiver_final.v radar_receiver_final.v \
+        tb/tb_radar_receiver_final.v "${RECEIVER_RTL[@]}"
-        radar_mode_controller.v tb/ad9484_interface_400m_stub.v \
-        ddc_400m.v nco_400m_enhanced.v cic_decimator_4x_enhanced.v \
-        cdc_modules.v fir_lowpass.v ddc_input_interface.v \
-        chirp_memory_loader_param.v latency_buffer.v \
-        matched_filter_multi_segment.v matched_filter_processing_chain.v \
-        range_bin_decimator.v doppler_processor.v xfft_16.v fft_engine.v \
-        rx_gain_control.v mti_canceller.v
 
     # Full system top (monitoring-only, legacy)
     run_test "System Top (radar_system_tb)" \
         tb/tb_system_reg.vvp \
-        tb/radar_system_tb.v radar_system_top.v \
+        tb/radar_system_tb.v "${SYSTEM_RTL[@]}"
-        radar_transmitter.v dac_interface_single.v plfm_chirp_controller.v \
-        radar_receiver_final.v tb/ad9484_interface_400m_stub.v \
-        ddc_400m.v nco_400m_enhanced.v cic_decimator_4x_enhanced.v \
-        cdc_modules.v fir_lowpass.v ddc_input_interface.v \
-        chirp_memory_loader_param.v latency_buffer.v \
-        matched_filter_multi_segment.v matched_filter_processing_chain.v \
-        range_bin_decimator.v doppler_processor.v xfft_16.v fft_engine.v \
-        usb_data_interface.v edge_detector.v radar_mode_controller.v \
-        rx_gain_control.v cfar_ca.v mti_canceller.v fpga_self_test.v
 
     # E2E integration (46 strict checks: TX, RX, USB R/W, CDC, safety, reset)
     run_test "System E2E (tb_system_e2e)" \
         tb/tb_system_e2e_reg.vvp \
-        tb/tb_system_e2e.v radar_system_top.v \
+        tb/tb_system_e2e.v "${SYSTEM_RTL[@]}"
-        radar_transmitter.v dac_interface_single.v plfm_chirp_controller.v \
+
-        radar_receiver_final.v tb/ad9484_interface_400m_stub.v \
+    # USB_MODE=1 (FT2232H production) variants of system tests
-        ddc_400m.v nco_400m_enhanced.v cic_decimator_4x_enhanced.v \
+    run_test "System Top USB_MODE=1 (FT2232H)" \
-        cdc_modules.v fir_lowpass.v ddc_input_interface.v \
+        tb/tb_system_ft2232h_reg.vvp \
-        chirp_memory_loader_param.v latency_buffer.v \
+        -DUSB_MODE_1 \
-        matched_filter_multi_segment.v matched_filter_processing_chain.v \
+        tb/radar_system_tb.v "${SYSTEM_RTL[@]}"
-        range_bin_decimator.v doppler_processor.v xfft_16.v fft_engine.v \
+
-        usb_data_interface.v edge_detector.v radar_mode_controller.v \
+    run_test "System E2E USB_MODE=1 (FT2232H)" \
-        rx_gain_control.v cfar_ca.v mti_canceller.v fpga_self_test.v
+        tb/tb_system_e2e_ft2232h_reg.vvp \
+        -DUSB_MODE_1 \
+        tb/tb_system_e2e.v "${SYSTEM_RTL[@]}"
 else
     echo "  (skipped receiver golden + system top + E2E — use without --quick)"
-    SKIP=$((SKIP + 4))
+    SKIP=$((SKIP + 6))
 fi
 
 echo ""

9_Firmware/9_2_FPGA/scripts/200t/build_200t.tcl

@@ -108,6 +108,9 @@ add_files -fileset constrs_1 -norecurse [file join $project_root "constraints" "
 
 set_property top $top_module [current_fileset]
 set_property verilog_define {FFT_XPM_BRAM} [current_fileset]
+# Override USB_MODE to 0 (FT601) for 200T premium board.
+# The RTL default is USB_MODE=1 (FT2232H, production 50T).
+set_property generic {USB_MODE=0} [current_fileset]
 
 # ==============================================================================
 # 2. Synthesis

9_Firmware/9_2_FPGA/tb/cosim/fpga_model.py

@@ -291,9 +291,12 @@ class Mixer:
         Convert 8-bit unsigned ADC to 18-bit signed.
         RTL: adc_signed_w = {1'b0, adc_data, {9{1'b0}}} -
                             {1'b0, {8{1'b1}}, {9{1'b0}}} / 2
-        = (adc_data << 9) - (0xFF << 9) / 2
+
-        = (adc_data << 9) - (0xFF << 8)  [integer division]
+        Verilog '/' binds tighter than '-', so the division applies
-        = (adc_data << 9) - 0x7F80
+        only to the second concatenation:
+            {1'b0, 8'hFF, 9'b0} = 0x1FE00
+            0x1FE00 / 2 = 0xFF00 = 65280
+        Result: (adc_data << 9) - 0xFF00
         """
         adc_data_8bit = adc_data_8bit & 0xFF
         # {1'b0, adc_data, 9'b0} = adc_data << 9, zero-padded to 18 bits

9_Firmware/9_2_FPGA/tb/cosim/real_data/golden_reference.py

@@ -290,9 +290,9 @@ def run_ddc(adc_samples):
     for n in range(n_samples):
         # ADC sign conversion: RTL does offset binary → signed 18-bit
         # adc_signed_w = {1'b0, adc_data, 9'b0} - {1'b0, 8'hFF, 9'b0}/2
-        # Simplified: center around zero, scale to 18-bit
+        # Exact: (adc_val << 9) - 0xFF00, where 0xFF00 = {1'b0,8'hFF,9'b0}/2
         adc_val = int(adc_samples[n])
-        adc_signed = (adc_val - 128) << 9  # Approximate RTL sign conversion to 18-bit
+        adc_signed = (adc_val << 9) - 0xFF00  # Exact RTL: {1'b0,adc,9'b0} - {1'b0,8'hFF,9'b0}/2
         adc_signed = saturate(adc_signed, 18)
         
         # NCO lookup (ignoring dithering for golden reference)

9_Firmware/9_2_FPGA/tb/radar_system_tb.v

@@ -430,7 +430,13 @@ end
 // DUT INSTANTIATION
 // ============================================================================
 
-radar_system_top dut (
+radar_system_top #(
+`ifdef USB_MODE_1
+    .USB_MODE(1)  // FT2232H interface (production 50T board)
+`else
+    .USB_MODE(0)  // FT601 interface (200T dev board)
+`endif
+) dut (
     // System Clocks
     .clk_100m(clk_100m),
     .clk_120m_dac(clk_120m_dac),
@@ -619,7 +625,11 @@ initial begin
     // Optional: dump specific signals for debugging
     $dumpvars(1, dut.tx_inst);
     $dumpvars(1, dut.rx_inst);
+    `ifdef USB_MODE_1
+    $dumpvars(1, dut.gen_ft2232h.usb_inst);
+    `else
     $dumpvars(1, dut.gen_ft601.usb_inst);
+    `endif
 end
 
 endmodule

9_Firmware/9_2_FPGA/tb/tb_radar_receiver_final.v

@@ -96,15 +96,31 @@ end
 reg [5:0] chirp_counter;
 reg mc_new_chirp_prev;
 
+// Frame-start pulse: mirrors the real transmitter's new_chirp_frame signal.
+// In the real system this fires on IDLE→LONG_CHIRP transitions in the chirp
+// controller.  Here we derive it from the mode controller's chirp_count
+// wrapping back to 0 (which wraps correctly at cfg_chirps_per_elev).
+reg tx_frame_start;
+reg [5:0] rmc_chirp_prev;
+
 always @(posedge clk_100m or negedge reset_n) begin
     if (!reset_n) begin
         chirp_counter <= 6'd0;
         mc_new_chirp_prev <= 1'b0;
+        tx_frame_start <= 1'b0;
+        rmc_chirp_prev <= 6'd0;
     end else begin
         mc_new_chirp_prev <= dut.mc_new_chirp;
         if (dut.mc_new_chirp != mc_new_chirp_prev) begin
             chirp_counter <= chirp_counter + 1;
         end
+        
+        // Detect when the internal mode controller's chirp_count wraps to 0
+        tx_frame_start <= 1'b0;
+        if (dut.rmc_chirp_count == 6'd0 && rmc_chirp_prev != 6'd0) begin
+            tx_frame_start <= 1'b1;
+        end
+        rmc_chirp_prev <= dut.rmc_chirp_count;
     end
 end
 
@@ -128,6 +144,7 @@ radar_receiver_final dut (
     .adc_pwdn(),
 
     .chirp_counter(chirp_counter),
+    .tx_frame_start(tx_frame_start),
 
     .doppler_output(doppler_output),
     .doppler_valid(doppler_valid),

9_Firmware/9_2_FPGA/tb/tb_system_e2e.v

@@ -382,7 +382,13 @@ end
 // ============================================================================
 // DUT INSTANTIATION
 // ============================================================================
-radar_system_top dut (
+radar_system_top #(
+`ifdef USB_MODE_1
+    .USB_MODE(1)  // FT2232H interface (production 50T board)
+`else
+    .USB_MODE(0)  // FT601 interface (200T dev board)
+`endif
+) dut (
     .clk_100m(clk_100m),
     .clk_120m_dac(clk_120m_dac),
     .ft601_clk_in(ft601_clk_in),
@@ -554,10 +560,10 @@ initial begin
     do_reset;
 
     // CRITICAL: Configure stream control to range-only BEFORE any chirps
-    // fire. The USB write FSM blocks on doppler_valid_ft if doppler stream
+    // fire. The USB write FSM gates on pending flags: if doppler stream is
-    // is enabled but no Doppler data arrives (needs 32 chirps/frame).
+    // enabled but no Doppler data arrives (needs 32 chirps/frame), the FSM
-    // Without this, the write FSM deadlocks and the read FSM can never
+    // stays in IDLE waiting for doppler_data_pending. With the write FSM
-    // activate (it requires write FSM == IDLE).
+    // not in IDLE, the read FSM cannot activate (bus arbitration rule).
     bfm_send_cmd(8'h04, 8'h00, 16'h0001);  // stream_control = range only
     // Wait for stream_control CDC to propagate (2-stage sync in ft601_clk)
     // Must be long enough that stream_ctrl_sync_1 is updated before any
@@ -778,7 +784,7 @@ initial begin
 
     // Restore defaults for subsequent tests
     bfm_send_cmd(8'h01, 8'h00, 16'h0001);  // mode = auto-scan
-    bfm_send_cmd(8'h04, 8'h00, 16'h0001);  // keep range-only (prevents write FSM deadlock)
+    bfm_send_cmd(8'h04, 8'h00, 16'h0001);  // keep range-only (TB lacks 32-chirp doppler data)
     bfm_send_cmd(8'h10, 8'h00, 16'd3000);  // restore long chirp cycles
 
     $display("");
@@ -913,7 +919,7 @@ initial begin
     // Need to re-send configuration since reset clears all registers
     stm32_mixers_enable = 1;
     ft601_txe = 0;
-    bfm_send_cmd(8'h04, 8'h00, 16'h0001);  // stream_control = range only (prevent deadlock)
+    bfm_send_cmd(8'h04, 8'h00, 16'h0001);  // stream_control = range only (TB lacks doppler data)
     #500;  // Wait for stream_control CDC
     bfm_send_cmd(8'h01, 8'h00, 16'h0001);  // auto-scan
     bfm_send_cmd(8'h10, 8'h00, 16'd100);   // short timing
@@ -947,7 +953,7 @@ initial begin
     check(dut.host_stream_control == 3'b000,
           "G10.2: All streams disabled (stream_control = 3'b000)");
 
-    // G10.3: Re-enable range only (keep range-only to prevent write FSM deadlock)
+    // G10.3: Re-enable range only (TB uses range-only — no doppler processing)
     bfm_send_cmd(8'h04, 8'h00, 16'h0001);  // stream_control = 3'b001
     check(dut.host_stream_control == 3'b001,
           "G10.3: Range stream re-enabled (stream_control = 3'b001)");

9_Firmware/9_2_FPGA/tb/tb_usb_data_interface.v

@@ -6,15 +6,11 @@ module tb_usb_data_interface;
     localparam CLK_PERIOD     = 10.0;  // 100 MHz main clock
     localparam FT_CLK_PERIOD  = 10.0;  // 100 MHz FT601 clock (asynchronous)
 
-    // State definitions (mirror the DUT)
+    // State definitions (mirror the DUT — 4-state packed-word FSM)
-    localparam [2:0] S_IDLE           = 3'd0,
+    localparam [3:0] S_IDLE           = 4'd0,
-                     S_SEND_HEADER    = 3'd1,
+                     S_SEND_DATA_WORD = 4'd1,
-                     S_SEND_RANGE     = 3'd2,
+                     S_SEND_STATUS    = 4'd2,
-                     S_SEND_DOPPLER   = 3'd3,
+                     S_WAIT_ACK       = 4'd3;
-                     S_SEND_DETECT    = 3'd4,
-                     S_SEND_FOOTER    = 3'd5,
-                     S_WAIT_ACK       = 3'd6,
-                     S_SEND_STATUS    = 3'd7;  // Gap 2: status readback
 
     // ── Signals ────────────────────────────────────────────────
     reg         clk;
@@ -219,9 +215,9 @@ module tb_usb_data_interface;
         end
     endtask
 
-    // ── Helper: wait for DUT to reach a specific state ─────────
+    // ── Helper: wait for DUT to reach a specific write FSM state ──
     task wait_for_state;
-        input [2:0] target;
+        input [3:0] target;
         input integer max_cyc;
         integer cnt;
         begin
@@ -280,7 +276,7 @@ module tb_usb_data_interface;
     // Set data_pending flags directly via hierarchical access.
     // This is the standard TB technique for internal state setup —
     // bypasses the CDC path for immediate, reliable flag setting.
-    // Call BEFORE assert_range_valid in tests that need SEND_DOPPLER/DETECT.
+    // Call BEFORE assert_range_valid in tests that need doppler/cfar data.
     task preload_pending_data;
         begin
             @(posedge ft601_clk_in);
@@ -354,24 +350,26 @@ module tb_usb_data_interface;
         end
     endtask
 
-    // Drive a complete packet through the FSM by sequentially providing
+    // Drive a complete data packet through the new 3-word packed FSM.
-    // range, doppler (4x), and cfar valid pulses.
+    // Pre-loads pending flags, triggers range_valid, and waits for IDLE.
+    // With the new FSM, all data is pre-packed in IDLE then sent as 3 words.
     task drive_full_packet;
         input [31:0] rng;
         input [15:0] dr;
         input [15:0] di;
         input        det;
         begin
-            // Pre-load pending flags so FSM enters doppler/cfar states
+            // Set doppler/cfar captured values via CDC inputs
+            @(posedge clk);
+            doppler_real   = dr;
+            doppler_imag   = di;
+            cfar_detection = det;
+            @(posedge clk);
+            // Pre-load pending flags so FSM includes doppler/cfar in packet
             preload_pending_data;
+            // Trigger the packet
             assert_range_valid(rng);
-            wait_for_state(S_SEND_DOPPLER, 100);
+            // Wait for complete packet cycle: IDLE → SEND_DATA_WORD(×3) → WAIT_ACK → IDLE
-            pulse_doppler_once(dr, di);
-            pulse_doppler_once(dr, di);
-            pulse_doppler_once(dr, di);
-            pulse_doppler_once(dr, di);
-            wait_for_state(S_SEND_DETECT, 100);
-            pulse_cfar_once(det);
             wait_for_state(S_IDLE, 100);
         end
     endtask
@@ -414,101 +412,138 @@ module tb_usb_data_interface;
               "ft601_siwu_n=1 after reset");
 
         // ════════════════════════════════════════════════════════
-        // TEST GROUP 2: Range data packet
+        // TEST GROUP 2: Data packet word packing
         //
-        // Use backpressure to freeze the FSM at specific states
+        // New FSM packs 11-byte data into 3 × 32-bit words:
-        // so we can reliably sample outputs.
+        //   Word 0: {HEADER, range[31:24], range[23:16], range[15:8]}
+        //   Word 1: {range[7:0], dop_re_hi, dop_re_lo, dop_im_hi}
+        //   Word 2: {dop_im_lo, detection, FOOTER, 0x00}  BE=1110
+        //
+        // The DUT uses range_data_ready (1-cycle delayed range_valid_ft)
+        // to trigger packing.  Doppler/CFAR _cap registers must be
+        // pre-loaded via hierarchical access because no valid pulse is
+        // given in this test (we only want to verify packing, not CDC).
         // ════════════════════════════════════════════════════════
-        $display("\n--- Test Group 2: Range Data Packet ---");
+        $display("\n--- Test Group 2: Data Packet Word Packing ---");
         apply_reset;
+        ft601_txe = 1;  // Stall so we can inspect packed words
 
-        // Stall at SEND_HEADER so we can verify first range word later
+        // Set known doppler/cfar values on clk-domain inputs
-        ft601_txe = 1;
+        @(posedge clk);
+        doppler_real   = 16'hABCD;
+        doppler_imag   = 16'hEF01;
+        cfar_detection = 1'b1;
+        @(posedge clk);
+
+        // Pre-load pending flags AND captured-data registers directly.
+        // No doppler/cfar valid pulses are given, so the CDC capture path
+        // never fires — we must set the _cap registers via hierarchical
+        // access for the word-packing checks to be meaningful.
         preload_pending_data;
+        @(posedge ft601_clk_in);
+        uut.doppler_real_cap   = 16'hABCD;
+        uut.doppler_imag_cap   = 16'hEF01;
+        uut.cfar_detection_cap = 1'b1;
+        @(posedge ft601_clk_in);
+
         assert_range_valid(32'hDEAD_BEEF);
-        wait_for_state(S_SEND_HEADER, 50);
-        repeat (2) @(posedge ft601_clk_in); #1;
-        check(uut.current_state === S_SEND_HEADER,
-              "Stalled in SEND_HEADER (backpressure)");
 
-        // Release: FSM drives header then moves to SEND_RANGE_DATA
+        // FSM should be in SEND_DATA_WORD, stalled on ft601_txe=1
+        wait_for_state(S_SEND_DATA_WORD, 50);
+        repeat (2) @(posedge ft601_clk_in); #1;
+
+        check(uut.current_state === S_SEND_DATA_WORD,
+              "Stalled in SEND_DATA_WORD (backpressure)");
+
+        // Verify pre-packed words
+        // range_profile = 0xDEAD_BEEF → range[31:24]=0xDE, [23:16]=0xAD, [15:8]=0xBE, [7:0]=0xEF
+        // Word 0: {0xAA, 0xDE, 0xAD, 0xBE}
+        check(uut.data_pkt_word0 === {8'hAA, 8'hDE, 8'hAD, 8'hBE},
+              "Word 0: {HEADER=AA, range[31:8]}");
+        // Word 1: {0xEF, 0xAB, 0xCD, 0xEF}
+        check(uut.data_pkt_word1 === {8'hEF, 8'hAB, 8'hCD, 8'hEF},
+              "Word 1: {range[7:0], dop_re, dop_im_hi}");
+        // Word 2: {0x01, detection_byte, 0x55, 0x00}
+        // detection_byte bit 7 = frame_start (sample_counter==0 → 1), bit 0 = cfar=1
+        // so detection_byte = 8'b1000_0001 = 8'h81
+        check(uut.data_pkt_word2 === {8'h01, 8'h81, 8'h55, 8'h00},
+              "Word 2: {dop_im_lo, det=81, FOOTER=55, pad=00}");
+        check(uut.data_pkt_be2 === 4'b1110,
+              "Word 2 BE=1110 (3 valid bytes + 1 pad)");
+
+        // Release backpressure and verify word 0 appears on bus.
+        // On the first posedge with !ft601_txe the FSM drives word 0 and
+        // advances data_word_idx 0→1 via NBA.  After #1 the NBA has
+        // resolved, so we see idx=1 and ft601_data_out=word0.
         ft601_txe = 0;
         @(posedge ft601_clk_in); #1;
-        // Now the FSM registered the header output and will transition
-        // At the NEXT posedge the state becomes SEND_RANGE_DATA
-        @(posedge ft601_clk_in); #1;
-
-        check(uut.current_state === S_SEND_RANGE,
-              "Entered SEND_RANGE_DATA after header");
-
-        // The first range word should be on the data bus (byte_counter=0 just
-        // drove range_profile_cap, byte_counter incremented to 1)
-        check(uut.ft601_data_out === 32'hDEAD_BEEF || uut.byte_counter <= 8'd1,
-              "Range data word 0 driven (range_profile_cap)");
 
+        check(uut.ft601_data_out === {8'hAA, 8'hDE, 8'hAD, 8'hBE},
+              "Word 0 driven on data bus after backpressure release");
         check(ft601_wr_n === 1'b0,
-              "Write strobe active during range data");
+              "Write strobe active during SEND_DATA_WORD");
-
         check(ft601_be === 4'b1111,
-              "Byte enable=1111 for range data");
+              "Byte enable=1111 for word 0");
+        check(uut.ft601_data_oe === 1'b1,
+              "Data bus output enabled during SEND_DATA_WORD");
 
-        // Wait for all 4 range words to complete
+        // Next posedge: FSM drives word 1, advances idx 1→2.
-        wait_for_state(S_SEND_DOPPLER, 50);
+        // After NBA: idx=2, ft601_data_out=word1.
-        #1;
+        @(posedge ft601_clk_in); #1;
-        check(uut.current_state === S_SEND_DOPPLER,
+        check(uut.data_word_idx === 2'd2,
-              "Advanced to SEND_DOPPLER_DATA after 4 range words");
+              "data_word_idx advanced past word 1 (now 2)");
+        check(uut.ft601_data_out === {8'hEF, 8'hAB, 8'hCD, 8'hEF},
+              "Word 1 driven on data bus");
+        check(ft601_be === 4'b1111,
+              "Byte enable=1111 for word 1");
+
+        // Next posedge: FSM drives word 2, idx resets 2→0,
+        // and current_state transitions to WAIT_ACK.
+        @(posedge ft601_clk_in); #1;
+        check(uut.current_state === S_WAIT_ACK,
+              "Transitioned to WAIT_ACK after 3 data words");
+        check(uut.ft601_data_out === {8'h01, 8'h81, 8'h55, 8'h00},
+              "Word 2 driven on data bus");
+        check(ft601_be === 4'b1110,
+              "Byte enable=1110 for word 2 (last byte is pad)");
+
+        // Then back to IDLE
+        @(posedge ft601_clk_in); #1;
+        check(uut.current_state === S_IDLE,
+              "Returned to IDLE after WAIT_ACK");
 
         // ════════════════════════════════════════════════════════
-        // TEST GROUP 3: Header verification (stall to observe)
+        // TEST GROUP 3: Header and footer verification
         // ════════════════════════════════════════════════════════
-        $display("\n--- Test Group 3: Header Verification ---");
+        $display("\n--- Test Group 3: Header and Footer Verification ---");
         apply_reset;
-        ft601_txe = 1;  // Stall at SEND_HEADER
+        ft601_txe = 1;  // Stall to inspect
 
         @(posedge clk);
-        range_profile = 32'hCAFE_BABE;
+        doppler_real   = 16'h0000;
-        range_valid   = 1;
+        doppler_imag   = 16'h0000;
-        repeat (4) @(posedge ft601_clk_in);
+        cfar_detection = 1'b0;
         @(posedge clk);
-        range_valid = 0;
+        preload_pending_data;
-        repeat (3) @(posedge ft601_clk_in);
+        assert_range_valid(32'hCAFE_BABE);
 
-        wait_for_state(S_SEND_HEADER, 50);
+        wait_for_state(S_SEND_DATA_WORD, 50);
         repeat (2) @(posedge ft601_clk_in); #1;
 
-        check(uut.current_state === S_SEND_HEADER,
+        // Header is in byte 3 (MSB) of word 0
-              "Stalled in SEND_HEADER with backpressure");
+        check(uut.data_pkt_word0[31:24] === 8'hAA,
-
+              "Header byte 0xAA in word 0 MSB");
-        // Release backpressure - header will be latched at next posedge
+        // Footer is in byte 1 (bits [15:8]) of word 2
-        ft601_txe = 0;
+        check(uut.data_pkt_word2[15:8] === 8'h55,
-        @(posedge ft601_clk_in); #1;
+              "Footer byte 0x55 in word 2");
-
-        check(uut.ft601_data_out[7:0] === 8'hAA,
-              "Header byte 0xAA on data bus");
-        check(ft601_be === 4'b0001,
-              "Byte enable=0001 for header (lower byte only)");
-        check(ft601_wr_n === 1'b0,
-              "Write strobe active during header");
-        check(uut.ft601_data_oe === 1'b1,
-              "Data bus output enabled during header");
 
         // ════════════════════════════════════════════════════════
-        // TEST GROUP 4: Doppler data verification
+        // TEST GROUP 4: Doppler data capture verification
         // ════════════════════════════════════════════════════════
-        $display("\n--- Test Group 4: Doppler Data Verification ---");
+        $display("\n--- Test Group 4: Doppler Data Capture ---");
         apply_reset;
         ft601_txe = 0;
 
-        // Preload only doppler pending (not cfar) so the FSM sends
-        // doppler data. After doppler, SEND_DETECT sees cfar_data_pending=0
-        // and skips to SEND_FOOTER, then WAIT_ACK, then IDLE.
-        preload_doppler_pending;
-        assert_range_valid(32'h0000_0001);
-        wait_for_state(S_SEND_DOPPLER, 100);
-        #1;
-        check(uut.current_state === S_SEND_DOPPLER,
-              "Reached SEND_DOPPLER_DATA");
-
         // Provide doppler data via valid pulse (updates captured values)
         @(posedge clk);
         doppler_real  = 16'hAAAA;
@@ -524,110 +559,70 @@ module tb_usb_data_interface;
         check(uut.doppler_imag_cap === 16'h5555,
               "doppler_imag captured correctly");
 
-        // The FSM has doppler_data_pending set and sends 4 bytes, then
+        // Drive a packet with pending doppler + cfar (both needed for gating
-        // transitions past SEND_DETECT (cfar_data_pending=0) to IDLE.
+        // since all streams are enabled after reset/apply_reset).
+        preload_pending_data;
+        assert_range_valid(32'h0000_0001);
         wait_for_state(S_IDLE, 100);
         #1;
         check(uut.current_state === S_IDLE,
-              "Doppler done, packet completed");
+              "Packet completed with doppler data");
+        check(uut.doppler_data_pending === 1'b0,
+              "doppler_data_pending cleared after packet");
 
         // ════════════════════════════════════════════════════════
         // TEST GROUP 5: CFAR detection data
         // ════════════════════════════════════════════════════════
         $display("\n--- Test Group 5: CFAR Detection Data ---");
-        // Start a new packet with both doppler and cfar pending to verify
-        // cfar data is properly sent in SEND_DETECTION_DATA.
         apply_reset;
         ft601_txe = 0;
         preload_pending_data;
         assert_range_valid(32'h0000_0002);
-        // FSM races through: HEADER -> RANGE -> DOPPLER -> DETECT -> FOOTER -> IDLE
-        // All pending flags consumed proves SEND_DETECT was entered.
         wait_for_state(S_IDLE, 200);
         #1;
         check(uut.cfar_data_pending === 1'b0,
-              "Starting in SEND_DETECTION_DATA");
+              "cfar_data_pending cleared after packet");
-
-        // Verify the full packet completed with cfar data consumed
         check(uut.current_state === S_IDLE &&
               uut.doppler_data_pending === 1'b0 &&
               uut.cfar_data_pending === 1'b0,
-              "CFAR detection sent, FSM advanced past SEND_DETECTION_DATA");
+              "CFAR detection sent, all pending flags cleared");
 
         // ════════════════════════════════════════════════════════
-        // TEST GROUP 6: Footer check
+        // TEST GROUP 6: Footer retained after packet
-        //
-        // Strategy: drive packet with ft601_txe=0 all the way through.
-        // The SEND_FOOTER state is only active for 1 cycle, but we can
-        // poll the state machine at each ft601_clk_in edge to observe
-        // it. We use a monitor-style approach: run the packet and
-        // capture what ft601_data_out contains when we see SEND_FOOTER.
         // ════════════════════════════════════════════════════════
-        $display("\n--- Test Group 6: Footer Check ---");
+        $display("\n--- Test Group 6: Footer Retention ---");
         apply_reset;
         ft601_txe = 0;
 
-        // Drive packet through range data
+        @(posedge clk);
+        cfar_detection = 1'b1;
+        @(posedge clk);
         preload_pending_data;
         assert_range_valid(32'hFACE_FEED);
-        wait_for_state(S_SEND_DOPPLER, 100);
-        // Feed doppler data (need 4 pulses)
-        pulse_doppler_once(16'h1111, 16'h2222);
-        pulse_doppler_once(16'h1111, 16'h2222);
-        pulse_doppler_once(16'h1111, 16'h2222);
-        pulse_doppler_once(16'h1111, 16'h2222);
-        wait_for_state(S_SEND_DETECT, 100);
-        // Feed cfar data, but keep ft601_txe=0 so it flows through
-        pulse_cfar_once(1'b1);
-
-        // Now the FSM should pass through SEND_FOOTER quickly.
-        // Use wait_for_state to reach SEND_FOOTER, or it may already
-        // be at WAIT_ACK/IDLE. Let's catch WAIT_ACK or IDLE.
-        // The footer values are latched into registers, so we can
-        // verify them even after the state transitions.
-        // Key verification: the FOOTER constant (0x55) must have been
-        // driven. We check this by looking at the constant definition.
-        // Since we can't easily freeze the FSM at SEND_FOOTER without
-        // also stalling SEND_DETECTION_DATA (both check ft601_txe),
-        // we verify the footer indirectly:
-        // 1. The packet completed (reached IDLE/WAIT_ACK)
-        // 2. ft601_data_out last held 0x55 during SEND_FOOTER
-
         wait_for_state(S_IDLE, 100);
         #1;
-        // If we reached IDLE, the full sequence ran including footer
         check(uut.current_state === S_IDLE,
               "Full packet incl. footer completed, back in IDLE");
 
-        // The registered ft601_data_out should still hold 0x55 from
+        // The last word driven was word 2 which contains footer 0x55.
-        // SEND_FOOTER (WAIT_ACK and IDLE don't overwrite ft601_data_out).
+        // WAIT_ACK and IDLE don't overwrite ft601_data_out, so it retains
-        // Actually, looking at the DUT: WAIT_ACK only sets wr_n=1 and
+        // the last driven value.
-        // data_oe=0, it doesn't change ft601_data_out. So it retains 0x55.
+        check(uut.ft601_data_out[15:8] === 8'h55,
-        check(uut.ft601_data_out[7:0] === 8'h55,
+              "ft601_data_out retains footer 0x55 in word 2 position");
-              "ft601_data_out retains footer 0x55 after packet");
 
-        // Verify WAIT_ACK behavior by doing another packet and catching it
+        // Verify WAIT_ACK → IDLE transition
         apply_reset;
         ft601_txe = 0;
         preload_pending_data;
         assert_range_valid(32'h1234_5678);
-        wait_for_state(S_SEND_DOPPLER, 100);
-        pulse_doppler_once(16'hABCD, 16'hEF01);
-        pulse_doppler_once(16'hABCD, 16'hEF01);
-        pulse_doppler_once(16'hABCD, 16'hEF01);
-        pulse_doppler_once(16'hABCD, 16'hEF01);
-        wait_for_state(S_SEND_DETECT, 100);
-        pulse_cfar_once(1'b0);
-        // WAIT_ACK lasts exactly 1 ft601_clk_in cycle then goes IDLE.
-        // Poll for IDLE (which means WAIT_ACK already happened).
         wait_for_state(S_IDLE, 100);
         #1;
         check(uut.current_state === S_IDLE,
               "Returned to IDLE after WAIT_ACK");
         check(ft601_wr_n === 1'b1,
-              "ft601_wr_n deasserted in IDLE (was deasserted in WAIT_ACK)");
+              "ft601_wr_n deasserted in IDLE");
         check(uut.ft601_data_oe === 1'b0,
-              "Data bus released in IDLE (was released in WAIT_ACK)");
+              "Data bus released in IDLE");
 
         // ════════════════════════════════════════════════════════
         // TEST GROUP 7: Full packet sequence (end-to-end)
@@ -646,23 +641,24 @@ module tb_usb_data_interface;
         // ════════════════════════════════════════════════════════
         $display("\n--- Test Group 8: FIFO Backpressure ---");
         apply_reset;
-        ft601_txe = 1;
+        ft601_txe = 1;  // FIFO full — stall
 
+        preload_pending_data;
         assert_range_valid(32'hBBBB_CCCC);
 
-        wait_for_state(S_SEND_HEADER, 50);
+        wait_for_state(S_SEND_DATA_WORD, 50);
         repeat (10) @(posedge ft601_clk_in); #1;
 
-        check(uut.current_state === S_SEND_HEADER,
+        check(uut.current_state === S_SEND_DATA_WORD,
-              "Stalled in SEND_HEADER when ft601_txe=1 (FIFO full)");
+              "Stalled in SEND_DATA_WORD when ft601_txe=1 (FIFO full)");
         check(ft601_wr_n === 1'b1,
               "ft601_wr_n not asserted during backpressure stall");
 
         ft601_txe = 0;
-        repeat (2) @(posedge ft601_clk_in); #1;
+        repeat (6) @(posedge ft601_clk_in); #1;
 
-        check(uut.current_state !== S_SEND_HEADER,
+        check(uut.current_state === S_IDLE || uut.current_state === S_WAIT_ACK,
-              "Resumed from SEND_HEADER after backpressure released");
+              "Resumed and completed after backpressure released");
 
         // ════════════════════════════════════════════════════════
         // TEST GROUP 9: Clock divider
@@ -705,13 +701,6 @@ module tb_usb_data_interface;
         ft601_txe = 0;
         preload_pending_data;
         assert_range_valid(32'h1111_2222);
-        wait_for_state(S_SEND_DOPPLER, 100);
-        pulse_doppler_once(16'h3333, 16'h4444);
-        pulse_doppler_once(16'h3333, 16'h4444);
-        pulse_doppler_once(16'h3333, 16'h4444);
-        pulse_doppler_once(16'h3333, 16'h4444);
-        wait_for_state(S_SEND_DETECT, 100);
-        pulse_cfar_once(1'b0);
         wait_for_state(S_WAIT_ACK, 50);
         #1;
 
@@ -805,7 +794,7 @@ module tb_usb_data_interface;
         // Start a write packet
         preload_pending_data;
         assert_range_valid(32'hFACE_FEED);
-        wait_for_state(S_SEND_HEADER, 50);
+        wait_for_state(S_SEND_DATA_WORD, 50);
         @(posedge ft601_clk_in); #1;
 
         // While write FSM is active, assert RXF=0 (host has data)
@@ -818,13 +807,6 @@ module tb_usb_data_interface;
 
         // Deassert RXF, complete the write packet
         ft601_rxf = 1;
-        wait_for_state(S_SEND_DOPPLER, 100);
-        pulse_doppler_once(16'hAAAA, 16'hBBBB);
-        pulse_doppler_once(16'hAAAA, 16'hBBBB);
-        pulse_doppler_once(16'hAAAA, 16'hBBBB);
-        pulse_doppler_once(16'hAAAA, 16'hBBBB);
-        wait_for_state(S_SEND_DETECT, 100);
-        pulse_cfar_once(1'b1);
         wait_for_state(S_IDLE, 100);
         @(posedge ft601_clk_in); #1;
 
@@ -841,32 +823,42 @@ module tb_usb_data_interface;
         // ════════════════════════════════════════════════════════
         // TEST GROUP 15: Stream Control Gating (Gap 2)
         // Verify that disabling individual streams causes the write
-        // FSM to skip those data phases.
+        // FSM to zero those fields in the packed words.
         // ════════════════════════════════════════════════════════
         $display("\n--- Test Group 15: Stream Control Gating (Gap 2) ---");
 
         // 15a: Disable doppler stream (stream_control = 3'b101 = range + cfar only)
         apply_reset;
-        ft601_txe = 0;
+        ft601_txe = 1;  // Stall to inspect packed words
         stream_control = 3'b101;  // range + cfar, no doppler
         // Wait for CDC propagation (2-stage sync)
         repeat (6) @(posedge ft601_clk_in);
 
-        // Preload cfar pending so the FSM enters the SEND_DETECT data path
+        @(posedge clk);
-        // (without it, SEND_DETECT skips immediately on !cfar_data_pending).
+        doppler_real   = 16'hAAAA;
-        preload_cfar_pending;
+        doppler_imag   = 16'hBBBB;
-        // Drive range valid — triggers write FSM
+        cfar_detection = 1'b1;
-        assert_range_valid(32'hAA11_BB22);
+        @(posedge clk);
-        // FSM: IDLE -> SEND_HEADER -> SEND_RANGE (doppler disabled) -> SEND_DETECT -> FOOTER
-        // The FSM races through SEND_DETECT in 1 cycle (cfar_data_pending is consumed).
-        // Verify the packet completed correctly (doppler was skipped).
-        wait_for_state(S_IDLE, 200);
-        #1;
-        // Reaching IDLE proves: HEADER -> RANGE -> (skip DOPPLER) -> DETECT -> FOOTER -> ACK -> IDLE.
-        // cfar_data_pending consumed confirms SEND_DETECT was entered.
-        check(uut.current_state === S_IDLE && uut.cfar_data_pending === 1'b0,
-              "Stream gate: reached SEND_DETECT (range sent, doppler skipped)");
 
+        preload_cfar_pending;
+        assert_range_valid(32'hAA11_BB22);
+
+        wait_for_state(S_SEND_DATA_WORD, 200);
+        repeat (2) @(posedge ft601_clk_in); #1;
+
+        // With doppler disabled, doppler fields in words 1 and 2 should be zero
+        // Word 1: {range[7:0], 0x00, 0x00, 0x00} (doppler zeroed)
+        check(uut.data_pkt_word1[23:0] === 24'h000000,
+              "Stream gate: doppler bytes zeroed in word 1 when disabled");
+
+        // Word 2 byte 3 (dop_im_lo) should also be zero
+        check(uut.data_pkt_word2[31:24] === 8'h00,
+              "Stream gate: dop_im_lo zeroed in word 2 when disabled");
+
+        // Let it complete
+        ft601_txe = 0;
+        wait_for_state(S_IDLE, 100);
+        #1;
         check(uut.current_state === S_IDLE,
               "Stream gate: packet completed without doppler");
 
@@ -951,28 +943,6 @@ module tb_usb_data_interface;
               "Status readback: returned to IDLE after 8-word response");
 
         // Verify the status snapshot was captured correctly.
-        // status_words[0] = {0xFF, 3'b000, mode[1:0], 5'b0, stream_ctrl[2:0], cfar_threshold[15:0]}
-        // = {8'hFF, 3'b000, 2'b01, 5'b00000, 3'b101, 16'hABCD}
-        // = 0xFF_09_05_ABCD... let's compute:
-        // Byte 3: 0xFF = 8'hFF
-        // Byte 2: {3'b000, 2'b01} = 5'b00001 + 3 high bits of next field...
-        // Actually the packing is: {8'hFF, 3'b000, status_radar_mode[1:0], 5'b00000, status_stream_ctrl[2:0], status_cfar_threshold[15:0]}
-        // = {8'hFF, 3'b000, 2'b01, 5'b00000, 3'b101, 16'hABCD}
-        // = 8'hFF, 5'b00001, 8'b00000101, 16'hABCD
-        // = FF_09_05_ABCD? Let me compute carefully:
-        // Bits [31:24] = 8'hFF = 0xFF
-        // Bits [23:21] = 3'b000
-        // Bits [20:19] = 2'b01 (mode)
-        // Bits [18:14] = 5'b00000
-        // Bits [13:11] = 3'b101 (stream_ctrl)
-        // Bits [10:0]  = ... wait, cfar_threshold is 16 bits → [15:0]
-        // Total bits = 8+3+2+5+3+16 = 37 bits — won't fit in 32!
-        // Re-reading the RTL: the packing at line 241 is:
-        //   {8'hFF, 3'b000, status_radar_mode, 5'b00000, status_stream_ctrl, status_cfar_threshold}
-        //   = 8 + 3 + 2 + 5 + 3 + 16 = 37 bits
-        // This would be truncated to 32 bits. Let me re-read the actual RTL to check.
-        // For now, just verify status_words[1] (word index 1 in the packet = idx 2 in FSM)
-        // status_words[1] = {status_long_chirp, status_long_listen} = {16'd3000, 16'd13700}
         check(uut.status_words[1] === {16'd3000, 16'd13700},
               "Status readback: word 1 = {long_chirp, long_listen}");
         check(uut.status_words[2] === {16'd17540, 16'd50},

9_Firmware/9_2_FPGA/usb_data_interface.v

@@ -1,3 +1,17 @@
+/**
+ * usb_data_interface.v
+ *
+ * FT601 USB 3.0 SuperSpeed FIFO Interface (32-bit bus, 100 MHz ft601_clk).
+ * Used on the 200T premium dev board. Production 50T board uses
+ * usb_data_interface_ft2232h.v (FT2232H, 8-bit, 60 MHz) instead.
+ *
+ * USB disconnect recovery:
+ *   A clock-activity watchdog in the clk domain detects when ft601_clk_in
+ *   stops (USB cable unplugged). After ~0.65 ms of silence (65536 system
+ *   clocks) it asserts ft601_clk_lost, which is OR'd into the FT-domain
+ *   reset so FSMs and FIFOs return to a clean state. When ft601_clk_in
+ *   resumes, a 2-stage reset synchronizer deasserts the reset cleanly.
+ */
 module usb_data_interface (
     input wire clk,              // Main clock (100MHz recommended)
     input wire reset_n,
@@ -15,13 +29,18 @@ module usb_data_interface (
     // FT601 Interface (Slave FIFO mode)
     // Data bus
     inout wire [31:0] ft601_data,    // 32-bit bidirectional data bus
-    output reg [3:0] ft601_be,       // Byte enable (4 lanes for 32-bit mode)
+    output reg [3:0] ft601_be,       // Byte enable (active-HIGH per DS_FT600Q-FT601Q Table 3.2)
     
     // Control signals
-    output reg ft601_txe_n,          // Transmit enable (active low)
+    // VESTIGIAL OUTPUTS — kept for 200T board port compatibility.
-    output reg ft601_rxf_n,          // Receive enable (active low)
+    // On the 200T, these are constrained to physical pins G21 (TXE) and
-    input wire ft601_txe,             // TXE: Transmit FIFO Not Full (high = space available to write)
+    // G22 (RXF) in xc7a200t_fbg484.xdc. Removing them from the RTL would
-    input wire ft601_rxf,             // RXF: Receive FIFO Not Empty (high = data available to read)
+    // break the 200T build. They are reset to 1 and never driven; the
+    // actual FT601 flow-control inputs are ft601_txe and ft601_rxf below.
+    output reg ft601_txe_n,          // VESTIGIAL: unused output, always 1
+    output reg ft601_rxf_n,          // VESTIGIAL: unused output, always 1
+    input wire ft601_txe,             // TXE: Transmit FIFO Not Full (active-low: 0 = space available)
+    input wire ft601_rxf,             // RXF: Receive FIFO Not Empty (active-low: 0 = data available)
     output reg ft601_wr_n,            // Write strobe (active low)
     output reg ft601_rd_n,            // Read strobe (active low)
     output reg ft601_oe_n,            // Output enable (active low)
@@ -97,21 +116,26 @@ localparam FT601_BURST_SIZE = 512;    // Max burst size in bytes
 // ============================================================================
 // WRITE FSM State definitions (Verilog-2001 compatible)
 // ============================================================================
-localparam [2:0] IDLE                = 3'd0,
+// Rewritten: data packet is now 3 x 32-bit writes (11 payload bytes + 1 pad).
-                 SEND_HEADER         = 3'd1,
+// Word 0: {HEADER, range[31:24], range[23:16], range[15:8]}  BE=1111
-                 SEND_RANGE_DATA     = 3'd2,
+// Word 1: {range[7:0], doppler_real[15:8], doppler_real[7:0], doppler_imag[15:8]} BE=1111
-                 SEND_DOPPLER_DATA   = 3'd3,
+// Word 2: {doppler_imag[7:0], detection, FOOTER, 8'h00}      BE=1110
-                 SEND_DETECTION_DATA = 3'd4,
+localparam [3:0] IDLE                = 4'd0,
-                 SEND_FOOTER         = 3'd5,
+                 SEND_DATA_WORD      = 4'd1,
-                 WAIT_ACK            = 3'd6,
+                 SEND_STATUS         = 4'd2,
-                 SEND_STATUS         = 3'd7;  // Gap 2: status readback
+                 WAIT_ACK            = 4'd3;
 
-reg [2:0] current_state;
+reg [3:0] current_state;
-reg [7:0] byte_counter;
+reg [1:0] data_word_idx;     // 0..2 for 3-word data packet
-reg [31:0] data_buffer;
 reg [31:0] ft601_data_out;
 reg ft601_data_oe;  // Output enable for bidirectional data bus
 
+// Pre-packed data words (registered snapshot of CDC'd data)
+reg [31:0] data_pkt_word0;
+reg [31:0] data_pkt_word1;
+reg [31:0] data_pkt_word2;
+reg [3:0]  data_pkt_be2;     // BE for last word (BE=1110 since byte 3 is pad)
+
 // ============================================================================
 // READ FSM State definitions (Gap 4: USB Read Path)
 // ============================================================================
@@ -184,6 +208,67 @@ always @(posedge clk or negedge reset_n) begin
     end
 end
 
+// ============================================================================
+// CLOCK-ACTIVITY WATCHDOG (clk domain)
+// ============================================================================
+// Detects when ft601_clk_in stops (USB cable unplugged). A toggle register
+// in the ft601_clk domain flips every edge. The clk domain synchronizes it
+// and checks for transitions. If no transition is seen for 2^16 = 65536
+// clk cycles (~0.65 ms at 100 MHz), ft601_clk_lost asserts.
+
+// Toggle register: flips every ft601_clk edge (ft601_clk domain)
+reg ft601_heartbeat;
+always @(posedge ft601_clk_in or negedge ft601_reset_n) begin
+    if (!ft601_reset_n)
+        ft601_heartbeat <= 1'b0;
+    else
+        ft601_heartbeat <= ~ft601_heartbeat;
+end
+
+// Synchronize heartbeat into clk domain (2-stage)
+(* ASYNC_REG = "TRUE" *) reg [1:0] ft601_hb_sync;
+reg ft601_hb_prev;
+reg [15:0] ft601_clk_timeout;
+reg ft601_clk_lost;
+
+always @(posedge clk or negedge reset_n) begin
+    if (!reset_n) begin
+        ft601_hb_sync    <= 2'b00;
+        ft601_hb_prev    <= 1'b0;
+        ft601_clk_timeout <= 16'd0;
+        ft601_clk_lost   <= 1'b0;
+    end else begin
+        ft601_hb_sync <= {ft601_hb_sync[0], ft601_heartbeat};
+        ft601_hb_prev <= ft601_hb_sync[1];
+
+        if (ft601_hb_sync[1] != ft601_hb_prev) begin
+            // ft601_clk is alive — reset counter, clear lost flag
+            ft601_clk_timeout <= 16'd0;
+            ft601_clk_lost    <= 1'b0;
+        end else if (!ft601_clk_lost) begin
+            if (ft601_clk_timeout == 16'hFFFF)
+                ft601_clk_lost <= 1'b1;
+            else
+                ft601_clk_timeout <= ft601_clk_timeout + 16'd1;
+        end
+    end
+end
+
+// Effective FT601-domain reset: asserted by global reset OR clock loss.
+// Deassertion synchronized to ft601_clk via 2-stage sync to avoid
+// metastability on the recovery edge.
+(* ASYNC_REG = "TRUE" *) reg [1:0] ft601_reset_sync;
+wire ft601_reset_raw_n = ft601_reset_n & ~ft601_clk_lost;
+
+always @(posedge ft601_clk_in or negedge ft601_reset_raw_n) begin
+    if (!ft601_reset_raw_n)
+        ft601_reset_sync <= 2'b00;
+    else
+        ft601_reset_sync <= {ft601_reset_sync[0], 1'b1};
+end
+
+wire ft601_effective_reset_n = ft601_reset_sync[1];
+
 // FT601-domain captured data (sampled from holding regs on sync'd edge)
 reg [31:0] range_profile_cap;
 reg [15:0] doppler_real_cap;
@@ -197,6 +282,18 @@ reg cfar_detection_cap;
 reg doppler_data_pending;
 reg cfar_data_pending;
 
+// 1-cycle delayed range trigger.  range_valid_ft fires on the same clock
+// edge that range_profile_cap is captured (non-blocking).  If the FSM
+// reads range_profile_cap on that same edge it sees the STALE value.
+// Delaying the trigger by one cycle guarantees the capture register has
+// settled before the FSM packs the data words.
+reg range_data_ready;
+
+// Frame sync: sample counter (ft601_clk domain, wraps at NUM_CELLS)
+// Bit 7 of detection byte is set when sample_counter == 0 (frame start).
+localparam [11:0] NUM_CELLS = 12'd2048;  // 64 range x 32 doppler
+reg [11:0] sample_counter;
+
 // Gap 2: CDC for stream_control (clk_100m -> ft601_clk_in)
 // stream_control changes infrequently (only on host USB command), so
 // per-bit 2-stage synchronizers are sufficient. No Gray coding needed
@@ -228,8 +325,8 @@ wire range_valid_ft;
 wire doppler_valid_ft;
 wire cfar_valid_ft;
 
-always @(posedge ft601_clk_in or negedge ft601_reset_n) begin
+always @(posedge ft601_clk_in or negedge ft601_effective_reset_n) begin
-    if (!ft601_reset_n) begin
+    if (!ft601_effective_reset_n) begin
         range_valid_sync   <= 2'b00;
         doppler_valid_sync <= 2'b00;
         cfar_valid_sync    <= 2'b00;
@@ -240,6 +337,7 @@ always @(posedge ft601_clk_in or negedge ft601_reset_n) begin
         doppler_real_cap   <= 16'd0;
         doppler_imag_cap   <= 16'd0;
         cfar_detection_cap <= 1'b0;
+        range_data_ready   <= 1'b0;
         // Fix #5: Default to range-only on reset (prevents write FSM deadlock)
         stream_ctrl_sync_0 <= 3'b001;
         stream_ctrl_sync_1 <= 3'b001;
@@ -276,7 +374,7 @@ always @(posedge ft601_clk_in or negedge ft601_reset_n) begin
             // Word 4: AGC metrics + range_mode
             status_words[4] <= {status_agc_current_gain,        // [31:28]
                                 status_agc_peak_magnitude,      // [27:20]
-                                status_agc_saturation_count,    // [19:12]
+                                status_agc_saturation_count,    // [19:12] 8-bit saturation count
                                 status_agc_enable,              // [11]
                                 9'd0,                           // [10:2] reserved
                                 status_range_mode};             // [1:0]
@@ -302,6 +400,10 @@ always @(posedge ft601_clk_in or negedge ft601_reset_n) begin
         if (cfar_valid_sync[1] && !cfar_valid_sync_d) begin
             cfar_detection_cap <= cfar_detection_hold;
         end
+
+        // 1-cycle delayed trigger: ensures range_profile_cap has settled
+        // before the FSM reads it for word packing.
+        range_data_ready <= range_valid_ft;
     end
 end
 
@@ -314,11 +416,11 @@ assign cfar_valid_ft    = cfar_valid_sync[1]     && !cfar_valid_sync_d;
 // FT601 data bus direction control
 assign ft601_data = ft601_data_oe ? ft601_data_out : 32'hzzzz_zzzz;
 
-always @(posedge ft601_clk_in or negedge ft601_reset_n) begin
+always @(posedge ft601_clk_in or negedge ft601_effective_reset_n) begin
-    if (!ft601_reset_n) begin
+    if (!ft601_effective_reset_n) begin
         current_state <= IDLE;
         read_state <= RD_IDLE;
-        byte_counter <= 0;
+        data_word_idx <= 2'd0;
         ft601_data_out <= 0;
         ft601_data_oe <= 0;
         ft601_be <= 4'b1111;  // All bytes enabled for 32-bit mode
@@ -336,6 +438,11 @@ always @(posedge ft601_clk_in or negedge ft601_reset_n) begin
         cmd_value <= 16'd0;
         doppler_data_pending <= 1'b0;
         cfar_data_pending <= 1'b0;
+        data_pkt_word0 <= 32'd0;
+        data_pkt_word1 <= 32'd0;
+        data_pkt_word2 <= 32'd0;
+        data_pkt_be2   <= 4'b1110;
+        sample_counter <= 12'd0;
         // NOTE: ft601_clk_out is driven by the clk-domain always block below.
         // Do NOT assign it here (ft601_clk_in domain) — causes multi-driven net.
     end else begin
@@ -424,124 +531,66 @@ always @(posedge ft601_clk_in or negedge ft601_reset_n) begin
                         current_state <= SEND_STATUS;
                         status_word_idx <= 3'd0;
                     end
-                    // Trigger write FSM on range_valid edge (primary data source).
+                    // Trigger on range_data_ready (1 cycle after range_valid_ft)
-                    // Doppler/cfar data_pending flags are checked inside
+                    // so that range_profile_cap has settled from the CDC block.
-                    // SEND_DOPPLER_DATA and SEND_DETECTION_DATA to skip or send.
+                    // Gate on pending flags: only send when all enabled
-                    // Do NOT trigger on pending flags alone — they're sticky and
+                    // streams have fresh data (avoids stale doppler/CFAR)
-                    // would cause repeated packet starts without new range data.
+                    else if (range_data_ready && stream_range_en
-                    else if (range_valid_ft && stream_range_en) begin
+                             && (!stream_doppler_en || doppler_data_pending)
+                             && (!stream_cfar_en    || cfar_data_pending)) begin
                         // Don't start write if a read is about to begin
                         if (ft601_rxf) begin  // rxf=1 means no host data pending
-                            current_state <= SEND_HEADER;
+                            // Pack 11-byte data packet into 3 x 32-bit words
-                            byte_counter <= 0;
+                            // Doppler fields zeroed when stream disabled
+                            // CFAR field zeroed when stream disabled
+                            data_pkt_word0 <= {HEADER,
+                                               range_profile_cap[31:24],
+                                               range_profile_cap[23:16],
+                                               range_profile_cap[15:8]};
+                            data_pkt_word1 <= {range_profile_cap[7:0],
+                                               stream_doppler_en ? doppler_real_cap[15:8] : 8'd0,
+                                               stream_doppler_en ? doppler_real_cap[7:0]  : 8'd0,
+                                               stream_doppler_en ? doppler_imag_cap[15:8] : 8'd0};
+                            data_pkt_word2 <= {stream_doppler_en ? doppler_imag_cap[7:0]  : 8'd0,
+                                               stream_cfar_en
+                                                    ? {(sample_counter == 12'd0), 6'b0, cfar_detection_cap}
+                                                    : {(sample_counter == 12'd0), 7'd0},
+                                               FOOTER,
+                                               8'h00};  // pad byte
+                            data_pkt_be2   <= 4'b1110;   // 3 valid bytes + 1 pad
+                            data_word_idx  <= 2'd0;
+                            current_state  <= SEND_DATA_WORD;
                         end
                     end
                 end
-                
+
-                SEND_HEADER: begin
+                SEND_DATA_WORD: begin
-                    if (!ft601_txe) begin  // FT601 TX FIFO not empty
-                        ft601_data_oe <= 1;
-                        ft601_data_out <= {24'b0, HEADER};
-                        ft601_be <= 4'b0001;  // Only lower byte valid
-                        ft601_wr_n <= 0;     // Assert write strobe
-                        // Gap 2: skip to first enabled stream
-                        if (stream_range_en)
-                            current_state <= SEND_RANGE_DATA;
-                        else if (stream_doppler_en)
-                            current_state <= SEND_DOPPLER_DATA;
-                        else if (stream_cfar_en)
-                            current_state <= SEND_DETECTION_DATA;
-                        else
-                            current_state <= SEND_FOOTER;  // No streams — send footer only
-                    end
-                end
-                
-                SEND_RANGE_DATA: begin
                     if (!ft601_txe) begin
                         ft601_data_oe <= 1;
-                        ft601_be <= 4'b1111;  // All bytes valid for 32-bit word
+                        ft601_wr_n <= 0;
-                        
+                        case (data_word_idx)
-                        case (byte_counter)
+                            2'd0: begin
-                            0: ft601_data_out <= range_profile_cap;
+                                ft601_data_out <= data_pkt_word0;
-                            1: ft601_data_out <= {range_profile_cap[23:0], 8'h00};
+                                ft601_be <= 4'b1111;
-                            2: ft601_data_out <= {range_profile_cap[15:0], 16'h0000};
+                            end
-                            3: ft601_data_out <= {range_profile_cap[7:0], 24'h000000};
+                            2'd1: begin
+                                ft601_data_out <= data_pkt_word1;
+                                ft601_be <= 4'b1111;
+                            end
+                            2'd2: begin
+                                ft601_data_out <= data_pkt_word2;
+                                ft601_be <= data_pkt_be2;
+                            end
+                            default: ;
                         endcase
-                        
+                        if (data_word_idx == 2'd2) begin
-                        ft601_wr_n <= 0;
+                            data_word_idx <= 2'd0;
-                        
+                            current_state <= WAIT_ACK;
-                        if (byte_counter == 3) begin
-                            byte_counter <= 0;
-                            // Gap 2: skip disabled streams
-                            if (stream_doppler_en)
-                                current_state <= SEND_DOPPLER_DATA;
-                            else if (stream_cfar_en)
-                                current_state <= SEND_DETECTION_DATA;
-                            else
-                                current_state <= SEND_FOOTER;
                         end else begin
-                            byte_counter <= byte_counter + 1;
+                            data_word_idx <= data_word_idx + 2'd1;
                         end
                     end
                 end
-                
-                SEND_DOPPLER_DATA: begin
-                    if (!ft601_txe && doppler_data_pending) begin
-                        ft601_data_oe <= 1;
-                        ft601_be <= 4'b1111;
-                        
-                        case (byte_counter)
-                            0: ft601_data_out <= {doppler_real_cap, doppler_imag_cap};
-                            1: ft601_data_out <= {doppler_imag_cap, doppler_real_cap[15:8], 8'h00};
-                            2: ft601_data_out <= {doppler_real_cap[7:0], doppler_imag_cap[15:8], 16'h0000};
-                            3: ft601_data_out <= {doppler_imag_cap[7:0], 24'h000000};
-                        endcase
-                        
-                        ft601_wr_n <= 0;
-                        
-                        if (byte_counter == 3) begin
-                            byte_counter <= 0;
-                            doppler_data_pending <= 1'b0;
-                            if (stream_cfar_en)
-                                current_state <= SEND_DETECTION_DATA;
-                            else
-                                current_state <= SEND_FOOTER;
-                        end else begin
-                            byte_counter <= byte_counter + 1;
-                        end
-                    end else if (!doppler_data_pending) begin
-                        // No doppler data available yet — skip to next stream
-                        byte_counter <= 0;
-                        if (stream_cfar_en)
-                            current_state <= SEND_DETECTION_DATA;
-                        else
-                            current_state <= SEND_FOOTER;
-                    end
-                end
-                
-                SEND_DETECTION_DATA: begin
-                    if (!ft601_txe && cfar_data_pending) begin
-                        ft601_data_oe <= 1;
-                        ft601_be <= 4'b0001;
-                        ft601_data_out <= {24'b0, 7'b0, cfar_detection_cap};
-                        ft601_wr_n <= 0;
-                        cfar_data_pending <= 1'b0;
-                        current_state <= SEND_FOOTER;
-                    end else if (!cfar_data_pending) begin
-                        // No CFAR data available yet — skip to footer
-                        current_state <= SEND_FOOTER;
-                    end
-                end
-                
-                SEND_FOOTER: begin
-                    if (!ft601_txe) begin
-                        ft601_data_oe <= 1;
-                        ft601_be <= 4'b0001;
-                        ft601_data_out <= {24'b0, FOOTER};
-                        ft601_wr_n <= 0;
-                        current_state <= WAIT_ACK;
-                    end
-                end
 
                 // Gap 2: Status readback — send 6 x 32-bit status words
                 // Format: HEADER, status_words[0..5], FOOTER
@@ -581,6 +630,14 @@ always @(posedge ft601_clk_in or negedge ft601_reset_n) begin
                 WAIT_ACK: begin
                     ft601_wr_n <= 1;
                     ft601_data_oe <= 0;  // Release data bus
+                    // Clear pending flags — data consumed
+                    doppler_data_pending <= 1'b0;
+                    cfar_data_pending    <= 1'b0;
+                    // Advance frame sync counter
+                    if (sample_counter == NUM_CELLS - 12'd1)
+                        sample_counter <= 12'd0;
+                    else
+                        sample_counter <= sample_counter + 12'd1;
                     current_state <= IDLE;
                 end
             endcase
@@ -613,8 +670,8 @@ ODDR #(
 `else
 // Simulation: behavioral clock forwarding
 reg ft601_clk_out_sim;
-always @(posedge ft601_clk_in or negedge ft601_reset_n) begin
+always @(posedge ft601_clk_in or negedge ft601_effective_reset_n) begin
-    if (!ft601_reset_n)
+    if (!ft601_effective_reset_n)
         ft601_clk_out_sim <= 1'b0;
     else
         ft601_clk_out_sim <= 1'b1;

9_Firmware/9_2_FPGA/usb_data_interface_ft2232h.v

@@ -36,6 +36,13 @@
  * Clock domains:
  *   clk       = 100 MHz system clock (radar data domain)
  *   ft_clk    = 60 MHz from FT2232H CLKOUT (USB FIFO domain)
+ *
+ * USB disconnect recovery:
+ *   A clock-activity watchdog in the clk domain detects when ft_clk stops
+ *   (USB cable unplugged). After ~0.65 ms of silence (65536 system clocks)
+ *   it asserts ft_clk_lost, which is OR'd into the FT-domain reset so
+ *   FSMs and FIFOs return to a clean state. When ft_clk resumes, a 2-stage
+ *   reset synchronizer deasserts the reset cleanly in the ft_clk domain.
  */
 
 module usb_data_interface_ft2232h (
@@ -59,7 +66,9 @@ module usb_data_interface_ft2232h (
     output reg ft_rd_n,             // Read strobe (active low)
     output reg ft_wr_n,             // Write strobe (active low)
     output reg ft_oe_n,             // Output enable (active low) — bus direction
-    output reg ft_siwu,             // Send Immediate / WakeUp
+    output reg ft_siwu,             // Send Immediate / WakeUp — UNUSED: held low.
+                                    // SIWU could flush the TX FIFO for lower latency
+                                    // but is not needed at current data rates. Deferred.
 
     // Clock from FT2232H (directly used — no ODDR forwarding needed)
     input wire ft_clk,              // 60 MHz from FT2232H CLKOUT
@@ -134,6 +143,7 @@ localparam [2:0] RD_IDLE       = 3'd0,
 reg [2:0] rd_state;
 reg [1:0] rd_byte_cnt;   // 0..3 for 4-byte command word
 reg [31:0] rd_shift_reg;  // Shift register to assemble 4-byte command
+reg rd_cmd_complete;      // Set when all 4 bytes received (distinguishes from abort)
 
 // ============================================================================
 // DATA BUS DIRECTION CONTROL
@@ -192,6 +202,70 @@ always @(posedge clk or negedge reset_n) begin
     end
 end
 
+// ============================================================================
+// CLOCK-ACTIVITY WATCHDOG (clk domain)
+// ============================================================================
+// Detects when ft_clk stops (USB cable unplugged). A toggle register in the
+// ft_clk domain flips every ft_clk edge. The clk domain synchronizes it and
+// checks for transitions. If no transition is seen for 2^16 = 65536 clk
+// cycles (~0.65 ms at 100 MHz), ft_clk_lost asserts.
+//
+// ft_clk_lost feeds into the effective reset for the ft_clk domain so that
+// FSMs and capture registers return to a clean state automatically.
+
+// Toggle register: flips every ft_clk edge (ft_clk domain)
+reg ft_heartbeat;
+always @(posedge ft_clk or negedge ft_reset_n) begin
+    if (!ft_reset_n)
+        ft_heartbeat <= 1'b0;
+    else
+        ft_heartbeat <= ~ft_heartbeat;
+end
+
+// Synchronize heartbeat into clk domain (2-stage)
+(* ASYNC_REG = "TRUE" *) reg [1:0] ft_hb_sync;
+reg ft_hb_prev;
+reg [15:0] ft_clk_timeout;
+reg ft_clk_lost;
+
+always @(posedge clk or negedge reset_n) begin
+    if (!reset_n) begin
+        ft_hb_sync    <= 2'b00;
+        ft_hb_prev    <= 1'b0;
+        ft_clk_timeout <= 16'd0;
+        ft_clk_lost   <= 1'b0;
+    end else begin
+        ft_hb_sync <= {ft_hb_sync[0], ft_heartbeat};
+        ft_hb_prev <= ft_hb_sync[1];
+
+        if (ft_hb_sync[1] != ft_hb_prev) begin
+            // ft_clk is alive — reset counter, clear lost flag
+            ft_clk_timeout <= 16'd0;
+            ft_clk_lost    <= 1'b0;
+        end else if (!ft_clk_lost) begin
+            if (ft_clk_timeout == 16'hFFFF)
+                ft_clk_lost <= 1'b1;
+            else
+                ft_clk_timeout <= ft_clk_timeout + 16'd1;
+        end
+    end
+end
+
+// Effective FT-domain reset: asserted by global reset OR clock loss.
+// Deassertion synchronized to ft_clk via 2-stage sync to avoid
+// metastability on the recovery edge.
+(* ASYNC_REG = "TRUE" *) reg [1:0] ft_reset_sync;
+wire ft_reset_raw_n = ft_reset_n & ~ft_clk_lost;
+
+always @(posedge ft_clk or negedge ft_reset_raw_n) begin
+    if (!ft_reset_raw_n)
+        ft_reset_sync <= 2'b00;
+    else
+        ft_reset_sync <= {ft_reset_sync[0], 1'b1};
+end
+
+wire ft_effective_reset_n = ft_reset_sync[1];
+
 // --- 3-stage synchronizers (ft_clk domain) ---
 // 3 stages for better MTBF at 60 MHz
 
@@ -228,12 +302,25 @@ reg cfar_detection_cap;
 reg doppler_data_pending;
 reg cfar_data_pending;
 
+// 1-cycle delayed range trigger.  range_valid_ft fires on the same clock
+// edge that range_profile_cap is captured (non-blocking).  If the FSM
+// reads range_profile_cap on that same edge it sees the STALE value.
+// Delaying the trigger by one cycle guarantees the capture register has
+// settled before the byte mux reads it.
+reg range_data_ready;
+
+// Frame sync: sample counter (ft_clk domain, wraps at NUM_CELLS)
+// Bit 7 of detection byte is set when sample_counter == 0 (frame start).
+// This allows the Python host to resynchronize without a protocol change.
+localparam [11:0] NUM_CELLS = 12'd2048;  // 64 range x 32 doppler
+reg [11:0] sample_counter;
+
 // Status snapshot (ft_clk domain)
 reg [31:0] status_words [0:5];
 
 integer si;  // status_words loop index
-always @(posedge ft_clk or negedge ft_reset_n) begin
+always @(posedge ft_clk or negedge ft_effective_reset_n) begin
-    if (!ft_reset_n) begin
+    if (!ft_effective_reset_n) begin
         range_toggle_sync   <= 3'b000;
         doppler_toggle_sync <= 3'b000;
         cfar_toggle_sync    <= 3'b000;
@@ -246,6 +333,7 @@ always @(posedge ft_clk or negedge ft_reset_n) begin
         doppler_real_cap    <= 16'd0;
         doppler_imag_cap    <= 16'd0;
         cfar_detection_cap  <= 1'b0;
+        range_data_ready    <= 1'b0;
         // Default to range-only on reset (prevents write FSM deadlock)
         stream_ctrl_sync_0  <= 3'b001;
         stream_ctrl_sync_1  <= 3'b001;
@@ -279,6 +367,10 @@ always @(posedge ft_clk or negedge ft_reset_n) begin
         if (cfar_valid_ft)
             cfar_detection_cap <= cfar_detection_hold;
 
+        // 1-cycle delayed trigger: ensures range_profile_cap has settled
+        // before the FSM reads it via the byte mux.
+        range_data_ready <= range_valid_ft;
+
         // Status snapshot on request
         if (status_req_ft) begin
             // Word 0: {0xFF[31:24], mode[23:22], stream[21:19], 3'b000[18:16], threshold[15:0]}
@@ -315,11 +407,16 @@ always @(*) begin
         5'd2:  data_pkt_byte = range_profile_cap[23:16];
         5'd3:  data_pkt_byte = range_profile_cap[15:8];
         5'd4:  data_pkt_byte = range_profile_cap[7:0];     // range LSB
-        5'd5:  data_pkt_byte = doppler_real_cap[15:8];      // doppler_real MSB
+        // Doppler fields: zero when stream_doppler_en is off
-        5'd6:  data_pkt_byte = doppler_real_cap[7:0];       // doppler_real LSB
+        5'd5:  data_pkt_byte = stream_doppler_en ? doppler_real_cap[15:8]  : 8'd0;
-        5'd7:  data_pkt_byte = doppler_imag_cap[15:8];      // doppler_imag MSB
+        5'd6:  data_pkt_byte = stream_doppler_en ? doppler_real_cap[7:0]   : 8'd0;
-        5'd8:  data_pkt_byte = doppler_imag_cap[7:0];       // doppler_imag LSB
+        5'd7:  data_pkt_byte = stream_doppler_en ? doppler_imag_cap[15:8]  : 8'd0;
-        5'd9:  data_pkt_byte = {7'b0, cfar_detection_cap};  // detection
+        5'd8:  data_pkt_byte = stream_doppler_en ? doppler_imag_cap[7:0]   : 8'd0;
+        // Detection field: zero when stream_cfar_en is off
+        // Bit 7 = frame_start flag (sample_counter == 0), bit 0 = cfar_detection
+        5'd9:  data_pkt_byte = stream_cfar_en
+                   ? {(sample_counter == 12'd0), 6'b0, cfar_detection_cap}
+                   : {(sample_counter == 12'd0), 7'd0};
         5'd10: data_pkt_byte = FOOTER;
         default: data_pkt_byte = 8'h00;
     endcase
@@ -376,12 +473,13 @@ end
 // Write FSM and Read FSM share the bus. Write FSM operates when Read FSM
 // is idle. Read FSM takes priority when host has data available.
 
-always @(posedge ft_clk or negedge ft_reset_n) begin
+always @(posedge ft_clk or negedge ft_effective_reset_n) begin
-    if (!ft_reset_n) begin
+    if (!ft_effective_reset_n) begin
         wr_state       <= WR_IDLE;
         wr_byte_idx    <= 5'd0;
         rd_state       <= RD_IDLE;
         rd_byte_cnt    <= 2'd0;
+        rd_cmd_complete <= 1'b0;
         rd_shift_reg   <= 32'd0;
         ft_data_out    <= 8'd0;
         ft_data_oe     <= 1'b0;
@@ -396,6 +494,7 @@ always @(posedge ft_clk or negedge ft_reset_n) begin
         cmd_value      <= 16'd0;
         doppler_data_pending <= 1'b0;
         cfar_data_pending    <= 1'b0;
+        sample_counter       <= 12'd0;
     end else begin
         // Default: clear one-shot signals
         cmd_valid <= 1'b0;
@@ -437,17 +536,19 @@ always @(posedge ft_clk or negedge ft_reset_n) begin
                 rd_shift_reg <= {rd_shift_reg[23:0], ft_data};
                 if (rd_byte_cnt == 2'd3) begin
                     // All 4 bytes received
-                    ft_rd_n     <= 1'b1;
+                    ft_rd_n         <= 1'b1;
-                    rd_byte_cnt <= 2'd0;
+                    rd_byte_cnt     <= 2'd0;
-                    rd_state    <= RD_DEASSERT;
+                    rd_cmd_complete <= 1'b1;
+                    rd_state        <= RD_DEASSERT;
                 end else begin
                     rd_byte_cnt <= rd_byte_cnt + 2'd1;
                     // Keep reading if more data available
                     if (ft_rxf_n) begin
                         // Host ran out of data mid-command — abort
-                        ft_rd_n     <= 1'b1;
+                        ft_rd_n         <= 1'b1;
-                        rd_byte_cnt <= 2'd0;
+                        rd_byte_cnt     <= 2'd0;
-                        rd_state    <= RD_DEASSERT;
+                        rd_cmd_complete <= 1'b0;
+                        rd_state        <= RD_DEASSERT;
                     end
                 end
             end
@@ -456,7 +557,8 @@ always @(posedge ft_clk or negedge ft_reset_n) begin
                 // Deassert OE (1 cycle after RD deasserted)
                 ft_oe_n  <= 1'b1;
                 // Only process if we received a full 4-byte command
-                if (rd_byte_cnt == 2'd0) begin
+                if (rd_cmd_complete) begin
+                    rd_cmd_complete <= 1'b0;
                     rd_state <= RD_PROCESS;
                 end else begin
                     // Incomplete command — discard
@@ -491,8 +593,13 @@ always @(posedge ft_clk or negedge ft_reset_n) begin
                         wr_state    <= WR_STATUS_SEND;
                         wr_byte_idx <= 5'd0;
                     end
-                    // Trigger on range_valid edge (primary data trigger)
+                    // Trigger on range_data_ready (1 cycle after range_valid_ft)
-                    else if (range_valid_ft && stream_range_en) begin
+                    // so that range_profile_cap has settled from the CDC block.
+                    // Gate on pending flags: only send when all enabled
+                    // streams have fresh data (avoids stale doppler/CFAR)
+                    else if (range_data_ready && stream_range_en
+                             && (!stream_doppler_en || doppler_data_pending)
+                             && (!stream_cfar_en    || cfar_data_pending)) begin
                         if (ft_rxf_n) begin  // No host read pending
                             wr_state    <= WR_DATA_SEND;
                             wr_byte_idx <= 5'd0;
@@ -538,6 +645,11 @@ always @(posedge ft_clk or negedge ft_reset_n) begin
                     // Clear pending flags — data consumed
                     doppler_data_pending <= 1'b0;
                     cfar_data_pending    <= 1'b0;
+                    // Advance frame sync counter
+                    if (sample_counter == NUM_CELLS - 12'd1)
+                        sample_counter <= 12'd0;
+                    else
+                        sample_counter <= sample_counter + 12'd1;
                     wr_state   <= WR_IDLE;
                 end
 

9_Firmware/9_3_GUI/GUI_V6.py

@@ -1,3 +1,9 @@
+# =============================================================================
+# DEPRECATED: GUI V6 is superseded by GUI_V65_Tk (tkinter) and V7 (PyQt6).
+# This file is retained for reference only. Do not use for new development.
+# Removal planned for next major release.
+# =============================================================================
+
 import tkinter as tk
 from tkinter import ttk, messagebox
 import threading

9_Firmware/9_3_GUI/GUI_V65_Tk.py

@@ -59,7 +59,7 @@ except (ModuleNotFoundError, ImportError):
 
 # Import protocol layer (no GUI deps)
 from radar_protocol import (
-    RadarProtocol, FT2232HConnection,
+    RadarProtocol, FT2232HConnection, FT601Connection,
     DataRecorder, RadarAcquisition,
     RadarFrame, StatusResponse,
     NUM_RANGE_BINS, NUM_DOPPLER_BINS, WATERFALL_DEPTH,
@@ -98,9 +98,10 @@ class DemoTarget:
 
     __slots__ = ("azimuth", "classification", "id", "range_m", "snr", "velocity")
 
-    # Physical range grid: 64 bins x ~4.8 m/bin = ~307 m max
+    # Physical range grid: 64 bins x ~24 m/bin = ~1536 m max
-    _RANGE_PER_BIN: float = (3e8 / (2 * 500e6)) * 16  # ~4.8 m
+    # Bin spacing = c / (2 * Fs) * decimation, where Fs = 100 MHz DDC output.
-    _MAX_RANGE: float = _RANGE_PER_BIN * NUM_RANGE_BINS  # ~307 m
+    _RANGE_PER_BIN: float = (3e8 / (2 * 100e6)) * 16  # ~24 m
+    _MAX_RANGE: float = _RANGE_PER_BIN * NUM_RANGE_BINS  # ~1536 m
 
     def __init__(self, tid: int):
         self.id = tid
@@ -187,10 +188,10 @@ class DemoSimulator:
         mag = np.zeros((NUM_RANGE_BINS, NUM_DOPPLER_BINS), dtype=np.float64)
         det = np.zeros((NUM_RANGE_BINS, NUM_DOPPLER_BINS), dtype=np.uint8)
 
-        # Range/Doppler scaling (approximate)
+        # Range/Doppler scaling: bin spacing = c/(2*Fs)*decimation
-        range_per_bin = (3e8 / (2 * 500e6)) * 16  # ~4.8 m/bin
+        range_per_bin = (3e8 / (2 * 100e6)) * 16  # ~24 m/bin
         max_range = range_per_bin * NUM_RANGE_BINS
-        vel_per_bin = 1.484  # m/s per Doppler bin (from WaveformConfig)
+        vel_per_bin = 5.34  # m/s per Doppler bin (radar_scene.py: lam/(2*16*PRI))
 
         for t in targets:
             if t.range_m > max_range or t.range_m < 0:
@@ -385,13 +386,14 @@ class RadarDashboard:
     UPDATE_INTERVAL_MS = 100  # 10 Hz display refresh
 
     # Radar parameters used for range-axis scaling.
-    BANDWIDTH = 500e6        # Hz — chirp bandwidth
+    SAMPLE_RATE = 100e6      # Hz — DDC output I/Q rate (matched filter input)
     C = 3e8                  # m/s — speed of light
 
-    def __init__(self, root: tk.Tk, connection: FT2232HConnection,
+    def __init__(self, root: tk.Tk, mock: bool,
                  recorder: DataRecorder, device_index: int = 0):
         self.root = root
-        self.conn = connection
+        self._mock = mock
+        self.conn: FT2232HConnection | FT601Connection | None = None
         self.recorder = recorder
         self.device_index = device_index
 
@@ -485,6 +487,16 @@ class RadarDashboard:
                                        style="Accent.TButton")
         self.btn_connect.pack(side="right", padx=4)
 
+        # USB Interface selector (production FT2232H / premium FT601)
+        self._usb_iface_var = tk.StringVar(value="FT2232H (Production)")
+        self.cmb_usb_iface = ttk.Combobox(
+            top, textvariable=self._usb_iface_var,
+            values=["FT2232H (Production)", "FT601 (Premium)"],
+            state="readonly", width=20,
+        )
+        self.cmb_usb_iface.pack(side="right", padx=4)
+        ttk.Label(top, text="USB:", font=("Menlo", 10)).pack(side="right")
+
         self.btn_record = ttk.Button(top, text="Record", command=self._on_record)
         self.btn_record.pack(side="right", padx=4)
 
@@ -515,9 +527,8 @@ class RadarDashboard:
 
     def _build_display_tab(self, parent):
         # Compute physical axis limits
-        range_res = self.C / (2.0 * self.BANDWIDTH)  # ~0.3 m per FFT bin
+        # Bin spacing = c / (2 * Fs_ddc) for matched-filter processing.
-        # After decimation 1024→64, each range bin = 16 FFT bins
+        range_per_bin = self.C / (2.0 * self.SAMPLE_RATE) * 16  # ~24 m
-        range_per_bin = range_res * 16
         max_range = range_per_bin * NUM_RANGE_BINS
 
         doppler_bin_lo = 0
@@ -1018,15 +1029,17 @@ class RadarDashboard:
 
     # ------------------------------------------------------------ Actions
     def _on_connect(self):
-        if self.conn.is_open:
+        if self.conn is not None and self.conn.is_open:
             # Disconnect
             if self._acq_thread is not None:
                 self._acq_thread.stop()
                 self._acq_thread.join(timeout=2)
                 self._acq_thread = None
             self.conn.close()
+            self.conn = None
             self.lbl_status.config(text="DISCONNECTED", foreground=RED)
             self.btn_connect.config(text="Connect")
+            self.cmb_usb_iface.config(state="readonly")
             log.info("Disconnected")
             return
 
@@ -1036,6 +1049,16 @@ class RadarDashboard:
         if self._replay_active:
             self._replay_stop()
 
+        # Create connection based on USB Interface selector
+        iface = self._usb_iface_var.get()
+        if "FT601" in iface:
+            self.conn = FT601Connection(mock=self._mock)
+        else:
+            self.conn = FT2232HConnection(mock=self._mock)
+
+        # Disable interface selector while connecting/connected
+        self.cmb_usb_iface.config(state="disabled")
+
         # Open connection in a background thread to avoid blocking the GUI
         self.lbl_status.config(text="CONNECTING...", foreground=YELLOW)
         self.btn_connect.config(state="disabled")
@@ -1062,6 +1085,8 @@ class RadarDashboard:
         else:
             self.lbl_status.config(text="CONNECT FAILED", foreground=RED)
             self.btn_connect.config(text="Connect")
+            self.cmb_usb_iface.config(state="readonly")
+            self.conn = None
 
     def _on_record(self):
         if self.recorder.recording:
@@ -1110,6 +1135,9 @@ class RadarDashboard:
                  f"Opcode 0x{opcode:02X} is hardware-only (ignored in replay)"))
             return
         cmd = RadarProtocol.build_command(opcode, value)
+        if self.conn is None:
+            log.warning("No connection — command not sent")
+            return
         ok = self.conn.write(cmd)
         log.info(f"CMD 0x{opcode:02X} val={value} ({'OK' if ok else 'FAIL'})")
 
@@ -1148,7 +1176,7 @@ class RadarDashboard:
         if self._replay_active or self._replay_ctrl is not None:
             self._replay_stop()
         if self._acq_thread is not None:
-            if self.conn.is_open:
+            if self.conn is not None and self.conn.is_open:
                 self._on_connect()  # disconnect
             else:
                 # Connection dropped unexpectedly — just clean up the thread
@@ -1547,17 +1575,17 @@ def main():
     args = parser.parse_args()
 
     if args.live:
-        conn = FT2232HConnection(mock=False)
+        mock = False
         mode_str = "LIVE"
     else:
-        conn = FT2232HConnection(mock=True)
+        mock = True
         mode_str = "MOCK"
 
     recorder = DataRecorder()
 
     root = tk.Tk()
 
-    dashboard = RadarDashboard(root, conn, recorder, device_index=args.device)
+    dashboard = RadarDashboard(root, mock, recorder, device_index=args.device)
 
     if args.record:
         filepath = os.path.join(
@@ -1582,8 +1610,8 @@ def main():
         if dashboard._acq_thread is not None:
             dashboard._acq_thread.stop()
             dashboard._acq_thread.join(timeout=2)
-        if conn.is_open:
+        if dashboard.conn is not None and dashboard.conn.is_open:
-            conn.close()
+            dashboard.conn.close()
         if recorder.recording:
             recorder.stop()
         root.destroy()

9_Firmware/9_3_GUI/GUI_V6_Demo.py

@@ -1,5 +1,11 @@
 #!/usr/bin/env python3
 
+# =============================================================================
+# DEPRECATED: GUI V6 Demo is superseded by GUI_V65_Tk and V7.
+# This file is retained for reference only. Do not use for new development.
+# Removal planned for next major release.
+# =============================================================================
+
 """
 Radar System GUI - Fully Functional Demo Version
 All buttons work, simulated radar data is generated in real-time

9_Firmware/9_3_GUI/GUI_versions.txt

@@ -6,7 +6,7 @@ GUI_V4 ==> Added pitch correction
 
 GUI_V5 ==> Added Mercury Color
 
-GUI_V6 ==> Added USB3 FT601 support
+GUI_V6 ==> Added USB3 FT601 support  [DEPRECATED — superseded by V65/V7]
 
 GUI_V65_Tk ==> Board bring-up dashboard (FT2232H reader, real-time R-D heatmap, CFAR overlay, waterfall, host commands, HDF5 recording, replay, demo mode)
 radar_protocol ==> Protocol layer (packet parsing, command building, FT2232H connection, data recorder, acquisition thread)

9_Firmware/9_3_GUI/radar_protocol.py

@@ -6,6 +6,7 @@ Pure-logic module for USB packet parsing and command building.
 No GUI dependencies — safe to import from tests and headless scripts.
 
 USB Interface: FT2232H USB 2.0 (8-bit, 50T production board) via pyftdi
+               FT601 USB 3.0 (32-bit, 200T premium board) via ftd3xx
 
 USB Packet Protocol (11-byte):
   TX (FPGA→Host):
@@ -22,7 +23,7 @@ import queue
 import logging
 import contextlib
 from dataclasses import dataclass, field
-from typing import Any
+from typing import Any, ClassVar
 from enum import IntEnum
 
 
@@ -200,7 +201,9 @@ class RadarProtocol:
         range_i = _to_signed16(struct.unpack_from(">H", raw, 3)[0])
         doppler_i = _to_signed16(struct.unpack_from(">H", raw, 5)[0])
         doppler_q = _to_signed16(struct.unpack_from(">H", raw, 7)[0])
-        detection = raw[9] & 0x01
+        det_byte = raw[9]
+        detection = det_byte & 0x01
+        frame_start = (det_byte >> 7) & 0x01
 
         return {
             "range_i": range_i,
@@ -208,6 +211,7 @@ class RadarProtocol:
             "doppler_i": doppler_i,
             "doppler_q": doppler_q,
             "detection": detection,
+            "frame_start": frame_start,
         }
 
     @staticmethod
@@ -433,7 +437,191 @@ class FT2232HConnection:
             pkt += struct.pack(">h", np.clip(range_i, -32768, 32767))
             pkt += struct.pack(">h", np.clip(dop_i, -32768, 32767))
             pkt += struct.pack(">h", np.clip(dop_q, -32768, 32767))
-            pkt.append(detection & 0x01)
+            # Bit 7 = frame_start (sample_counter == 0), bit 0 = detection
+            det_byte = (detection & 0x01) | (0x80 if idx == 0 else 0x00)
+            pkt.append(det_byte)
+            pkt.append(FOOTER_BYTE)
+
+            buf += pkt
+
+        self._mock_seq_idx = (start_idx + num_packets) % NUM_CELLS
+        return bytes(buf)
+
+
+# ============================================================================
+# FT601 USB 3.0 Connection (premium board only)
+# ============================================================================
+
+# Optional ftd3xx import (FTDI's proprietary driver for FT60x USB 3.0 chips).
+# pyftdi does NOT support FT601 — it only handles USB 2.0 chips (FT232H, etc.)
+try:
+    import ftd3xx  # type: ignore[import-untyped]
+    FTD3XX_AVAILABLE = True
+    _Ftd3xxError: type = ftd3xx.FTD3XXError  # type: ignore[attr-defined]
+except ImportError:
+    FTD3XX_AVAILABLE = False
+    _Ftd3xxError = OSError  # fallback for type-checking; never raised
+
+
+class FT601Connection:
+    """
+    FT601 USB 3.0 SuperSpeed FIFO bridge — premium board only.
+
+    The FT601 has a 32-bit data bus and runs at 100 MHz.
+    VID:PID = 0x0403:0x6030 or 0x6031 (FTDI FT60x).
+
+    Requires the ``ftd3xx`` library (``pip install ftd3xx`` on Windows,
+    or ``libft60x`` on Linux). This is FTDI's proprietary USB 3.0 driver;
+    ``pyftdi`` only supports USB 2.0 and will NOT work with FT601.
+
+    Public contract matches FT2232HConnection so callers can swap freely.
+    """
+
+    VID = 0x0403
+    PID_LIST: ClassVar[list[int]] = [0x6030, 0x6031]
+
+    def __init__(self, mock: bool = True):
+        self._mock = mock
+        self._dev = None
+        self._lock = threading.Lock()
+        self.is_open = False
+        # Mock state (reuses same synthetic data pattern)
+        self._mock_frame_num = 0
+        self._mock_rng = np.random.RandomState(42)
+
+    def open(self, device_index: int = 0) -> bool:
+        if self._mock:
+            self.is_open = True
+            log.info("FT601 mock device opened (no hardware)")
+            return True
+
+        if not FTD3XX_AVAILABLE:
+            log.error(
+                "ftd3xx library required for FT601 hardware — "
+                "install with: pip install ftd3xx"
+            )
+            return False
+
+        try:
+            self._dev = ftd3xx.create(device_index, ftd3xx.OPEN_BY_INDEX)
+            if self._dev is None:
+                log.error("No FT601 device found at index %d", device_index)
+                return False
+            # Verify chip configuration — only reconfigure if needed.
+            # setChipConfiguration triggers USB re-enumeration, which
+            # invalidates the device handle and requires a re-open cycle.
+            cfg = self._dev.getChipConfiguration()
+            needs_reconfig = (
+                cfg.FIFOMode != 0            # 245 FIFO mode
+                or cfg.ChannelConfig != 0    # 1 channel, 32-bit
+                or cfg.OptionalFeatureSupport != 0
+            )
+            if needs_reconfig:
+                cfg.FIFOMode = 0
+                cfg.ChannelConfig = 0
+                cfg.OptionalFeatureSupport = 0
+                self._dev.setChipConfiguration(cfg)
+                # Device re-enumerates — close stale handle, wait, re-open
+                self._dev.close()
+                self._dev = None
+                import time
+                time.sleep(2.0)  # wait for USB re-enumeration
+                self._dev = ftd3xx.create(device_index, ftd3xx.OPEN_BY_INDEX)
+                if self._dev is None:
+                    log.error("FT601 not found after reconfiguration")
+                    return False
+                log.info("FT601 reconfigured and re-opened (index %d)", device_index)
+            self.is_open = True
+            log.info("FT601 device opened (index %d)", device_index)
+            return True
+        except (OSError, _Ftd3xxError) as e:
+            log.error("FT601 open failed: %s", e)
+            self._dev = None
+            return False
+
+    def close(self):
+        if self._dev is not None:
+            with contextlib.suppress(Exception):
+                self._dev.close()
+            self._dev = None
+        self.is_open = False
+
+    def read(self, size: int = 4096) -> bytes | None:
+        """Read raw bytes from FT601. Returns None on error/timeout."""
+        if not self.is_open:
+            return None
+
+        if self._mock:
+            return self._mock_read(size)
+
+        with self._lock:
+            try:
+                data = self._dev.readPipe(0x82, size, raw=True)
+                return bytes(data) if data else None
+            except (OSError, _Ftd3xxError) as e:
+                log.error("FT601 read error: %s", e)
+                return None
+
+    def write(self, data: bytes) -> bool:
+        """Write raw bytes to FT601. Data must be 4-byte aligned for 32-bit bus."""
+        if not self.is_open:
+            return False
+
+        if self._mock:
+            log.info(f"FT601 mock write: {data.hex()}")
+            return True
+
+        # Pad to 4-byte alignment (FT601 32-bit bus requirement).
+        # NOTE: Radar commands are already 4 bytes, so this should be a no-op.
+        remainder = len(data) % 4
+        if remainder:
+            data = data + b"\x00" * (4 - remainder)
+
+        with self._lock:
+            try:
+                written = self._dev.writePipe(0x02, data, raw=True)
+                return written == len(data)
+            except (OSError, _Ftd3xxError) as e:
+                log.error("FT601 write error: %s", e)
+                return False
+
+    def _mock_read(self, size: int) -> bytes:
+        """Generate synthetic radar packets (same pattern as FT2232H mock)."""
+        time.sleep(0.05)
+        self._mock_frame_num += 1
+
+        buf = bytearray()
+        num_packets = min(NUM_CELLS, size // DATA_PACKET_SIZE)
+        start_idx = getattr(self, "_mock_seq_idx", 0)
+
+        for n in range(num_packets):
+            idx = (start_idx + n) % NUM_CELLS
+            rbin = idx // NUM_DOPPLER_BINS
+            dbin = idx % NUM_DOPPLER_BINS
+
+            range_i = int(self._mock_rng.normal(0, 100))
+            range_q = int(self._mock_rng.normal(0, 100))
+            if abs(rbin - 20) < 3:
+                range_i += 5000
+                range_q += 3000
+
+            dop_i = int(self._mock_rng.normal(0, 50))
+            dop_q = int(self._mock_rng.normal(0, 50))
+            if abs(rbin - 20) < 3 and abs(dbin - 8) < 2:
+                dop_i += 8000
+                dop_q += 4000
+
+            detection = 1 if (abs(rbin - 20) < 2 and abs(dbin - 8) < 2) else 0
+
+            pkt = bytearray()
+            pkt.append(HEADER_BYTE)
+            pkt += struct.pack(">h", np.clip(range_q, -32768, 32767))
+            pkt += struct.pack(">h", np.clip(range_i, -32768, 32767))
+            pkt += struct.pack(">h", np.clip(dop_i, -32768, 32767))
+            pkt += struct.pack(">h", np.clip(dop_q, -32768, 32767))
+            # Bit 7 = frame_start (sample_counter == 0), bit 0 = detection
+            det_byte = (detection & 0x01) | (0x80 if idx == 0 else 0x00)
+            pkt.append(det_byte)
             pkt.append(FOOTER_BYTE)
 
             buf += pkt
@@ -600,6 +788,12 @@ class RadarAcquisition(threading.Thread):
             if sample.get("detection", 0):
                 self._frame.detections[rbin, dbin] = 1
                 self._frame.detection_count += 1
+            # Accumulate FPGA range profile data (matched-filter output)
+            # Each sample carries the range_i/range_q for this range bin.
+            # Accumulate magnitude across Doppler bins for the range profile.
+            ri = int(sample.get("range_i", 0))
+            rq = int(sample.get("range_q", 0))
+            self._frame.range_profile[rbin] += abs(ri) + abs(rq)
 
         self._sample_idx += 1
 
@@ -607,11 +801,11 @@ class RadarAcquisition(threading.Thread):
             self._finalize_frame()
 
     def _finalize_frame(self):
-        """Complete frame: compute range profile, push to queue, record."""
+        """Complete frame: push to queue, record."""
         self._frame.timestamp = time.time()
         self._frame.frame_number = self._frame_num
-        # Range profile = sum of magnitude across Doppler bins
+        # range_profile is already accumulated from FPGA range_i/range_q
-        self._frame.range_profile = np.sum(self._frame.magnitude, axis=1)
+        # data in _ingest_sample(). No need to synthesize from doppler magnitude.
 
         # Push to display queue (drop old if backed up)
         try:

9_Firmware/9_3_GUI/test_GUI_V65_Tk.py

@@ -16,7 +16,7 @@ import unittest
 import numpy as np
 
 from radar_protocol import (
-    RadarProtocol, FT2232HConnection, DataRecorder, RadarAcquisition,
+    RadarProtocol, FT2232HConnection, FT601Connection, DataRecorder, RadarAcquisition,
     RadarFrame, StatusResponse, Opcode,
     HEADER_BYTE, FOOTER_BYTE, STATUS_HEADER_BYTE,
     NUM_RANGE_BINS, NUM_DOPPLER_BINS,
@@ -312,6 +312,61 @@ class TestFT2232HConnection(unittest.TestCase):
         self.assertFalse(conn.write(b"\x00\x00\x00\x00"))
 
 
+class TestFT601Connection(unittest.TestCase):
+    """Test mock FT601 connection (mirrors FT2232H tests)."""
+
+    def test_mock_open_close(self):
+        conn = FT601Connection(mock=True)
+        self.assertTrue(conn.open())
+        self.assertTrue(conn.is_open)
+        conn.close()
+        self.assertFalse(conn.is_open)
+
+    def test_mock_read_returns_data(self):
+        conn = FT601Connection(mock=True)
+        conn.open()
+        data = conn.read(4096)
+        self.assertIsNotNone(data)
+        self.assertGreater(len(data), 0)
+        conn.close()
+
+    def test_mock_read_contains_valid_packets(self):
+        """Mock data should contain parseable data packets."""
+        conn = FT601Connection(mock=True)
+        conn.open()
+        raw = conn.read(4096)
+        packets = RadarProtocol.find_packet_boundaries(raw)
+        self.assertGreater(len(packets), 0)
+        for start, end, ptype in packets:
+            if ptype == "data":
+                result = RadarProtocol.parse_data_packet(raw[start:end])
+                self.assertIsNotNone(result)
+        conn.close()
+
+    def test_mock_write(self):
+        conn = FT601Connection(mock=True)
+        conn.open()
+        cmd = RadarProtocol.build_command(0x01, 1)
+        self.assertTrue(conn.write(cmd))
+        conn.close()
+
+    def test_write_pads_to_4_bytes(self):
+        """FT601 write() should pad data to 4-byte alignment."""
+        conn = FT601Connection(mock=True)
+        conn.open()
+        # 3-byte payload should be padded internally (no error)
+        self.assertTrue(conn.write(b"\x01\x02\x03"))
+        conn.close()
+
+    def test_read_when_closed(self):
+        conn = FT601Connection(mock=True)
+        self.assertIsNone(conn.read())
+
+    def test_write_when_closed(self):
+        conn = FT601Connection(mock=True)
+        self.assertFalse(conn.write(b"\x00\x00\x00\x00"))
+
+
 class TestDataRecorder(unittest.TestCase):
     """Test HDF5 recording (skipped if h5py not available)."""
 

9_Firmware/9_3_GUI/test_v7.py

@@ -65,9 +65,9 @@ class TestRadarSettings(unittest.TestCase):
 
     def test_defaults(self):
         s = _models().RadarSettings()
-        self.assertEqual(s.system_frequency, 10e9)
+        self.assertEqual(s.system_frequency, 10.5e9)
-        self.assertEqual(s.coverage_radius, 50000)
+        self.assertEqual(s.coverage_radius, 1536)
-        self.assertEqual(s.max_distance, 50000)
+        self.assertEqual(s.max_distance, 1536)
 
 
 class TestGPSData(unittest.TestCase):
@@ -425,26 +425,28 @@ class TestWaveformConfig(unittest.TestCase):
     def test_defaults(self):
         from v7.models import WaveformConfig
         wc = WaveformConfig()
-        self.assertEqual(wc.sample_rate_hz, 4e6)
+        self.assertEqual(wc.sample_rate_hz, 100e6)
-        self.assertEqual(wc.bandwidth_hz, 500e6)
+        self.assertEqual(wc.bandwidth_hz, 20e6)
-        self.assertEqual(wc.chirp_duration_s, 300e-6)
+        self.assertEqual(wc.chirp_duration_s, 30e-6)
-        self.assertEqual(wc.center_freq_hz, 10.525e9)
+        self.assertEqual(wc.pri_s, 167e-6)
+        self.assertEqual(wc.center_freq_hz, 10.5e9)
         self.assertEqual(wc.n_range_bins, 64)
         self.assertEqual(wc.n_doppler_bins, 32)
+        self.assertEqual(wc.chirps_per_subframe, 16)
         self.assertEqual(wc.fft_size, 1024)
         self.assertEqual(wc.decimation_factor, 16)
 
     def test_range_resolution(self):
-        """range_resolution_m should be ~5.62 m/bin with ADI defaults."""
+        """range_resolution_m should be ~23.98 m/bin (matched filter, 100 MSPS)."""
         from v7.models import WaveformConfig
         wc = WaveformConfig()
-        self.assertAlmostEqual(wc.range_resolution_m, 5.621, places=1)
+        self.assertAlmostEqual(wc.range_resolution_m, 23.983, places=1)
 
     def test_velocity_resolution(self):
-        """velocity_resolution_mps should be ~1.484 m/s/bin."""
+        """velocity_resolution_mps should be ~5.34 m/s/bin (PRI=167us, 16 chirps)."""
         from v7.models import WaveformConfig
         wc = WaveformConfig()
-        self.assertAlmostEqual(wc.velocity_resolution_mps, 1.484, places=2)
+        self.assertAlmostEqual(wc.velocity_resolution_mps, 5.343, places=1)
 
     def test_max_range(self):
         """max_range_m = range_resolution * n_range_bins."""
@@ -466,7 +468,7 @@ class TestWaveformConfig(unittest.TestCase):
         """Non-default parameters correctly change derived values."""
         from v7.models import WaveformConfig
         wc1 = WaveformConfig()
-        wc2 = WaveformConfig(bandwidth_hz=1e9)  # double BW → halve range res
+        wc2 = WaveformConfig(sample_rate_hz=200e6)  # double Fs → halve range bin
         self.assertAlmostEqual(wc2.range_resolution_m, wc1.range_resolution_m / 2, places=2)
 
     def test_zero_center_freq_velocity(self):
@@ -925,9 +927,9 @@ class TestExtractTargetsFromFrame(unittest.TestCase):
         """Detection at range bin 10 → range = 10 * range_resolution."""
         from v7.processing import extract_targets_from_frame
         frame = self._make_frame(det_cells=[(10, 16)])  # dbin=16 = center → vel=0
-        targets = extract_targets_from_frame(frame, range_resolution=5.621)
+        targets = extract_targets_from_frame(frame, range_resolution=23.983)
         self.assertEqual(len(targets), 1)
-        self.assertAlmostEqual(targets[0].range, 10 * 5.621, places=2)
+        self.assertAlmostEqual(targets[0].range, 10 * 23.983, places=1)
         self.assertAlmostEqual(targets[0].velocity, 0.0, places=2)
 
     def test_velocity_sign(self):

9_Firmware/9_3_GUI/v7/__init__.py

@@ -26,6 +26,7 @@ from .models import (
 # Hardware interfaces — production protocol via radar_protocol.py
 from .hardware import (
     FT2232HConnection,
+    FT601Connection,
     RadarProtocol,
     Opcode,
     RadarAcquisition,
@@ -89,7 +90,7 @@ __all__ = [  # noqa: RUF022
     "USB_AVAILABLE", "FTDI_AVAILABLE", "SCIPY_AVAILABLE",
     "SKLEARN_AVAILABLE", "FILTERPY_AVAILABLE",
     # hardware — production FPGA protocol
-    "FT2232HConnection", "RadarProtocol", "Opcode",
+    "FT2232HConnection", "FT601Connection", "RadarProtocol", "Opcode",
     "RadarAcquisition", "RadarFrame", "StatusResponse", "DataRecorder",
     "STM32USBInterface",
     # processing

9_Firmware/9_3_GUI/v7/dashboard.py

@@ -13,13 +13,14 @@ RadarDashboard is a QMainWindow with six tabs:
   6. Settings    — Host-side DSP parameters + About section
 
 Uses production radar_protocol.py for all FPGA communication:
-  - FT2232HConnection for real hardware
+  - FT2232HConnection for production board (FT2232H USB 2.0)
+  - FT601Connection for premium board (FT601 USB 3.0) — selectable from GUI
   - Unified replay via SoftwareFPGA + ReplayEngine + ReplayWorker
   - Mock mode (FT2232HConnection(mock=True)) for development
 
 The old STM32 magic-packet start flow has been removed. FPGA registers
 are controlled directly via 4-byte {opcode, addr, value_hi, value_lo}
-commands sent over FT2232H.
+commands sent over FT2232H or FT601.
 """
 
 from __future__ import annotations
@@ -55,6 +56,7 @@ from .models import (
 )
 from .hardware import (
     FT2232HConnection,
+    FT601Connection,
     RadarProtocol,
     RadarFrame,
     StatusResponse,
@@ -142,7 +144,7 @@ class RadarDashboard(QMainWindow):
         )
 
         # Hardware interfaces — production protocol
-        self._connection: FT2232HConnection | None = None
+        self._connection: FT2232HConnection | FT601Connection | None = None
         self._stm32 = STM32USBInterface()
         self._recorder = DataRecorder()
 
@@ -364,7 +366,7 @@ class RadarDashboard(QMainWindow):
         # Row 0: connection mode + device combos + buttons
         ctrl_layout.addWidget(QLabel("Mode:"), 0, 0)
         self._mode_combo = QComboBox()
-        self._mode_combo.addItems(["Mock", "Live FT2232H", "Replay"])
+        self._mode_combo.addItems(["Mock", "Live", "Replay"])
         self._mode_combo.setCurrentIndex(0)
         ctrl_layout.addWidget(self._mode_combo, 0, 1)
 
@@ -377,6 +379,13 @@ class RadarDashboard(QMainWindow):
         refresh_btn.clicked.connect(self._refresh_devices)
         ctrl_layout.addWidget(refresh_btn, 0, 4)
 
+        # USB Interface selector (production FT2232H / premium FT601)
+        ctrl_layout.addWidget(QLabel("USB Interface:"), 0, 5)
+        self._usb_iface_combo = QComboBox()
+        self._usb_iface_combo.addItems(["FT2232H (Production)", "FT601 (Premium)"])
+        self._usb_iface_combo.setCurrentIndex(0)
+        ctrl_layout.addWidget(self._usb_iface_combo, 0, 6)
+
         self._start_btn = QPushButton("Start Radar")
         self._start_btn.setStyleSheet(
             f"QPushButton {{ background-color: {DARK_SUCCESS}; color: white; font-weight: bold; }}"
@@ -1001,7 +1010,8 @@ class RadarDashboard(QMainWindow):
         self._conn_ft2232h = self._make_status_label("FT2232H")
         self._conn_stm32 = self._make_status_label("STM32 USB")
 
-        conn_layout.addWidget(QLabel("FT2232H:"), 0, 0)
+        self._conn_usb_label = QLabel("USB Data:")
+        conn_layout.addWidget(self._conn_usb_label, 0, 0)
         conn_layout.addWidget(self._conn_ft2232h, 0, 1)
         conn_layout.addWidget(QLabel("STM32 USB:"), 1, 0)
         conn_layout.addWidget(self._conn_stm32, 1, 1)
@@ -1167,7 +1177,7 @@ class RadarDashboard(QMainWindow):
         about_lbl = QLabel(
             "<b>AERIS-10 Radar System V7</b><br>"
             "PyQt6 Edition with Embedded Leaflet Map<br><br>"
-            "<b>Data Interface:</b> FT2232H USB 2.0 (production protocol)<br>"
+            "<b>Data Interface:</b> FT2232H USB 2.0 (production) / FT601 USB 3.0 (premium)<br>"
             "<b>FPGA Protocol:</b> 4-byte register commands, 0xAA/0xBB packets<br>"
             "<b>Map:</b> OpenStreetMap + Leaflet.js<br>"
             "<b>Framework:</b> PyQt6 + QWebEngine<br>"
@@ -1224,7 +1234,7 @@ class RadarDashboard(QMainWindow):
     # =====================================================================
 
     def _send_fpga_cmd(self, opcode: int, value: int):
-        """Send a 4-byte register command to the FPGA via FT2232H."""
+        """Send a 4-byte register command to the FPGA via USB (FT2232H or FT601)."""
         if self._connection is None or not self._connection.is_open:
             logger.warning(f"Cannot send 0x{opcode:02X}={value}: no connection")
             return
@@ -1287,16 +1297,26 @@ class RadarDashboard(QMainWindow):
 
             if "Mock" in mode:
                 self._replay_mode = False
-                self._connection = FT2232HConnection(mock=True)
+                iface = self._usb_iface_combo.currentText()
+                if "FT601" in iface:
+                    self._connection = FT601Connection(mock=True)
+                else:
+                    self._connection = FT2232HConnection(mock=True)
                 if not self._connection.open():
                     QMessageBox.critical(self, "Error", "Failed to open mock connection.")
                     return
             elif "Live" in mode:
                 self._replay_mode = False
-                self._connection = FT2232HConnection(mock=False)
+                iface = self._usb_iface_combo.currentText()
+                if "FT601" in iface:
+                    self._connection = FT601Connection(mock=False)
+                    iface_name = "FT601"
+                else:
+                    self._connection = FT2232HConnection(mock=False)
+                    iface_name = "FT2232H"
                 if not self._connection.open():
                     QMessageBox.critical(self, "Error",
-                                         "Failed to open FT2232H. Check USB connection.")
+                                         f"Failed to open {iface_name}. Check USB connection.")
                     return
             elif "Replay" in mode:
                 self._replay_mode = True
@@ -1368,6 +1388,7 @@ class RadarDashboard(QMainWindow):
                 self._start_btn.setEnabled(False)
                 self._stop_btn.setEnabled(True)
                 self._mode_combo.setEnabled(False)
+                self._usb_iface_combo.setEnabled(False)
                 self._demo_btn_main.setEnabled(False)
                 self._demo_btn_map.setEnabled(False)
                 n_frames = self._replay_engine.total_frames
@@ -1417,6 +1438,7 @@ class RadarDashboard(QMainWindow):
             self._start_btn.setEnabled(False)
             self._stop_btn.setEnabled(True)
             self._mode_combo.setEnabled(False)
+            self._usb_iface_combo.setEnabled(False)
             self._demo_btn_main.setEnabled(False)
             self._demo_btn_map.setEnabled(False)
             self._status_label_main.setText(f"Status: Running ({mode})")
@@ -1462,6 +1484,7 @@ class RadarDashboard(QMainWindow):
         self._start_btn.setEnabled(True)
         self._stop_btn.setEnabled(False)
         self._mode_combo.setEnabled(True)
+        self._usb_iface_combo.setEnabled(True)
         self._demo_btn_main.setEnabled(True)
         self._demo_btn_map.setEnabled(True)
         self._status_label_main.setText("Status: Radar stopped")
@@ -1954,6 +1977,12 @@ class RadarDashboard(QMainWindow):
         self._set_conn_indicator(self._conn_ft2232h, conn_open)
         self._set_conn_indicator(self._conn_stm32, self._stm32.is_open)
 
+        # Update USB label to reflect which interface is active
+        if isinstance(self._connection, FT601Connection):
+            self._conn_usb_label.setText("FT601:")
+        else:
+            self._conn_usb_label.setText("FT2232H:")
+
         gps_count = self._gps_packet_count
         if self._gps_worker:
             gps_count = self._gps_worker.gps_count

9_Firmware/9_3_GUI/v7/hardware.py

@@ -25,6 +25,7 @@ if USB_AVAILABLE:
 sys.path.insert(0, os.path.join(os.path.dirname(__file__), ".."))
 from radar_protocol import (  # noqa: F401 — re-exported for v7 package
     FT2232HConnection,
+    FT601Connection,
     RadarProtocol,
     Opcode,
     RadarAcquisition,
@@ -46,8 +47,9 @@ class STM32USBInterface:
 
     Used ONLY for receiving GPS data from the MCU.
 
-    FPGA register commands are sent via FT2232H (see FT2232HConnection
+    FPGA register commands are sent via the USB data interface — either
-    from radar_protocol.py). The old send_start_flag() / send_settings()
+    FT2232HConnection (production) or FT601Connection (premium), both
+    from radar_protocol.py. The old send_start_flag() / send_settings()
     methods have been removed — they used an incompatible magic-packet
     protocol that the FPGA does not understand.
     """

9_Firmware/9_3_GUI/v7/map_widget.py

@@ -98,7 +98,7 @@ class RadarMapWidget(QWidget):
         )
         self._targets: list[RadarTarget] = []
         self._pending_targets: list[RadarTarget] | None = None
-        self._coverage_radius = 50_000   # metres
+        self._coverage_radius = 1_536   # metres (64 bins x ~24 m/bin)
         self._tile_server = TileServer.OPENSTREETMAP
         self._show_coverage = True
         self._show_trails = False