fix: correct .gitignore stub name stm32_stub → stm32_settings_stub

Agent-Logs-Url: https://github.com/NawfalMotii79/PLFM_RADAR/sessions/15d36e68-be17-4ee3-b6e0-1da7de544671 Co-authored-by: JJassonn69 <83615043+JJassonn69@users.noreply.github.com>
fix: stable target IDs, hardware.py null checks, remove unused crcmod
2026-04-13 15:21:06 +00:00 · 2026-04-13 15:13:15 +00:00 · 2026-04-13 15:08:30 +00:00 · 2026-04-13 20:36:28 +05:45 · 2026-04-13 14:11:23 +00:00 · 2026-04-12 19:15:58 +00:00
147 changed files with 855812 additions and 979586 deletions
@@ -46,9 +46,7 @@ jobs:
      - name: Unit tests
        run: >
          uv run pytest
-          9_Firmware/9_3_GUI/test_GUI_V65_Tk.py
-          9_Firmware/9_3_GUI/test_v7.py
-          -v --tb=short
+          9_Firmware/9_3_GUI/test_radar_dashboard.py -v --tb=short

  # ===========================================================================
  # MCU Firmware Unit Tests (20 tests)
@@ -113,4 +111,5 @@ jobs:
        run: >
          uv run pytest
          9_Firmware/tests/cross_layer/test_cross_layer_contract.py
+          9_Firmware/tests/cross_layer/test_mem_validation.py
          -v --tb=short
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@@ -635,13 +635,13 @@
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-"12";"100R";"RR0201";"R0201";"R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R173";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
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-"34";"100pF";"CC0201";"C0201";"C66, C68, C73, C79, C81, C124, C130, C132, C137, C139, C145, C147, C152, C161, C167, C169, C174, C183, C200, C202, C207, C209, C214, C216, C221, C223, C228, C230, C235, C237, C242, C244, C249, C251";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
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-"2";"12pF";"CC0201";"C0201";"C184, C185";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
-"37";"142-0731-211";"142-0731-211";"1420731211";"J1, J18, J20, J22, J23, J24, J25, J26, J27, J28, J29, J30, J31, J32, J33, J34, J35, J36, J37, J38, J39, J40, J41, J42, J43, J44, J45, J46, J47, J48, J49, J50, J51, J52, J53, J54, J55";"SMA Connector Jack, Female Socket 50 Ohms Through Hole Solder";"";"";"";"";"SMA Connector Jack, Female Socket 50 Ohms Through Hole Solder";"9.8852mm";"Cinch Connectivity Solutions";"142-0731-211";"";"";"530-142-0731-211";"https://www.mouser.co.uk/ProductDetail/Johnson-Cinch-Connectivity-Solutions/142-0731-211?qs=HFfMDpzxxd0OVzI3hm9tuA%3D%3D";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
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-"49";"1k";"RR0201";"R0201";"R41, R43, R55, R56, R57, R58, R59, R61, R82, R85, R86, R87, R88, R93, R94, R99, R100, R101, R102, R107, R108, R109, R118, R124, R125, R126, R127, R128, R129, R130, R131, R133, R134, R135, R136, R137, R138, R139, R140, R144, R147, R148, R149, R167, R168, R169, R170, R171, R172";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
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-"51";"1pF";"CC0201";"C0201";"C70, C71, C72, C83, C84, C85, C126, C128, C129, C134, C135, C136, C142, C143, C144, C149, C150, C151, C163, C165, C166, C171, C172, C173, C197, C198, C199, C204, C205, C206, C211, C212, C213, C218, C219, C220, C225, C226, C227, C232, C233, C234, C239, C240, C241, C246, C247, C248, C253, C254, C255";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
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-"3";"2.2uF";"CC0201";"C0201";"C22, C23, C164";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
-"16";"2.443k";"RR0201";"R0201";"R89, R90, R91, R92, R95, R96, R97, R98, R103, R104, R105, R106, R119, R120, R121, R122";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
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-"4";"200R";"RR0201";"R0201";"R16, R17, R20, R21";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
-"1";"20k";"R-EU_R0402";"R0402";"R38";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"";"";"";"";"R";"";"";
-"40";"22-23-2021";"22-23-2021";"22-23-2021";"X1, X4, X5, X6, X7, X8, X9, X10, X11, X12, X13, X14, X15, X16, X17, X18, X19, X20, X21, X22, X24, X54, X55, X56, X_1, X_2, X_3, X_4, X_5, X_6, X_7, X_8, X_9, X_10, X_11, X_12, X_13, X_14, X_15, X_16";".100" (2.54mm) Center Header - 2 Pin";"";"";"";"";"";"";"";"";"MOLEX";"";"";"";"";"22-23-2021";"1462926";"25C3832";"";"40";"";"";"";"";"";"";"";"";
-"16";"22-23-2031";"22-23-2031";"22-23-2031";"X3, X38, X39, X40, X41, X42, X43, X44, X45, X46, X47, X48, X49, X50, X51, X52";".100" (2.54mm) Center Header - 3 Pin";"";"";"";"";"";"";"";"";"MOLEX";"";"";"";"";"22-23-2031";"1462950";"30C0862";"";"35";"";"";"";"";"";"";"";"";
-"11";"22.1k";"RR0201";"R0201";"R154, R155, R156, R157, R158, R159, R160, R161, R162, R163, R164";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
-"13";"22R";"RR0201";"R0201";"R23, R24, R25, R26, R27, R28, R29, R30, R49, R51, R62, R63, R64";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
-"2";"22pF";"CC0201";"C0201";"C308, C309";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
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-"2";"24R";"R-EU_R0402";"R0402";"R1, R13";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"";"";"";"";"R";"";"";
-"2";"25R";"RR0201";"R0201";"R165, R166";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
-"4";"25pF";"CC0201";"C0201";"C64, C65, C268, C270";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
-"1";"3.3uF";"CC0201";"C0201";"C191";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
-"2";"32.8pF";"CC0201";"C0201";"C59, C127";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
-"1";"3k2";"RR0201";"R0201";"R33";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
-"2";"4.3k";"R-EU_R0201";"R0201";"R15, R32";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"";"";"";"";"R";"";"";
-"2";"4.3pF";"CC0201";"C0201";"C20, C21";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
-"27";"4.7k";"RR0201";"R0201";"R42, R44, R45, R46, R47, R48, R50, R52, R53, R54, R65, R66, R67, R68, R69, R70, R71, R72, R73, R74, R75, R76, R77, R117, R141, R142, R143";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"R";"";"";
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-"8";"4.7uF";"CC0201";"C0201";"C108, C109, C153, C154, C177, C178, C287, C289";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"NONE";"C";"";"";
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-"1";"AT93C46A-10SQ-2.7";"AT93C46A-10SQ-2.7";"SOIC8";"IC1";"Three-wire Automotive Temperature Serial EEPROM 1K (64 x 16)";"";"";"";"";"";"";"";"";"";"";"";"";"";"AT93C46DN-SH-B";"1455086";"58M3879";"";"0";"";"";"";"";"";"";"";"";
-"5";"BLM15HB121SN1";"BLM15HB121SN1";"0402";"L5, L6, L7, L19, L20";"EMIFIL (R) Chip Ferrite Bead for GHz Noise";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"";"";"";"";"";"";"";
-"2";"BPF2";"BPF2";"BPF2";"U$2, U$3";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
-"4";"Blue";"LED-BLUE0603";"LED-0603";"D2, D3, D4, D5";"Blue SMD LED";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"DIO-08575";"";"";"";"";"";"Blue";
-"2";"CJT-T-P-HH-ST-TH1";"CJT-T-P-HH-ST-TH1";"CJTTPHHSTTH1";"J19, J21";"Conn Twinax F 0Hz to 4GHz 100Ohm Solder ST Thru-Hole Gold";"";"";"";"";"Conn Twinax F 0Hz to 4GHz 100Ohm Solder ST Thru-Hole Gold";"7.31mm";"SAMTEC";"CJT-T-P-HH-ST-TH1";"";"";"200-CJTTPHHSTTH1";"https://www.mouser.co.uk/ProductDetail/Samtec/CJT-T-P-HH-ST-TH1?qs=PB6%2FjmICvI3dfW8RDpxn0g%3D%3D";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
-"2";"DAC5578SRGET";"DAC5578SRGET";"RGE24_2P7X2P7";"U7, U69";"";"";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"https://www.ti.com/lit/gpn/dac5578";"8-bit, Octal Channel, Ultra-Low Glitch, Voltage Output, 2-Wire Interface DAC 24-VQFN -40 to 125";"";"Texas Instruments";"DAC5578SRGET";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
-"1";"ECS-120-10-36B2-JTN-TR";"CRYSTAL-12MHZ";"CRYSTAL-SMD-2X2.5MM";"Y1";"12.0MHz Crystal";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"XTAL-15540";"";"";"";"";"";"";
-"1";"EP4RKU+";"EP4RKU+";"DG1677-2_MNC";"U16";"";"";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"EP4RKU+";"";"Mini Circuits";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
-"1";"FT2232HQ";"FT2232HQ";"64QFN_FT2232HQ_FTD";"U6";"";"";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"";"";"";"";"FT2232HQ";"";"FTDI, Future Technology Devices International Ltd";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
-"16";"INA241A3IDGKRDGK0008A-MFG";"INA241A3IDGKRDGK0008A-MFG";"DGK0008A-MFG";"U11, U73, U74, U75, U76, U77, U78, U79, U80, U81, U82, U83, U84, U85, U86, U87";"";"";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"";"-5-V to 110-V bidirectional ultraprecise current sense amplifier with enhanced PWM rejection 8-VSSOP -40 to 125";"";"Texas Instruments";"INA241A3IDGKR";"";"";"";"";"";"";"";"";"";"";"";"";"RefDes";"";"";"";"TYPE";"";
-"2";"LTC5552IUDBTRMPBF";"LTC5552IUDBTRMPBF";"UDB_12_ADI";"U5, U13";"";"";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"LTC5552IUDB#TRMPBF";"";"Analog Devices Inc";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
-"17";"M3SWA2-34DR+";"M3SWA2-34DR+";"16_QFN";"RF_SW_1, RF_SW_2, RF_SW_3, RF_SW_4, RF_SW_5, RF_SW_6, RF_SW_7, RF_SW_8, RF_SW_9, RF_SW_10, RF_SW_11, RF_SW_12, RF_SW_13, RF_SW_14, RF_SW_15, RF_SW_16, U$1";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
-"2";"MINI-USB-32005-201";"MINI-USB-32005-201";"32005-201";"X2, X53";"MINI USB-B Conector";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"unknown";"unknown";"";"5";"";"";"";"";"";"";"";"";
-"1";"MOMENTARY-SWITCH-SPST-SMD-4.6X2.8MM";"MOMENTARY-SWITCH-SPST-SMD-4.6X2.8MM";"TACTILE_SWITCH_SMD_4.6X2.8MM";"S1";"Momentary Switch (Pushbutton) - SPST";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"SWCH-15606";"";"";"";"";"";"";
-"1";"MT25QL01GBBB8E12-0AUT";"MT25QL01GBBB8E12-0AUT";"BGA24_MT25QL_MRN";"U9";"";"";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"MT25QL01GBBB8E12-0AUT";"";"Micron";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
-"1";"NX3215SA-32.768KHz";"NX3225GD-8MHZ-STD-CRA-3";"XTAL_NX3225GD-8MHZ-STD-CRA-3_N";"XTAL3";"";"";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"NX3225GD-8MHZ-STD-CRA-3";"";"NDK";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
-"1";"NX3225GD-8MHZ-STD-CRA-3";"NX3225GD-8MHZ-STD-CRA-3";"XTAL_NX3225GD-8MHZ-STD-CRA-3_N";"XTAL1";"";"";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"NX3225GD-8MHZ-STD-CRA-3";"";"NDK";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
-"4";"OPA4703EA/250";"OPA4703EA/250";"PW14";"OPA_1, OPA_2, OPA_3, OPA_4";"";"";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"https://www.ti.com/lit/gpn/opa4703";"Quad, 12-V, 1-MHz, low-offset operational amplifier 14-TSSOP -40 to 85";"";"Texas Instruments";"OPA4703EA/250";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
-"1";"STM32F746ZGT7";"STM32F746ZGT7";"LQFP-144_STM";"U2";"";"";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"STM32F746ZGT7";"";"STMicroelectronics";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
-"34";"SZMMSZ5232BT1G";"SZMMSZ5232BT1G";"SOD-123_ONS";"U14, U15, U17, U37, U38, U39, U40, U41, U43, U44, U45, U46, U47, U48, U49, U50, U51, U52, U53, U54, U55, U56, U57, U58, U59, U60, U61, U62, U63, U64, U65, U66, U67, U68";"";"";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"SZMMSZ5232BT1G";"";"onsemi";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
-"1";"XC7A50T-2FTG256I";"XC7A50T-2FTG256I";"BGA256C100P16X16_1700X1700X155";"U42";"Artix-7 Field Programmable Gate Array (FPGA) IC 170 2764800 52160 256-LBGA  Check availability";"In Stock";"https://www.snapeda.com/parts/XC7A50T-2FTG256I/Xilinx/view-part/?ref=eda";"";"";"                                                      Artix-7 Field Programmable Gate Array (FPGA) IC 170 2764800 52160 256-LBGA                                              ";"";"";"";"Xilinx Inc.";"";"";"";"XC7A50T-2FTG256I";"";"";"";"LBGA-256 Xilinx Inc.";"";"None";"";"";"https://www.snapeda.com/parts/XC7A50T-2FTG256I/Xilinx/view-part/?ref=snap";"";"";"";"";
@@ -1,8 +1,8 @@
 Generated by EAGLE CAM Processor 7.4.0

-Drill Station Info File: C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/MainBoard_Prod_V2/RADAR_Main_Board.dri
+Drill Station Info File: C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/MainBoard_Test/RADAR_Main_Board.dri

- Date              : 19/04/2026 23:21
+ Date              : 06/04/2026 22:10
 Drills            : generated
 Device            : Excellon drill station, coordinate format 2.5 inch

@@ -27,8 +27,8 @@ Drills used:

 Code  Size       used

- T01   0.0059inch  1604
- T02   0.0079inch  2243
+ T01   0.0059inch  1609
+ T02   0.0079inch  1892
 T03   0.0100inch    18
 T04   0.0118inch   355
 T05   0.0138inch   113
@@ -43,8 +43,8 @@ Drills used:
 T14   0.0472inch     4
 T15   0.1260inch     8

-Total number of drills: 4784
+Total number of drills: 4438

 Plotfiles:

- C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/MainBoard_Prod_V2/RADAR_Main_Board.drd
+ C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/MainBoard_Test/RADAR_Main_Board.drd
@@ -1,9 +1,9 @@
 Generated by EAGLE CAM Processor 7.4.0

-Photoplotter Info File: C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/MainBoard_Prod_V2/RADAR_Main_Board.gpi
+Photoplotter Info File: C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/MainBoard_Test/RADAR_Main_Board.gpi

- Date              : 19/04/2026 23:50
- Plotfile          : C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/MainBoard_Prod_V2/RADAR_Main_Board.bsk
+ Date              : 06/04/2026 22:41
+ Plotfile          : C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/MainBoard_Test/RADAR_Main_Board.bsk
 Apertures         : generated: 
 Device            : Gerber RS-274-X photoplotter, coordinate format 2.5 inch

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+X68913Y45291
+X66945Y45291
+X64976Y45291
+X64976Y43126
+X66945Y43126
+X68913Y43126
+X63008Y43126
+X61039Y43126
+X59071Y43126
+X59071Y45291
+X61039Y45291
+X63008Y45291
 X73835Y50606
 X73835Y52772
 X73835Y55134
@@ -83,74 +113,7 @@ X71276Y85449
 X69307Y82693
 X66551Y79937
 X74228Y88402
-X59428Y48446
-X59071Y45291
-X61039Y45291
-X63008Y45291
-X63008Y43126
-X61039Y43126
-X59071Y43126
-X59071Y40961
-X61039Y40961
-X61039Y38992
-X59071Y38992
-X59071Y37024
-X61039Y37024
-X63008Y37024
-X63008Y38992
-X63008Y40961
-X64976Y40961
-X64976Y38992
-X64976Y37024
-X64976Y35055
-X66945Y35055
-X68913Y35055
-X68913Y37024
-X68913Y38992
-X66945Y38992
-X66945Y37024
-X66945Y40961
-X68913Y40961
-X68913Y43126
-X66945Y43126
-X64976Y43126
-X64976Y45291
-X66945Y45291
-X68913Y45291
-X70882Y45291
-X72850Y45291
-X72850Y43126
-X70882Y43126
-X70882Y40961
-X72850Y40961
-X72850Y38992
-X70882Y38992
-X70882Y37024
-X72850Y37024
-X72850Y35055
-X70882Y35055
-X63008Y35055
-X61039Y35055
-X59071Y35055
-X57102Y35055
-X57102Y37024
-X57102Y38992
-X57102Y40961
-X57102Y43126
-X57102Y45291
 T02
-X54150Y45079
-X50213Y45079
-X46276Y45079
-X42339Y45079
-X38402Y45079
-X34465Y45079
-X34465Y51000
-X38402Y51000
-X42339Y51000
-X46276Y51000
-X50213Y51000
-X54150Y51000
 X76000Y51197
 X79937Y51197
 X83874Y51197
@@ -163,13 +126,36 @@ X87811Y45276
 X83874Y45276
 X79937Y45276
 X76000Y45276
+X54150Y45079
+X50213Y45079
+X46276Y45079
+X42339Y45079
+X38402Y45079
+X34465Y45079
+X34465Y51000
+X38402Y51000
+X42339Y51000
+X46276Y51000
+X50213Y51000
+X54150Y51000
 T03
-X78756Y38205
-X80724Y41354
-X80921Y33283
+X50409Y39386
+X49819Y33874
+X50409Y26787
+X55724Y29150
+X59661Y25409
+X63992Y30331
+X66748Y24819
+X70094Y30134
+X72850Y26000
+X76000Y30331
+X78559Y24425
 X82299Y27969
 X84661Y24622
 X85252Y31118
+X80921Y33283
+X78756Y38205
+X80724Y41354
 X91551Y31709
 X91945Y27181
 X97063Y28756
@@ -331,17 +317,6 @@ X8087Y52969
 X40567Y25016
 X43520Y28756
 X42929Y31709
-X49819Y33874
-X50409Y39386
-X55724Y29150
-X59661Y25409
-X63992Y30331
-X66748Y24819
-X70094Y30134
-X72850Y26000
-X76000Y30331
-X78559Y24425
-X50409Y26787
 X110055Y25016
 X110646Y29346
 X110449Y32299
@@ -2,14 +2,14 @@ Generated by EAGLE CAM Processor 7.4.0

 Drill Station Info File: C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/PowerAmplifierBoard/RF_PA.dri

- Date              : 19/04/2026 01:42
+ Date              : 05/04/2026 00:08
 Drills            : generated
 Device            : Excellon drill station, coordinate format 2.5 inch

 Parameter settings:

- Tolerance Drill + :  0.00 %
- Tolerance Drill - :  0.00 %
+ Tolerance Drill + :  2.50 %
+ Tolerance Drill - :  2.50 %
 Rotate            : no
 Mirror            : no
 Optimize          : yes
@@ -27,7 +27,7 @@ Drills used:

 Code  Size       used

- T01   0.0059inch   128
+ T01   0.0059inch   103
 T02   0.0079inch    24
 T03   0.0138inch   215
 T04   0.0394inch     5
@@ -35,7 +35,7 @@ Drills used:
 T06   0.0520inch     2
 T07   0.1260inch     7

-Total number of drills: 389
+Total number of drills: 364

 Plotfiles:

@@ -2,7 +2,7 @@ Generated by EAGLE CAM Processor 7.4.0

 Photoplotter Info File: C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/PowerAmplifierBoard/RF_PA.gpi

- Date              : 19/04/2026 01:42
+ Date              : 05/04/2026 00:07
 Plotfile          : C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/PowerAmplifierBoard/RF_PA.fab
 Apertures         : generated: 
 Device            : Gerber RS-274-X photoplotter, coordinate format 2.5 inch
@@ -1,10 +0,0 @@
-G75*
-%MOIN*%
-%OFA0B0*%
-%FSLAX25Y25*%
-%IPPOS*%
-%LPD*%
-%AMOC8*
-5,1,8,0,0,1.08239X$1,22.5*
-%
-M02*
@@ -1,10 +0,0 @@
-G75*
-%MOIN*%
-%OFA0B0*%
-%FSLAX25Y25*%
-%IPPOS*%
-%LPD*%
-%AMOC8*
-5,1,8,0,0,1.08239X$1,22.5*
-%
-M02*
@@ -1,29 +0,0 @@
-"Qty";"Value";"Device";"Package";"Parts";"Description";"COPYRIGHT";"DATASHEET";"DESCRIPTION";"HEIGHT";"MANUFACTURER_NAME";"MANUFACTURER_PART_NUMBER";"MF";"MFR_NAME";"MOUSER_PART_NUMBER";"MOUSER_PRICE-STOCK";"MPN";"OC_FARNELL";"OC_NEWARK";"POPULARITY";"REFDES";"SPICEPREFIX";"TYPE";
-"1";"";"AK300/2";"AK300/2";"X1";"CONNECTOR";"";"";"";"";"";"";"";"";"";"";"";"unknown";"unknown";"16";"";"";"";
-"1";"";"MA10-2";"MA10-2";"SV1";"PIN HEADER";"";"";"";"";"";"";"";"";"";"";"";"unknown";"unknown";"3";"";"";"";
-"21";"0.1µF";"C-EUC0805";"C0805";"C1, C6, C12, C18, C29, C30, C36, C42, C54, C60, C66, C71, C76, C77, C83, C89, C109, C119, C129, C144, C154";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"88";"";"C";"";
-"27";"10k";"R-EU_M0805";"M0805";"R2, R4, R6, R8, R10, R12, R14, R16, R18, R20, R22, R24, R26, R28, R30, R32, R34, R36, R38, R40, R42, R44, R46, R48, R50, R52, R56";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"45";"";"R";"";
-"4";"10nF";"C-EUC0603";"C0603";"C150, C152, C160, C162";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"73";"";"C";"";
-"4";"10µF";"C-EUC0603";"C0603";"C151, C153, C161, C163";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"73";"";"C";"";
-"60";"10µF";"C-EUC0805";"C0805";"C4, C5, C9, C10, C15, C16, C21, C22, C24, C25, C28, C33, C34, C39, C40, C45, C46, C50, C51, C52, C53, C57, C58, C63, C64, C69, C70, C74, C75, C80, C81, C86, C87, C92, C93, C94, C95, C108, C112, C113, C114, C115, C118, C122, C123, C124, C125, C128, C132, C133, C134, C135, C138, C139, C140, C143, C147, C148, C157, C158";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"88";"";"C";"";
-"2";"11.5k";"R-EU_M0805";"M0805";"R54, R58";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"45";"";"R";"";
-"4";"12k";"R-EU_M0805";"M0805";"R9, R35, R43, R47";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"45";"";"R";"";
-"1";"13.7k";"R-EU_M0805";"M0805";"R3";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"45";"";"R";"";
-"12";"1µF";"C-EUC0805";"C0805";"C26, C27, C106, C107, C116, C117, C126, C127, C136, C137, C141, C142";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"88";"";"C";"";
-"2";"2.2µH";"POWER_INDUCTOR";"IND_VLP8040T-1R0N_TDK";"U$1, U$2";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
-"35";"22-23-2021";"22-23-2021";"22-23-2021";"X2, X3, X4, X5, X6, X7, X8, X9, X10, X11, X12, X13, X14, X15, X16, X17, X18, X19, X20, X21, X22, X23, X24, X25, X26, X27, X28, X29, X30, X31, X32, X33, X34, X35, X36";".100" (2.54mm) Center Header - 2 Pin";"";"";"";"";"";"";"MOLEX";"";"";"";"22-23-2021";"1462926";"25C3832";"40";"";"";"";
-"52";"22µF";"C-EUC0603";"C0603";"C2, C3, C7, C8, C11, C13, C14, C17, C19, C20, C23, C31, C32, C35, C37, C38, C41, C43, C44, C47, C48, C49, C55, C56, C59, C61, C62, C65, C67, C68, C72, C73, C78, C79, C82, C84, C85, C88, C90, C91, C110, C111, C120, C121, C130, C131, C145, C146, C149, C155, C156, C159";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"73";"";"C";"";
-"1";"23.4k";"R-EU_M0805";"M0805";"R49";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"45";"";"R";"";
-"1";"2k";"R-EU_M0805";"M0805";"R39";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"45";"";"R";"";
-"1";"3.09k";"R-EU_M0805";"M0805";"R1";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"45";"";"R";"";
-"19";"3.3µH";"POWER_INDUCTOR";"IND_VLP8040T-1R0N_TDK";"U$3, U$4, U$5, U$6, U$7, U$8, U$9, U$10, U$11, U$12, U$13, U$14, U$15, U$16, U$17, U$18, U$19, U$20, U$21";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
-"6";"32.2k";"R-EU_M0805";"M0805";"R5, R7, R11, R13, R15, R19";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"45";"";"R";"";
-"1";"34.8k";"R-EU_M0805";"M0805";"R21";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"45";"";"R";"";
-"2";"35.7k";"R-EU_M0805";"M0805";"R53, R57";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"45";"";"R";"";
-"11";"56.2k";"R-EU_M0805";"M0805";"R17, R23, R25, R27, R29, R31, R37, R41, R45, R51, R55";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"45";"";"R";"";
-"1";"61.9k";"R-EU_M0805";"M0805";"R33";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"";"45";"";"R";"";
-"6";"ADM7151ACPZ-04-R7";"ADM7151ACPZ-04-R7";"CP_8_11_ADI";"U5, U23, U25, U27, U29, U30";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"https://www.analog.com/media/en/technical-documentation/data-sheets/ADM7151.pdf";"800 mA Ultralow Noise, High PSRR, RF Linear Regulator";"";"Analog Devices Inc";"ADM7151ACPZ-04-R7";"";"";"";"";"";"";"";"";"";"";"";
-"5";"LM2662MX/NOPB";"LM2662MX/NOPB";"M08A";"U18, U19, U20, U21, U22";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"";"LM2662MX/NOPB";"";"Texas Instruments";"";"";"";"";"";"";"";"";"LM2662M";
-"10";"T521W476M020ATE045";"T521W476M020ATE045";"T521W";"C96, C97, C98, C99, C100, C101, C102, C103, C104, C105";"T521, Tantalum, Polymer Tantalum, Commercial Grade, 47 uF, 20%, 20 VDC, 105C, -55C, 105C, SMD, Polymer, Molded, Low Profile/ESR, NonCombustible, 2,000 Hrs, 9 % , 45 mOhms, 94 uA, 222.95 mg, 7343, 1.4mm, Height Max = 1.5mm, 1000, 52  Weeks";"";"";"T521, Tantalum, Polymer Tantalum, Commercial Grade, 47 uF, 20%, 20 VDC, 105C, -55C, 105C, SMD, Polymer, Molded, Low Profile/ESR, NonCombustible, 2,000 Hrs, 9 % , 45 mOhms, 94 uA, 222.95 mg, 7343, 1.4mm, Height Max = 1.5mm, 1000, 52  Weeks";"1.5mm";"KEMET";"T521W476M020ATE045";"";"";"80-T521W476M20ATE045";"https://www.mouser.co.uk/ProductDetail/KEMET/T521W476M020ATE045?qs=Ad%252Bh9aq9FyVtchBw1jwoFA%3D%3D";"";"";"";"";"";"";"";
-"21";"TPS562208DDCT";"TPS562208DDCT";"DDC0006A_N";"U1, U2, U3, U4, U6, U7, U8, U9, U10, U11, U12, U13, U14, U15, U16, U17, U24, U26, U28, U31, U33";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"https://www.ti.com/lit/gpn/tps562208";"4.5 V to 17 V input, 2 A output, synchronous step-down converter in FCCM mode 6-SOT-23-THIN -40 to 125";"";"Texas Instruments";"TPS562208DDCT";"";"";"";"";"";"";"";"";"RefDes";"";"TYPE";
-"2";"TPS7A8300RGRR";"TPS7A8300RGRR";"RGR20_2P05X2P05_TEX";"U32, U34";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"https://www.ti.com/lit/gpn/tps7a8300";"2-A, low-VIN, low-2-A, low-VIN, low-noise, ultra-low-dropout voltage regulator with power good wi 20-VQFN -40 to 125";"";"Texas Instruments";"TPS7A8300RGRR";"";"";"";"";"";"";"";"";"";"";"";
@@ -2,7 +2,7 @@ Generated by EAGLE CAM Processor 7.4.0

 Drill Station Info File: C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/PowerBoard/PowerBoard.dri

- Date              : 19/04/2026 19:18
+ Date              : 04/04/2026 22:46
 Drills            : generated
 Device            : Excellon drill station, coordinate format 2.5 inch

@@ -1,36 +0,0 @@
-Generated by EAGLE CAM Processor 7.4.0
-
-Photoplotter Info File: C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/PowerBoard/PowerBoard.gpi
-
- Date              : 19/04/2026 19:21
- Plotfile          : C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/PowerBoard/PowerBoard.bsp
- Apertures         : generated: 
- Device            : Gerber RS-274-X photoplotter, coordinate format 2.5 inch
-
-Parameter settings:
-
- Emulate Apertures : no
- Tolerance Draw  + :  0.00 %
- Tolerance Draw  - :  0.00 %
- Tolerance Flash + :  0.00 %
- Tolerance Flash - :  0.00 %
- Rotate            : no
- Mirror            : no
- Optimize          : yes
- Auto fit          : yes
- OffsetX           : 0inch
- OffsetY           : 0inch
-
-Plotfile Info:
-
- Coordinate Format : 2.5
- Coordinate Units  : Inch
- Data Mode         : Absolute
- Zero Suppression  : None
- End Of Block      : *
-
-Apertures used:
-
- Code     Shape     Size                  used
-
-
@@ -1288,6 +1288,13 @@ X0061780Y0026543D03*
 X0033236Y0247016D03*
 D44*
 X0102724Y0243571D03*
+X0102724Y0234713D03*
+X0102724Y0234713D03*
+X0100854Y0226740D03*
+X0109220Y0227921D03*
+X0118177Y0228118D03*
+X0127429Y0228217D03*
+X0136976Y0228217D03*
 X0102823Y0255579D03*
 X0102528Y0264437D03*
 X0102528Y0273197D03*
@@ -1306,11 +1313,6 @@ X0139535Y0349378D03*
 X0139142Y0363551D03*
 X0086386Y0388748D03*
 X0065913Y0348197D03*
-X0109220Y0227921D03*
-X0100854Y0226740D03*
-X0118177Y0228118D03*
-X0127429Y0228217D03*
-X0136976Y0228217D03*
 X0213551Y0178118D03*
 X0223000Y0177921D03*
 X0223197Y0167882D03*
@@ -134,10 +134,8 @@ X0045441Y0113945D03*
 X0023000Y0123906D03*
 X0023000Y0133906D03*
 X0100854Y0226740D03*
-X0109220Y0227921D03*
-X0118177Y0228118D03*
-X0127429Y0228217D03*
-X0136976Y0228217D03*
+X0102724Y0234713D03*
+X0102724Y0234713D03*
 X0102724Y0243571D03*
 X0102823Y0255579D03*
 X0102528Y0264437D03*
@@ -184,10 +182,14 @@ X0294063Y0355677D03*
 X0348787Y0374969D03*
 X0374181Y0345717D03*
 X0374181Y0335717D03*
-X0086386Y0388748D03*
+X0136976Y0228217D03*
+X0127429Y0228217D03*
+X0118177Y0228118D03*
+X0109220Y0227921D03*
+X0065913Y0348197D03*
 X0057921Y0382843D03*
 X0047921Y0382843D03*
-X0065913Y0348197D03*
+X0086386Y0388748D03*
 D15*
 X0005717Y0400126D02*
 X0005717Y0009654D01*
@@ -136,10 +136,8 @@ X0045441Y0113945D03*
 X0023000Y0123906D03*
 X0023000Y0133906D03*
 X0100854Y0226740D03*
-X0109220Y0227921D03*
-X0118177Y0228118D03*
-X0127429Y0228217D03*
-X0136976Y0228217D03*
+X0102724Y0234713D03*
+X0102724Y0234713D03*
 X0102724Y0243571D03*
 X0102823Y0255579D03*
 X0102528Y0264437D03*
@@ -186,48 +184,96 @@ X0294063Y0355677D03*
 X0348787Y0374969D03*
 X0374181Y0345717D03*
 X0374181Y0335717D03*
-X0086386Y0388748D03*
+X0136976Y0228217D03*
+X0127429Y0228217D03*
+X0118177Y0228118D03*
+X0109220Y0227921D03*
+X0065913Y0348197D03*
 X0057921Y0382843D03*
 X0047921Y0382843D03*
-X0065913Y0348197D03*
+X0086386Y0388748D03*
 D15*
-X0033236Y0247016D03*
-X0164142Y0226346D03*
-X0164929Y0222213D03*
-X0168669Y0220047D03*
-X0173394Y0221996D03*
-X0173197Y0224063D03*
-X0173000Y0226346D03*
-X0172213Y0228453D03*
-X0174181Y0229969D03*
-X0174181Y0231937D03*
-X0174181Y0234024D03*
-X0174181Y0235795D03*
+X0179299Y0276740D03*
+X0179102Y0272016D03*
+X0183433Y0265323D03*
+X0186189Y0265323D03*
+X0186189Y0262567D03*
+X0183433Y0262567D03*
+X0175953Y0261976D03*
+X0168276Y0251937D03*
 X0177173Y0240559D03*
 X0179496Y0240717D03*
-X0184614Y0244063D03*
-X0184614Y0250559D03*
-X0194457Y0246228D03*
-X0194457Y0240126D03*
-X0194654Y0235795D03*
-X0190717Y0235992D03*
-X0188748Y0235992D03*
-X0184614Y0235795D03*
+X0174181Y0235795D03*
+X0174181Y0234024D03*
+X0174181Y0231937D03*
+X0174181Y0229969D03*
+X0172213Y0228453D03*
+X0173000Y0226346D03*
+X0173197Y0224063D03*
+X0173394Y0221996D03*
 X0174181Y0220047D03*
 X0174181Y0218079D03*
 X0173787Y0216110D03*
 X0173591Y0213945D03*
 X0171622Y0210402D03*
-X0184614Y0208630D03*
-X0186583Y0208827D03*
-X0192488Y0209614D03*
-X0194457Y0209614D03*
+X0168669Y0220047D03*
+X0164929Y0222213D03*
+X0164142Y0226346D03*
+X0166504Y0232252D03*
+X0184614Y0235795D03*
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@@ -352,24 +387,10 @@ X0272213Y0227921D03*
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 X0235008Y0240717D03*
 X0231661Y0240913D03*
 X0230677Y0235992D03*
@@ -322,24 +369,12 @@ X0250953Y0209811D03*
 X0248984Y0209811D03*
 X0243079Y0209811D03*
 X0241110Y0209811D03*
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-X0247213Y0235795D03*
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 X0251150Y0246425D03*
 X0271622Y0263945D03*
 X0270047Y0265717D03*
@@ -355,24 +390,10 @@ X0272213Y0227921D03*
 X0274575Y0226937D03*
 X0308079Y0212921D03*
 X0310402Y0215126D03*
-X0252528Y0178906D03*
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-X0251563Y0147114D03*
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-X0256020Y0147016D03*
 X0258157Y0146819D03*
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 X0245835Y0146819D03*
 X0243079Y0147213D03*
 X0241504Y0145835D03*
@@ -382,30 +403,11 @@ X0230480Y0145835D03*
 X0228315Y0145835D03*
 X0224378Y0145835D03*
 X0222409Y0145835D03*
-X0245835Y0178906D03*
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-X0218472Y0190126D03*
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-X0209024Y0190520D03*
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 X0216307Y0210992D03*
-X0225756Y0220244D03*
-X0224575Y0226150D03*
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-X0166504Y0232252D03*
 X0138748Y0064535D03*
 X0109417Y0061386D03*
 X0061780Y0026543D03*
+X0033236Y0247016D03*
 D16*
 X0140520Y0263551D03*
 D17*
@@ -134,10 +134,8 @@ X0045441Y0113945D03*
 X0023000Y0123906D03*
 X0023000Y0133906D03*
 X0100854Y0226740D03*
-X0109220Y0227921D03*
-X0118177Y0228118D03*
-X0127429Y0228217D03*
-X0136976Y0228217D03*
+X0102724Y0234713D03*
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 X0102724Y0243571D03*
 X0102823Y0255579D03*
 X0102528Y0264437D03*
@@ -184,10 +182,14 @@ X0294063Y0355677D03*
 X0348787Y0374969D03*
 X0374181Y0345717D03*
 X0374181Y0335717D03*
-X0086386Y0388748D03*
+X0136976Y0228217D03*
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+X0065913Y0348197D03*
 X0057921Y0382843D03*
 X0047921Y0382843D03*
-X0065913Y0348197D03*
+X0086386Y0388748D03*
 D15*
 X0005717Y0400126D02*
 X0005717Y0009654D01*
@@ -349,6 +349,13 @@ X0061780Y0026543D03*
 X0033236Y0247016D03*
 D16*
 X0102724Y0243571D03*
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 X0102823Y0255579D03*
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@@ -367,11 +374,6 @@ X0139535Y0349378D03*
 X0139142Y0363551D03*
 X0086386Y0388748D03*
 X0065913Y0348197D03*
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 X0213551Y0178118D03*
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@@ -1,41 +0,0 @@
-"Qty";"Value";"Device";"Package";"Parts";"Description";"COPYRIGHT";"DESCRIPTION";"HEIGHT";"MANUFACTURER_NAME";"MANUFACTURER_PART_NUMBER";"MF";"MFR_NAME";"MOUSER_PART_NUMBER";"MOUSER_PRICE-STOCK";"MPN";"OC_FARNELL";"OC_NEWARK";"POPULARITY";"PROD_ID";"SPICEPREFIX";"VALUE";
-"3";"";"C-EUC0201";"C0201";"C4, C5, C7";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
-"5";"";"L-EUL5650M";"L5650M";"L9, L10, L11, L12, L13";"INDUCTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"L";"";
-"1";"";"PINHD-2X6";"2X06";"JP1";"PIN HEADER";"";"";"";"";"";"";"";"";"";"";"";"";"8";"";"";"";
-"1";"";"PINHD-2X7";"2X07";"JP2";"PIN HEADER";"";"";"";"";"";"";"";"";"";"";"";"";"8";"";"";"";
-"25";"0.1µF";"C-EUC0201";"C0201";"C16, C18, C20, C22, C24, C26, C28, C30, C32, C34, C35, C36, C37, C41, C42, C43, C44, C64, C65, C66, C67, C87, C88, C90, C91";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
-"1";"0.1µf";"C-EUC0201";"C0201";"C92";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
-"2";"0.33µF";"C-EUC0201";"C0201";"C2, C6";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
-"2";"0.47µF";"C-EUC0201";"C0201";"C9, C10";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
-"1";"0.47µf";"C-EUC0201";"C0201";"C3";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
-"3";"0.65k";"R-EU_R0201";"R0201";"R6, R8, R10";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"R";"";
-"9";"0R";"R-EU_R0201";"R0201";"R5, R14, R15, R19, R20, R27, R28, R32, R33";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"R";"";
-"8";"1.3nH";"L-USL0201";"L0201";"L1, L2, L3, L4, L5, L6, L7, L8";"INDUCTOR, American symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"L";"";
-"1";"1000pF";"C-EUC0201";"C0201";"C8";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
-"4";"100R";"R-EU_R0201";"R0201";"R1, R12, R13, R26";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"R";"";
-"2";"10nF";"C-EUC0201";"C0201";"C61, C84";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
-"3";"10nF";"C-EUC0402";"C0402";"C15, C17, C19";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"18";"";"C";"";
-"6";"10pF";"C-EUC0201";"C0201";"C1, C62, C63, C85, C86, C89";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
-"5";"10µF";"C-EUC1210";"C1210";"C23, C27, C31, C45, C47";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
-"11";"142-0731-211";"142-0731-211";"1420731211";"J1, J2, J5, J6, J7, J8, J9, J10, J11, J12, J13";"SMA Connector Jack, Female Socket 50 Ohms Through Hole Solder";"";"SMA Connector Jack, Female Socket 50 Ohms Through Hole Solder";"9.8852mm";"Cinch Connectivity Solutions";"142-0731-211";"";"";"530-142-0731-211";"https://www.mouser.co.uk/ProductDetail/Johnson-Cinch-Connectivity-Solutions/142-0731-211?qs=HFfMDpzxxd0OVzI3hm9tuA%3D%3D";"";"";"";"";"";"";"";
-"6";"1k";"R-EU_R0201";"R0201";"R2, R3, R4, R7, R9, R11";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"R";"";
-"10";"1µF";"C-EUC0201";"C0201";"C11, C12, C13, C14, C59, C68, C69, C70, C71, C82";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
-"8";"200k";"R-EU_R0201";"R0201";"R22, R23, R24, R25, R35, R36, R37, R38";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"R";"";
-"6";"22-23-2021";"22-23-2021";"22-23-2021";"X10, X11, X12, X13, X14, X15";".100" (2.54mm) Center Header - 2 Pin";"";"";"";"";"";"MOLEX";"";"";"";"22-23-2021";"1462926";"25C3832";"40";"";"";"";
-"3";"22R";"R-EU_R0201";"R0201";"R39, R40, R41";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"R";"";
-"6";"22µF";"C-EUC1210";"C1210";"C21, C25, C29, C33, C46, C51";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
-"2";"30R";"R-EU_R0201";"R0201";"R17, R30";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"R";"";
-"2";"31pF";"C-EUC0201";"C0201";"C60, C83";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
-"2";"330R";"R-EU_R0201";"R0201";"R18, R31";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"R";"";
-"20";"4.7µF";"C-EUC0201";"C0201";"C38, C39, C40, C48, C49, C50, C55, C56, C57, C58, C72, C73, C74, C75, C76, C77, C78, C79, C80, C81";"CAPACITOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"C";"";
-"2";"500R";"R-EU_R0201";"R0201";"R21, R34";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"R";"";
-"2";"931R";"R-EU_R0201";"R0201";"R16, R29";"RESISTOR, European symbol";"";"";"";"";"";"";"";"";"";"";"";"";"0";"";"R";"";
-"1";"AD9523BCPZ";"AD9523BCPZ";"QFN50P1000X1000X100-73N";"IC1";"AD9523BCPZ, PLL Clock Driver Dual, 72-Pin LFCSP VQ";"";"AD9523BCPZ, PLL Clock Driver Dual, 72-Pin LFCSP VQ";"mm";"Analog Devices";"AD9523BCPZ";"";"";"584-AD9523BCPZ";"https://www.mouser.com/Search/Refine.aspx?Keyword=584-AD9523BCPZ";"";"";"";"";"";"";"";
-"2";"ADF4382ABCCZ";"ADF4382ABCCZ";"CC-48-10_ADI";"U1, U6";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"ADF4382ABCCZ";"";"Analog Devices Inc";"";"";"";"";"";"";"";"";"";
-"4";"ATS1005-3DB-FD-T05";"ATS1005-3DB-FD-T05";"SMT_DB-FD-T05_SUS";"U4, U5, U8, U10";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"";"";"Susumu";"ATS1005-3DB-FD-T05";"";"";"";"";"";"";"";"";"";"";"";
-"2";"CJT-T-P-HH-ST-TH1";"CJT-T-P-HH-ST-TH1";"CONN_CJT-T-P-XX-ST-TH1_SAI";"J3, J4";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"";"";"Samtec Inc";"CJT-T-P-HH-ST-TH1";"";"";"";"";"";"";"";"";"";"";"";
-"2";"CVHD-950-50.000";"CVHD-950-50.000";"SMD4_CVHD-950_CRX";"X5, X6";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"";"";"Crystek Crystals";"CVHD-950-50.000";"";"";"";"";"";"";"";"";"";"";"";
-"1";"ECOC-2522-100.000-3HC";"ECOC-2522-100.000-3HC";"SMD5_ECOC-2522_25P4X22_ECS";"X4";"";"Copyright (C) 2025 Ultra Librarian. All rights reserved.";"";"";"ECS International";"ECOC-2522-100.000-3HC";"";"";"";"";"";"";"";"";"";"";"";
-"4";"FBMH1608HL601-T";"FBMH1608HL601-T";"BEADC1608X90N";"FB1, FB2, FB3, FB4";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";"";
-"2";"Green";"LED-GREEN-0603-WE";"LED-0603";"D1, D2";"Green SMD LED";"";"";"";"";"";"";"";"";"";"";"";"";"";"DIO-16512";"";"Green";
-"4";"MTX2-143+";"MTX2-143+";"DQ1225_MNC";"U2, U3, U7, U9";"";"Copyright (C) 2024 Ultra Librarian. All rights reserved.";"";"";"";"MTX2-143+";"";"Mini Circuits";"";"";"";"";"";"";"";"";"";
@@ -798,6 +798,8 @@ X127429Y228217
 X118177Y228118
 X109220Y227921
 X100854Y226740
+X102724Y234713
+X102724Y234713
 X102724Y243571
 X102823Y255579
 X102528Y264437
@@ -2,7 +2,7 @@ Generated by EAGLE CAM Processor 7.4.0

 Drill Station Info File: C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/FrequencySynthesizerBoard/Clocks_Freq_Synth_board.dri

- Date              : 19/04/2026 21:57
+ Date              : 05/04/2026 01:09
 Drills            : generated
 Device            : Excellon drill station, coordinate format 2.5 inch

@@ -33,13 +33,13 @@ Drills used:
 T04   0.0197inch    34
 T05   0.0250inch     4
 T06   0.0330inch     8
- T07   0.0394inch    82
+ T07   0.0394inch    84
 T08   0.0400inch    26
 T09   0.0470inch    44
 T10   0.0787inch     1
 T11   0.1260inch     4

-Total number of drills: 907
+Total number of drills: 909

 Plotfiles:

@@ -2,7 +2,7 @@ Generated by EAGLE CAM Processor 7.4.0

 Photoplotter Info File: C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/FrequencySynthesizerBoard/Clocks_Freq_Synth_board.gpi

- Date              : 19/04/2026 21:58
+ Date              : 05/04/2026 01:12
 Plotfile          : C:/Users/dell/Desktop/CrowdSupply/RADAR_V6/4_Schematics and Boards Layout/4_6_Schematics/FrequencySynthesizerBoard/Clocks_Freq_Synth_board.bsk
 Apertures         : generated: 
 Device            : Gerber RS-274-X photoplotter, coordinate format 2.5 inch
@@ -1,174 +0,0 @@
-C1 48.37 59.91  90 10pF C0201
-C2 31.74 13.52   0 0.33ｵF C0201
-C3 49.46 45.72   0 0.47ｵf C0201
-C4 49.48 43.39   0  C0201
-C5 49.52 42.39   0  C0201
-C6 49.52 41.92   0 0.33ｵF C0201
-C7 49.51 40.39   0  C0201
-C8 49.51 39.87   0 1000pF C0201
-C9 48.76 37.89  90 0.47ｵF C0201
-C10 48.63 39.42   0 0.47ｵF C0201
-C11 47.37 50.30 270 1ｵF C0201
-C12 46.81 50.30 270 1ｵF C0201
-C13 45.40 50.35 270 1ｵF C0201
-C14 44.82 50.35 270 1ｵF C0201
-C15 86.78 30.16   0 10nF C0402
-C16 49.07 44.65  90 0.1ｵF C0201
-C17 64.58 24.27 270 10nF C0402
-C18 50.57 34.64 180 0.1ｵF C0201
-C19 52.86 24.27 270 10nF C0402
-C20 55.66 34.54   0 0.1ｵF C0201
-C21 10.00 30.60 270 22ｵF C1210
-C22 58.71 34.53   0 0.1ｵF C0201
-C23 21.00 30.50 270 10ｵF C1210
-C24 62.13 37.42   0 0.1ｵF C0201
-C25 35.40  4.90 270 22ｵF C1210
-C26 61.84 40.65  90 0.1ｵF C0201
-C27 45.90  5.30 270 10ｵF C1210
-C28 62.06 43.41   0 0.1ｵF C0201
-C29 81.20  4.90 270 22ｵF C1210
-C30 57.71 46.83   0 0.1ｵF C0201
-C31 70.50  5.00 270 10ｵF C1210
-C32 54.48 46.90  90 0.1ｵF C0201
-C33 18.10 95.10  90 22ｵF C1210
-C34 49.20 38.86 180 0.1ｵF C0201
-C35 57.21 34.54   0 0.1ｵF C0201
-C36 61.16 34.74   0 0.1ｵF C0201
-C37 62.20 38.96   0 0.1ｵF C0201
-C38 42.23 55.44 180 4.7ｵF C0201
-C39 42.56 52.07 270 4.7ｵF C0201
-C40 46.11 50.52   0 4.7ｵF C0201
-C41 62.26 41.88   0 0.1ｵF C0201
-C42 61.85 45.25  90 0.1ｵF C0201
-C43 56.56 46.73   0 0.1ｵF C0201
-C44 52.33 46.82 180 0.1ｵF C0201
-C45 19.40 85.70 180 10ｵF C1210
-C46 34.30 93.80 270 22ｵF C1210
-C47 30.90 86.70   0 10ｵF C1210
-C48 48.11 50.54   0 4.7ｵF C0201
-C49 48.11 50.06   0 4.7ｵF C0201
-C50 51.64 53.12 270 4.7ｵF C0201
-C51 87.70 87.30  90 22ｵF C1210
-C55 44.21 59.60   0 4.7ｵF C0201
-C56 51.86 59.44 180 4.7ｵF C0201
-C57 51.69 57.60  90 4.7ｵF C0201
-C58 51.62 54.17 270 4.7ｵF C0201
-C59 49.65 49.57  90 1ｵF C0201
-C60 52.95 54.60  90 31pF C0201
-C61 53.66 52.04   0 10nF C0201
-C62 49.86 50.62 270 10pF C0201
-C63 45.84 61.00  90 10pF C0201
-C64 46.57 61.00  90 0.1ｵF C0201
-C65 45.15 61.00  90 0.1ｵF C0201
-C66 49.11 59.94  90 0.1ｵF C0201
-C67 47.66 59.94  90 0.1ｵF C0201
-C68 61.74 50.36 270 1ｵF C0201
-C69 61.19 50.33 270 1ｵF C0201
-C70 59.82 50.03 270 1ｵF C0201
-C71 59.19 50.02 270 1ｵF C0201
-C72 66.00 53.21 270 4.7ｵF C0201
-C73 66.10 54.16 270 4.7ｵF C0201
-C74 66.04 57.61  90 4.7ｵF C0201
-C75 64.72 59.83 180 4.7ｵF C0201
-C76 58.07 59.64   0 4.7ｵF C0201
-C77 56.62 55.38 180 4.7ｵF C0201
-C78 56.92 52.33 180 4.7ｵF C0201
-C79 60.47 50.84   0 4.7ｵF C0201
-C80 62.25 50.66 270 4.7ｵF C0201
-C81 62.70 50.66 270 4.7ｵF C0201
-C82 64.80 49.14 180 1ｵF C0201
-C83 67.62 55.61  90 31pF C0201
-C84 68.70 54.96  90 10nF C0201
-C85 63.74 50.66 270 10pF C0201
-C86 60.20 61.00  90 10pF C0201
-C87 60.94 61.00  90 0.1ｵF C0201
-C88 59.44 61.00  90 0.1ｵF C0201
-C89 62.70 59.91  90 10pF C0201
-C90 63.47 59.91  90 0.1ｵF C0201
-C91 61.97 59.91  90 0.1ｵF C0201
-C92 16.93 67.92 180 0.1ｵf C0201
-D1 41.75 59.88  90 Green LED-0603
-D2 56.83 60.61  90 Green LED-0603
-FB1 68.41 56.87 180 FBMH1608HL601-T BEADC1608X90N
-FB2 53.58 56.01 180 FBMH1608HL601-T BEADC1608X90N
-FB3 52.06 49.65   0 FBMH1608HL601-T BEADC1608X90N
-FB4 63.46 48.33 270 FBMH1608HL601-T BEADC1608X90N
-IC1 55.70 40.67   0 AD9523BCPZ QFN50P1000X1000X100-73N
-J1 52.94 90.00   0 142-0731-211 1420731211
-J2 92.86 49.36  90 142-0731-211 1420731211
-J5 64.56 17.84   0 142-0731-211 1420731211
-J6 52.79 18.27   0 142-0731-211 1420731211
-J7 92.71 30.20  90 142-0731-211 1420731211
-J8 92.71 16.28   0 142-0731-211 1420731211
-J9  9.85 82.37 180 142-0731-211 1420731211
-J10 45.93 74.00   0 142-0731-211 1420731211
-J11 60.20 74.00   0 142-0731-211 1420731211
-J12 74.38 71.98  45 142-0731-211 1420731211
-J13 11.67 67.91  90 142-0731-211 1420731211
-L1 48.80 59.32   0 1.3nH L0201
-L2 46.29 60.40   0 1.3nH L0201
-L3 45.44 60.40   0 1.3nH L0201
-L4 47.95 59.32   0 1.3nH L0201
-L5 60.67 60.40   0 1.3nH L0201
-L6 59.77 60.40   0 1.3nH L0201
-L7 63.17 59.31   0 1.3nH L0201
-L8 62.27 59.31   0 1.3nH L0201
-L9 15.40 31.90 180  L5650M
-L10 40.80  6.20 180  L5650M
-L11 75.80  6.30   0  L5650M
-L12 22.20 91.00  90  L5650M
-L13 29.60 92.70  90  L5650M
-R1 61.47 51.11   0 100R R0201
-R2  7.14 58.81 180 1k R0201
-R3  7.38 59.72 270 1k R0201
-R4 31.78 14.16   0 1k R0201
-R5 48.02 38.16   0 0R R0201
-R6 16.38 13.37 270 0.65k R0201
-R7 16.37 12.32 270 1k R0201
-R8 13.86 21.50  90 0.65k R0201
-R9 13.82 22.69  90 1k R0201
-R10 16.36 21.55  90 0.65k R0201
-R11 16.42 22.70  90 1k R0201
-R12 47.11 51.07   0 100R R0201
-R13 45.11 51.07   0 100R R0201
-R14 51.74 56.17 270 0R R0201
-R15 51.96 55.04   0 0R R0201
-R16 52.78 53.71 180 931R R0201
-R17 52.48 52.85  90 30R R0201
-R18 52.71 52.07   0 330R R0201
-R19 51.62 50.89   0 0R R0201
-R20 50.61 50.88   0 0R R0201
-R21 42.53 57.17 270 500R R0201
-R22 41.78 56.69 270 200k R0201
-R23 41.34 55.73  90 200k R0201
-R24 42.32 54.09 270 200k R0201
-R25 41.39 54.64 270 200k R0201
-R26 59.47 51.16   0 100R R0201
-R27 65.87 56.55   0 0R R0201
-R28 65.90 55.35   0 0R R0201
-R29 66.92 55.36 180 931R R0201
-R30 67.63 54.52  90 30R R0201
-R31 68.47 54.26   0 330R R0201
-R32 65.46 50.90   0 0R R0201
-R33 64.54 50.90   0 0R R0201
-R34 56.82 58.21 270 500R R0201
-R35 56.94 56.71 270 200k R0201
-R36 55.84 56.16 270 200k R0201
-R37 56.84 54.16 270 200k R0201
-R38 56.24 54.61 270 200k R0201
-R39 63.22 41.38   0 22R R0201
-R40 59.45 33.47 270 22R R0201
-R41 57.97 33.47 270 22R R0201
-U1 47.12 55.12 180 ADF4382ABCCZ CC-48-10_ADI
-U2 45.91 65.00 270 MTX2-143+ DQ1225_MNC
-U3 52.91 64.38 270 MTX2-143+ DQ1225_MNC
-U4 45.91 68.00 180 ATS1005-3DB-FD-T05 SMT_DB-FD-T05_SUS
-U5 52.94 68.68 180 ATS1005-3DB-FD-T05 SMT_DB-FD-T05_SUS
-U6 61.48 55.12 180 ADF4382ABCCZ CC-48-10_ADI
-U7 60.21 65.00 270 MTX2-143+ DQ1225_MNC
-U8 60.20 68.00 180 ATS1005-3DB-FD-T05 SMT_DB-FD-T05_SUS
-U9 67.91 65.62 225 MTX2-143+ DQ1225_MNC
-U10 70.09 67.84 135 ATS1005-3DB-FD-T05 SMT_DB-FD-T05_SUS
-X4 23.07 49.95   0 ECOC-2522-100.000-3HC SMD5_ECOC-2522_25P4X22_ECS
-X5 34.12 31.62  90 CVHD-950-50.000 SMD4_CVHD-950_CRX
-X6 33.87 19.97  90 CVHD-950-50.000 SMD4_CVHD-950_CRX
@@ -159,6 +159,8 @@ X0127429Y0228217D03*
 X0118177Y0228118D03*
 X0109220Y0227921D03*
 X0100854Y0226740D03*
+X0102724Y0234713D03*
+X0102724Y0234713D03*
 X0102724Y0243571D03*
 X0102823Y0255579D03*
 X0102528Y0264437D03*
@@ -1334,8 +1334,10 @@ X0102528Y0273197D03*
 X0102528Y0264437D03*
 X0102823Y0255579D03*
 X0102724Y0243571D03*
-X0109220Y0227921D03*
+X0102724Y0234713D03*
+X0102724Y0234713D03*
 X0100854Y0226740D03*
+X0109220Y0227921D03*
 X0118177Y0228118D03*
 X0127429Y0228217D03*
 X0136976Y0228217D03*
@@ -1,24 +0,0 @@
-import numpy as np
-
-# Define parameters
-fs = 120e6  # Sampling frequency
-Ts = 1 / fs  # Sampling time
-Tb = 1e-6  # Burst time
-Tau = 30e-6  # Pulse repetition time
-fmax = 15e6  # Maximum frequency on ramp
-fmin = 1e6  # Minimum frequency on ramp
-
-# Compute number of samples per ramp
-n = int(Tb / Ts)
-N = np.arange(0, n, 1)
-
-# Compute instantaneous phase
-theta_n = 2 * np.pi * ((N**2 * Ts**2 * (fmax - fmin) / (2 * Tb)) + fmin * N * Ts)
-
-# Generate waveform and scale it to 8-bit unsigned values (0 to 255)
-y = 1 + np.sin(theta_n)  # Normalize from 0 to 2
-y_scaled = np.round(y * 127.5).astype(int)  # Scale to 8-bit range (0-255)
-
-# Print values in Verilog-friendly format
-for _i in range(n):
-    pass
@@ -1,116 +0,0 @@
-// ADAR1000_AGC.cpp -- STM32 outer-loop AGC implementation
-//
-// See ADAR1000_AGC.h for architecture overview.
-
-#include "ADAR1000_AGC.h"
-#include "ADAR1000_Manager.h"
-#include "diag_log.h"
-
-#include <cstring>
-
-// ---------------------------------------------------------------------------
-// Constructor -- set all config fields to safe defaults
-// ---------------------------------------------------------------------------
-ADAR1000_AGC::ADAR1000_AGC()
-    : agc_base_gain(ADAR1000Manager::kDefaultRxVgaGain) // 30
-    , gain_step_down(4)
-    , gain_step_up(1)
-    , min_gain(0)
-    , max_gain(127)
-    , holdoff_frames(4)
-    , enabled(false)
-    , holdoff_counter(0)
-    , last_saturated(false)
-    , saturation_event_count(0)
-{
-    memset(cal_offset, 0, sizeof(cal_offset));
-}
-
-// ---------------------------------------------------------------------------
-// update -- called once per frame with the FPGA DIG_5 saturation flag
-//
-// Returns true if agc_base_gain changed (caller should then applyGain).
-// ---------------------------------------------------------------------------
-void ADAR1000_AGC::update(bool fpga_saturation)
-{
-    if (!enabled)
-        return;
-
-    last_saturated = fpga_saturation;
-
-    if (fpga_saturation) {
-        // Attack: reduce gain immediately
-        saturation_event_count++;
-        holdoff_counter = 0;
-
-        if (agc_base_gain >= gain_step_down + min_gain) {
-            agc_base_gain -= gain_step_down;
-        } else {
-            agc_base_gain = min_gain;
-        }
-
-        DIAG("AGC", "SAT detected -- gain_base -> %u  (events=%lu)",
-             (unsigned)agc_base_gain, (unsigned long)saturation_event_count);
-
-    } else {
-        // Recovery: wait for holdoff, then increase gain
-        holdoff_counter++;
-
-        if (holdoff_counter >= holdoff_frames) {
-            holdoff_counter = 0;
-
-            if (agc_base_gain + gain_step_up <= max_gain) {
-                agc_base_gain += gain_step_up;
-            } else {
-                agc_base_gain = max_gain;
-            }
-
-            DIAG("AGC", "Recovery step -- gain_base -> %u", (unsigned)agc_base_gain);
-        }
-    }
-}
-
-// ---------------------------------------------------------------------------
-// applyGain -- write effective gain to all 16 RX VGA channels
-//
-// Uses the Manager's adarSetRxVgaGain which takes 1-based channel indices
-// (matching the convention in setBeamAngle).
-// ---------------------------------------------------------------------------
-void ADAR1000_AGC::applyGain(ADAR1000Manager &mgr)
-{
-    for (uint8_t dev = 0; dev < AGC_NUM_DEVICES; ++dev) {
-        for (uint8_t ch = 0; ch < AGC_NUM_CHANNELS; ++ch) {
-            uint8_t gain = effectiveGain(dev * AGC_NUM_CHANNELS + ch);
-            // Channel parameter is 1-based per Manager convention
-            mgr.adarSetRxVgaGain(dev, ch + 1, gain, BROADCAST_OFF);
-        }
-    }
-}
-
-// ---------------------------------------------------------------------------
-// resetState -- clear runtime counters, preserve configuration
-// ---------------------------------------------------------------------------
-void ADAR1000_AGC::resetState()
-{
-    holdoff_counter = 0;
-    last_saturated = false;
-    saturation_event_count = 0;
-}
-
-// ---------------------------------------------------------------------------
-// effectiveGain -- compute clamped per-channel gain
-// ---------------------------------------------------------------------------
-uint8_t ADAR1000_AGC::effectiveGain(uint8_t channel_index) const
-{
-    if (channel_index >= AGC_TOTAL_CHANNELS)
-        return min_gain;  // safety fallback — OOB channels get minimum gain
-
-    int16_t raw = static_cast<int16_t>(agc_base_gain) + cal_offset[channel_index];
-
-    if (raw < static_cast<int16_t>(min_gain))
-        return min_gain;
-    if (raw > static_cast<int16_t>(max_gain))
-        return max_gain;
-
-    return static_cast<uint8_t>(raw);
-}
@@ -1,97 +0,0 @@
-// ADAR1000_AGC.h -- STM32 outer-loop AGC for ADAR1000 RX VGA gain
-//
-// Adjusts the analog VGA common-mode gain on each ADAR1000 RX channel based on
-// the FPGA's saturation flag (DIG_5 / PD13).  Runs once per radar frame
-// (~258 ms) in the main loop, after runRadarPulseSequence().
-//
-// Architecture:
-//   - Inner loop (FPGA, per-sample): rx_gain_control auto-adjusts digital
-//     gain_shift based on peak magnitude / saturation.  Range ±42 dB.
-//   - Outer loop (THIS MODULE, per-frame): reads FPGA DIG_5 GPIO.  If
-//     saturation detected, reduces agc_base_gain immediately (attack).  If no
-//     saturation for holdoff_frames, increases agc_base_gain (decay/recovery).
-//
-// Per-channel gain formula:
-//   VGA[dev][ch] = clamp(agc_base_gain + cal_offset[dev*4+ch], min_gain, max_gain)
-//
-// The cal_offset array allows per-element calibration to correct inter-channel
-// gain imbalance.  Default is all zeros (uniform gain).
-
-#ifndef ADAR1000_AGC_H
-#define ADAR1000_AGC_H
-
-#include <stdint.h>
-
-// Forward-declare to avoid pulling in the full ADAR1000_Manager header here.
-// The .cpp includes the real header.
-class ADAR1000Manager;
-
-// Number of ADAR1000 devices
-#define AGC_NUM_DEVICES   4
-// Number of channels per ADAR1000
-#define AGC_NUM_CHANNELS  4
-// Total RX channels
-#define AGC_TOTAL_CHANNELS (AGC_NUM_DEVICES * AGC_NUM_CHANNELS)
-
-class ADAR1000_AGC {
-public:
-    // --- Configuration (public for easy field-testing / GUI override) ---
-
-    // Common-mode base gain (raw ADAR1000 register value, 0-255).
-    // Default matches ADAR1000Manager::kDefaultRxVgaGain = 30.
-    uint8_t agc_base_gain;
-
-    // Per-channel calibration offset (signed, added to agc_base_gain).
-    // Index = device*4 + channel.  Default: all 0.
-    int8_t cal_offset[AGC_TOTAL_CHANNELS];
-
-    // How much to decrease agc_base_gain per frame when saturated (attack).
-    uint8_t gain_step_down;
-
-    // How much to increase agc_base_gain per frame when recovering (decay).
-    uint8_t gain_step_up;
-
-    // Minimum allowed agc_base_gain (floor).
-    uint8_t min_gain;
-
-    // Maximum allowed agc_base_gain (ceiling).
-    uint8_t max_gain;
-
-    // Number of consecutive non-saturated frames required before gain-up.
-    uint8_t holdoff_frames;
-
-    // Master enable.  When false, update() is a no-op.
-    bool enabled;
-
-    // --- Runtime state (read-only for diagnostics) ---
-
-    // Consecutive non-saturated frame counter (resets on saturation).
-    uint8_t holdoff_counter;
-
-    // True if the last update() saw saturation.
-    bool last_saturated;
-
-    // Total saturation events since reset/construction.
-    uint32_t saturation_event_count;
-
-    // --- Methods ---
-
-    ADAR1000_AGC();
-
-    // Call once per frame after runRadarPulseSequence().
-    // fpga_saturation: result of HAL_GPIO_ReadPin(GPIOD, GPIO_PIN_13) == GPIO_PIN_SET
-    void update(bool fpga_saturation);
-
-    // Apply the current gain to all 16 RX VGA channels via the Manager.
-    void applyGain(ADAR1000Manager &mgr);
-
-    // Reset runtime state (holdoff counter, saturation count) without
-    // changing configuration.
-    void resetState();
-
-    // Compute the effective gain for a specific channel index (0-15),
-    // clamped to [min_gain, max_gain].  Useful for diagnostics.
-    uint8_t effectiveGain(uint8_t channel_index) const;
-};
-
-#endif // ADAR1000_AGC_H
@@ -20,71 +20,18 @@ static const struct {
    {ADAR_4_CS_3V3_GPIO_Port, ADAR_4_CS_3V3_Pin}  // ADAR1000 #4
 };

-// ADAR1000 Vector Modulator lookup tables (128-state phase grid, 2.8125 deg step).
-//
-// Source: Analog Devices ADAR1000 datasheet Rev. B, Tables 13-16, page 34
-//   (7_Components Datasheets and Application notes/ADAR1000.pdf)
-// Cross-checked against the ADI Linux mainline driver (GPL-2.0, NOT vendored):
-//   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/
-//     drivers/iio/beamformer/adar1000.c  (adar1000_phase_values[])
-// The 128 byte values themselves are factual data from the datasheet and are
-// not subject to copyright; only the ADI driver code is GPL.
-//
-// Byte format (per datasheet):
-//   bit  [7:6] reserved (0)
-//   bit  [5]   polarity:  1 = positive lobe (sign(I) or sign(Q) >= 0)
-//                          0 = negative lobe
-//   bits [4:0] 5-bit unsigned magnitude (0..31)
-// At magnitude=0 the polarity bit is physically meaningless; the datasheet
-// uses POL=1 (e.g. VM_Q at 0 deg = 0x20, VM_I at 90 deg = 0x21).
-//
-// Index mapping is uniform: VM_I[k] / VM_Q[k] correspond to phase angle
-// k * 360/128 = k * 2.8125 degrees.  Callers index as VM_*[phase % 128].
+// Vector Modulator lookup tables
 const uint8_t ADAR1000Manager::VM_I[128] = {
-    0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3E, 0x3E, 0x3D,  // [  0]   0.0000 deg
-    0x3D, 0x3C, 0x3C, 0x3B, 0x3A, 0x39, 0x38, 0x37,  // [  8]  22.5000 deg
-    0x36, 0x35, 0x34, 0x33, 0x32, 0x30, 0x2F, 0x2E,  // [ 16]  45.0000 deg
-    0x2C, 0x2B, 0x2A, 0x28, 0x27, 0x25, 0x24, 0x22,  // [ 24]  67.5000 deg
-    0x21, 0x01, 0x03, 0x04, 0x06, 0x07, 0x08, 0x0A,  // [ 32]  90.0000 deg
-    0x0B, 0x0D, 0x0E, 0x0F, 0x11, 0x12, 0x13, 0x14,  // [ 40] 112.5000 deg
-    0x16, 0x17, 0x18, 0x19, 0x19, 0x1A, 0x1B, 0x1C,  // [ 48] 135.0000 deg
-    0x1C, 0x1D, 0x1E, 0x1E, 0x1E, 0x1F, 0x1F, 0x1F,  // [ 56] 157.5000 deg
-    0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1E, 0x1E, 0x1D,  // [ 64] 180.0000 deg
-    0x1D, 0x1C, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17,  // [ 72] 202.5000 deg
-    0x16, 0x15, 0x14, 0x13, 0x12, 0x10, 0x0F, 0x0E,  // [ 80] 225.0000 deg
-    0x0C, 0x0B, 0x0A, 0x08, 0x07, 0x05, 0x04, 0x02,  // [ 88] 247.5000 deg
-    0x01, 0x21, 0x23, 0x24, 0x26, 0x27, 0x28, 0x2A,  // [ 96] 270.0000 deg
-    0x2B, 0x2D, 0x2E, 0x2F, 0x31, 0x32, 0x33, 0x34,  // [104] 292.5000 deg
-    0x36, 0x37, 0x38, 0x39, 0x39, 0x3A, 0x3B, 0x3C,  // [112] 315.0000 deg
-    0x3C, 0x3D, 0x3E, 0x3E, 0x3E, 0x3F, 0x3F, 0x3F,  // [120] 337.5000 deg
+    // ... (same as in your original file)
 };

 const uint8_t ADAR1000Manager::VM_Q[128] = {
-    0x20, 0x21, 0x23, 0x24, 0x26, 0x27, 0x28, 0x2A,  // [  0]   0.0000 deg
-    0x2B, 0x2D, 0x2E, 0x2F, 0x30, 0x31, 0x33, 0x34,  // [  8]  22.5000 deg
-    0x35, 0x36, 0x37, 0x38, 0x38, 0x39, 0x3A, 0x3A,  // [ 16]  45.0000 deg
-    0x3B, 0x3C, 0x3C, 0x3C, 0x3D, 0x3D, 0x3D, 0x3D,  // [ 24]  67.5000 deg
-    0x3D, 0x3D, 0x3D, 0x3D, 0x3D, 0x3C, 0x3C, 0x3C,  // [ 32]  90.0000 deg
-    0x3B, 0x3A, 0x3A, 0x39, 0x38, 0x38, 0x37, 0x36,  // [ 40] 112.5000 deg
-    0x35, 0x34, 0x33, 0x31, 0x30, 0x2F, 0x2E, 0x2D,  // [ 48] 135.0000 deg
-    0x2B, 0x2A, 0x28, 0x27, 0x26, 0x24, 0x23, 0x21,  // [ 56] 157.5000 deg
-    0x20, 0x01, 0x03, 0x04, 0x06, 0x07, 0x08, 0x0A,  // [ 64] 180.0000 deg
-    0x0B, 0x0D, 0x0E, 0x0F, 0x10, 0x11, 0x13, 0x14,  // [ 72] 202.5000 deg
-    0x15, 0x16, 0x17, 0x18, 0x18, 0x19, 0x1A, 0x1A,  // [ 80] 225.0000 deg
-    0x1B, 0x1C, 0x1C, 0x1C, 0x1D, 0x1D, 0x1D, 0x1D,  // [ 88] 247.5000 deg
-    0x1D, 0x1D, 0x1D, 0x1D, 0x1D, 0x1C, 0x1C, 0x1C,  // [ 96] 270.0000 deg
-    0x1B, 0x1A, 0x1A, 0x19, 0x18, 0x18, 0x17, 0x16,  // [104] 292.5000 deg
-    0x15, 0x14, 0x13, 0x11, 0x10, 0x0F, 0x0E, 0x0D,  // [112] 315.0000 deg
-    0x0B, 0x0A, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01,  // [120] 337.5000 deg
+    // ... (same as in your original file)
 };

-// NOTE: a VM_GAIN[128] table previously existed here as a placeholder but was
-// never populated and never read.  The ADAR1000 vector modulator has no
-// separate gain register: phase-state magnitude is encoded directly in
-// bits [4:0] of the VM_I/VM_Q bytes above.  Per-channel VGA gain is a
-// distinct register (CHx_RX_GAIN at 0x10-0x13, CHx_TX_GAIN at 0x1C-0x1F)
-// written with the user-supplied byte directly by adarSetRxVgaGain() /
-// adarSetTxVgaGain().  Do not reintroduce a VM_GAIN[] array.
+const uint8_t ADAR1000Manager::VM_GAIN[128] = {
+    // ... (same as in your original file)
+};

 ADAR1000Manager::ADAR1000Manager() {
    for (int i = 0; i < 4; ++i) {
@@ -116,12 +116,10 @@ public:
    bool beam_sweeping_active_ = false;
    uint32_t last_beam_update_time_ = 0;

-    // Vector Modulator lookup tables (see ADAR1000_Manager.cpp for provenance).
-    // Indexed as VM_*[phase % 128] on a uniform 2.8125 deg grid.
-    // No VM_GAIN[] table exists: VM magnitude is bits [4:0] of the I/Q bytes
-    // themselves; per-channel VGA gain uses a separate register.
-    static const uint8_t VM_I[128];
+    // Lookup tables
+    static const uint8_t VM_I[128];
    static const uint8_t VM_Q[128];
+    static const uint8_t VM_GAIN[128];

    // Named defaults for the ADTR1107 and ADAR1000 power sequence.
    static constexpr uint8_t kDefaultTxVgaGain = 0x7F;
@@ -7,8 +7,8 @@ RadarSettings::RadarSettings() {

 void RadarSettings::resetToDefaults() {
    system_frequency = 10.0e9;    // 10 GHz
-    chirp_duration_1 = 30.0e-6;   // 30 �s
-    chirp_duration_2 = 0.5e-6;    // 0.5 �s
+    chirp_duration_1 = 30.0e-6;   // 30 us
+    chirp_duration_2 = 0.5e-6;    // 0.5 us
    chirps_per_position = 32;
    freq_min = 10.0e6;           // 10 MHz
    freq_max = 30.0e6;           // 30 MHz
@@ -43,11 +43,6 @@ void USBHandler::processStartFlag(const uint8_t* data, uint32_t length) {
    // Start flag: bytes [23, 46, 158, 237]
    const uint8_t START_FLAG[] = {23, 46, 158, 237};
    
-    // Guard: need at least 4 bytes to contain a start flag.
-    // Without this, length - 4 wraps to ~4 billion (uint32_t unsigned underflow)
-    // and the loop reads far past the buffer boundary.
-    if (length < 4) return;
-    
    // Check if start flag is in the received data
    for (uint32_t i = 0; i <= length - 4; i++) {
        if (memcmp(data + i, START_FLAG, 4) == 0) {
@@ -0,0 +1,693 @@
+/**
+ * MIT License
+ * 
+ * Copyright (c) 2020 Jimmy Pentz
+ *
+ * Reach me at: github.com/jgpentz, jpentz1(at)gmail.com
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sells
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ * 
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+/* ADAR1000 4-Channel, X Band and Ku Band Beamformer */
+// ----------------------------------------------------------------------------
+// Includes
+// ----------------------------------------------------------------------------
+#include "main.h"
+#include "stm32f7xx_hal.h"
+#include "stm32f7xx_hal_spi.h"
+#include "stm32f7xx_hal_gpio.h"
+#include "adar1000.h"
+
+
+// ----------------------------------------------------------------------------
+// Preprocessor Definitions and Constants
+// ----------------------------------------------------------------------------
+// VM_GAIN is 15 dB of gain in 128 steps. ~0.12 dB per step.
+// A 15 dB attenuator can be applied on top of these values.
+const uint8_t VM_GAIN[128] = {
+	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
+	0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
+	0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
+	0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
+	0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
+	0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
+	0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
+	0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
+};
+
+// VM_I and VM_Q are the settings for the vector modulator. 128 steps in 360 degrees. ~2.813 degrees per step.
+const uint8_t VM_I[128] = {
+	0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3E, 0x3E, 0x3D, 0x3D, 0x3C, 0x3C, 0x3B, 0x3A, 0x39, 0x38, 0x37,
+	0x36, 0x35, 0x34, 0x33, 0x32, 0x30, 0x2F, 0x2E, 0x2C, 0x2B, 0x2A, 0x28, 0x27, 0x25, 0x24, 0x22,
+	0x21, 0x01, 0x03, 0x04, 0x06, 0x07, 0x08, 0x0A, 0x0B, 0x0D, 0x0E, 0x0F, 0x11, 0x12, 0x13, 0x14,
+	0x16, 0x17, 0x18, 0x19, 0x19, 0x1A, 0x1B, 0x1C, 0x1C, 0x1D, 0x1E, 0x1E, 0x1E, 0x1F, 0x1F, 0x1F,
+	0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1E, 0x1E, 0x1D, 0x1D, 0x1C, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17,
+	0x16, 0x15, 0x14, 0x13, 0x12, 0x10, 0x0F, 0x0E, 0x0C, 0x0B, 0x0A, 0x08, 0x07, 0x05, 0x04, 0x02,
+	0x01, 0x21, 0x23, 0x24, 0x26, 0x27, 0x28, 0x2A, 0x2B, 0x2D, 0x2E, 0x2F, 0x31, 0x32, 0x33, 0x34,
+	0x36, 0x37, 0x38, 0x39, 0x39, 0x3A, 0x3B, 0x3C, 0x3C, 0x3D, 0x3E, 0x3E, 0x3E, 0x3F, 0x3F, 0x3F,
+};
+
+const uint8_t VM_Q[128] = {
+	0x20, 0x21, 0x23, 0x24, 0x26, 0x27, 0x28, 0x2A, 0x2B, 0x2D, 0x2E, 0x2F, 0x30, 0x31, 0x33, 0x34,
+	0x35, 0x36, 0x37, 0x38, 0x38, 0x39, 0x3A, 0x3A, 0x3B, 0x3C, 0x3C, 0x3C, 0x3D, 0x3D, 0x3D, 0x3D,
+	0x3D, 0x3D, 0x3D, 0x3D, 0x3D, 0x3C, 0x3C, 0x3C, 0x3B, 0x3A, 0x3A, 0x39, 0x38, 0x38, 0x37, 0x36,
+	0x35, 0x34, 0x33, 0x31, 0x30, 0x2F, 0x2E, 0x2D, 0x2B, 0x2A, 0x28, 0x27, 0x26, 0x24, 0x23, 0x21,
+	0x20, 0x01, 0x03, 0x04, 0x06, 0x07, 0x08, 0x0A, 0x0B, 0x0D, 0x0E, 0x0F, 0x10, 0x11, 0x13, 0x14,
+	0x15, 0x16, 0x17, 0x18, 0x18, 0x19, 0x1A, 0x1A, 0x1B, 0x1C, 0x1C, 0x1C, 0x1D, 0x1D, 0x1D, 0x1D,
+	0x1D, 0x1D, 0x1D, 0x1D, 0x1D, 0x1C, 0x1C, 0x1C, 0x1B, 0x1A, 0x1A, 0x19, 0x18, 0x18, 0x17, 0x16,
+	0x15, 0x14, 0x13, 0x11, 0x10, 0x0F, 0x0E, 0x0D, 0x0B, 0x0A, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01,
+};
+
+
+// ----------------------------------------------------------------------------
+// Function Definitions
+// ----------------------------------------------------------------------------
+/**
+ * @brief	Initialize the ADC on the ADAR by setting the ADC with a 2 MHz clk, 
+ *			and then enable it.
+ *
+ * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
+ *						to use for SPI transfer.
+ * @param 	broadcast	Send the message as a broadcast to all ADARs in the SPI chain
+ *						if this set to BROADCAST_ON.
+ *
+ * @warning	This is setup to only read temperature sensor data, not the power detectors.
+ */
+void Adar_AdcInit(const AdarDevice * p_adar, uint8_t broadcast)
+{
+	uint8_t data;
+
+	data = ADAR1000_ADC_2MHZ_CLK | ADAR1000_ADC_EN;
+
+	Adar_Write(p_adar, REG_ADC_CONTROL, data, broadcast);
+}
+
+
+/**
+ * @brief	Read a byte of data from the ADAR.
+ *
+ * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
+ *						to use for SPI transfer.
+ * @param 	broadcast	Send the message as a broadcast to all ADARs in the SPI chain
+ *						if this set to BROADCAST_ON.
+ *
+ * @return	Returns a byte of data that has been converted from the temperature sensor.
+ *
+ * @warning	This is setup to only read temperature sensor data, not the power detectors.
+ */
+uint8_t Adar_AdcRead(const AdarDevice * p_adar, uint8_t broadcast)
+{
+	uint8_t data;
+
+    // Start the ADC conversion
+	Adar_Write(p_adar, REG_ADC_CONTROL, ADAR1000_ADC_ST_CONV, broadcast);
+
+    // This is blocking for now... wait until data is converted, then read it
+	while (!(Adar_Read(p_adar, REG_ADC_CONTROL) & 0x01))
+	{
+	}
+
+	data = Adar_Read(p_adar, REG_ADC_OUT);
+
+	return(data);
+}
+
+
+/**
+ * @brief	Requests the device info from a specific ADAR and stores it in the
+ *			provided AdarDeviceInfo struct.
+ *
+ * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
+ *						to use for SPI transfer.
+ * @param   info[out]	Struct that contains the device info fields.
+ *
+ * @return	Returns ADAR_ERROR_NOERROR if information was successfully received and stored in the struct.
+ */
+uint8_t Adar_GetDeviceInfo(const AdarDevice * p_adar, AdarDeviceInfo * info)
+{
+	*((uint8_t *)info) = Adar_Read(p_adar, 0x002);
+	info->chip_type = Adar_Read(p_adar, 0x003);
+	info->product_id = ((uint16_t)Adar_Read(p_adar, 0x004)) << 8;
+	info->product_id |= ((uint16_t)Adar_Read(p_adar, 0x005)) & 0x00ff;
+	info->scratchpad = Adar_Read(p_adar, 0x00A);
+	info->spi_rev = Adar_Read(p_adar, 0x00B);
+	info->vendor_id = ((uint16_t)Adar_Read(p_adar, 0x00C)) << 8;
+	info->vendor_id |= ((uint16_t)Adar_Read(p_adar, 0x00D)) & 0x00ff;
+	info->rev_id = Adar_Read(p_adar, 0x045);
+
+	return(ADAR_ERROR_NOERROR);
+}
+
+
+/**
+ * @brief	Read the data that is stored in a single ADAR register.
+ *
+ * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
+ *						to use for SPI transfer.
+ * @param	mem_addr	Memory address of the register you wish to read from.
+ *
+ * @return	Returns the byte of data that is stored in the desired register.
+ *
+ * @warning	This function will clear ADDR_ASCN bits.
+ * @warning The ADAR does not allow for block reads.
+ */
+uint8_t Adar_Read(const AdarDevice * p_adar, uint32_t mem_addr)
+{
+	uint8_t instruction[3];
+
+    // Set SDO active
+	Adar_Write(p_adar, REG_INTERFACE_CONFIG_A, INTERFACE_CONFIG_A_SDO_ACTIVE, 0);
+
+	instruction[0] = 0x80 | ((p_adar->dev_addr & 0x03) << 5);
+	instruction[0] |= ((0xff00 & mem_addr) >> 8);
+	instruction[1] = (0xff & mem_addr);
+	instruction[2] = 0x00;
+
+	p_adar->Transfer(instruction, p_adar->p_rx_buffer, ADAR1000_RD_SIZE);
+
+    // Set SDO Inactive
+	Adar_Write(p_adar, REG_INTERFACE_CONFIG_A, 0, 0);
+
+	return(p_adar->p_rx_buffer[2]);
+}
+
+
+/**
+ * @brief	Block memory write to an ADAR device.
+ *
+ * @pre		ADDR_ASCN bits in register zero must be set!
+ *
+ * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
+ *						to use for SPI transfer.
+ * @param	mem_addr  	Memory address of the register you wish to read from.
+ * @param	p_data    	Pointer to block of data to transfer (must have two unused bytes preceding the data for instruction).
+ * @param	size      	Size of data in bytes, including the two additional leading bytes.
+ *
+ * @warning First two bytes of data will be corrupted if you do not provide two unused leading bytes!
+ */
+void Adar_ReadBlock(const AdarDevice * p_adar, uint16_t mem_addr, uint8_t * p_data, uint32_t size)
+{
+    // Set SDO active
+	Adar_Write(p_adar, REG_INTERFACE_CONFIG_A, INTERFACE_CONFIG_A_SDO_ACTIVE | INTERFACE_CONFIG_A_ADDR_ASCN, 0);
+
+    // Prepare command
+	p_data[0] = 0x80 | ((p_adar->dev_addr & 0x03) << 5);
+	p_data[0] |= ((mem_addr) >> 8) & 0x1F;
+	p_data[1] = (0xFF & mem_addr);
+
+    // Start the transfer
+	p_adar->Transfer(p_data, p_data, size);
+
+	Adar_Write(p_adar, REG_INTERFACE_CONFIG_A, 0, 0);
+    // Return nothing since we assume this is non-blocking and won't wait around
+}
+
+
+/**
+ * @brief	Sets the Rx/Tx bias currents for the LNA, VM, and VGA to be in either
+ *			low power setting or nominal setting.
+ *
+ * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
+ *						to use for SPI transfer.
+ * @param	p_bias[in]	An AdarBiasCurrents struct filled with bias settings
+ *						as seen in the datasheet Table 6. SPI Settings for 
+ *						Different Power	Modules
+ * @param 	broadcast	Send the message as a broadcast to all ADARs in the SPI chain
+ *						if this set to BROADCAST_ON.
+ *
+ * @return	Returns ADAR_ERR_NOERROR if the bias currents were set 
+ */
+uint8_t Adar_SetBiasCurrents(const AdarDevice * p_adar, AdarBiasCurrents * p_bias, uint8_t broadcast)
+{
+	uint8_t bias = 0;
+
+    // RX LNA/VGA/VM bias
+	bias = (p_bias->rx_lna & 0x0f);
+	Adar_Write(p_adar, REG_BIAS_CURRENT_RX_LNA, bias, broadcast); // RX LNA bias
+	bias = (p_bias->rx_vga & 0x07 << 3) | (p_bias->rx_vm & 0x07);
+	Adar_Write(p_adar, REG_BIAS_CURRENT_RX, bias, broadcast);     // RX VM/VGA bias
+
+    // TX VGA/VM/DRV bias
+	bias = (p_bias->tx_vga & 0x07 << 3) | (p_bias->tx_vm & 0x07);
+	Adar_Write(p_adar, REG_BIAS_CURRENT_TX, bias, broadcast);     // TX VM/VGA bias
+	bias = (p_bias->tx_drv & 0x07);
+	Adar_Write(p_adar, REG_BIAS_CURRENT_TX_DRV, bias, broadcast); // TX DRV bias
+	
+	return(ADAR_ERROR_NOERROR);
+}
+
+
+/**
+ * @brief	Set the bias ON and bias OFF voltages for the four PA's and one LNA.
+ *
+ * @pre		This will set all 5 bias ON values and all 5 bias OFF values at once.
+ * 			To enable these bias values, please see the data sheet and ensure that the BIAS_CTRL,
+ * 			LNA_BIAS_OUT_EN, TR_SOURCE, TX_EN, RX_EN, TR (input to chip), and PA_ON (input to chip)
+ * 			bits have all been properly set.
+ *
+ * @param	p_adar[in]		Adar pointer Which specifies the device and what function 
+ *							to use for SPI transfer.
+ * @param 	bias_on_voltage   Array that contains the bias ON voltages.
+ * @param 	bias_off_voltage  Array that contains the bias OFF voltages.
+ *
+ * @return	Returns ADAR_ERR_NOERROR if the bias currents were set 
+ */
+uint8_t Adar_SetBiasVoltages(const AdarDevice * p_adar, uint8_t bias_on_voltage[5], uint8_t bias_off_voltage[5])
+{
+	Adar_SetBit(p_adar, 0x30, 6, BROADCAST_OFF);
+	Adar_SetBit(p_adar, 0x31, 2, BROADCAST_OFF);
+	Adar_SetBit(p_adar, 0x38, 5, BROADCAST_OFF);
+	Adar_Write(p_adar, REG_PA_CH1_BIAS_ON,bias_on_voltage[0], BROADCAST_OFF);
+	Adar_Write(p_adar, REG_PA_CH2_BIAS_ON,bias_on_voltage[1], BROADCAST_OFF);
+	Adar_Write(p_adar, REG_PA_CH3_BIAS_ON,bias_on_voltage[2], BROADCAST_OFF);
+	Adar_Write(p_adar, REG_PA_CH4_BIAS_ON,bias_on_voltage[3], BROADCAST_OFF);
+
+	Adar_Write(p_adar, REG_PA_CH1_BIAS_OFF,bias_off_voltage[0], BROADCAST_OFF);
+	Adar_Write(p_adar, REG_PA_CH2_BIAS_OFF,bias_off_voltage[1], BROADCAST_OFF);
+	Adar_Write(p_adar, REG_PA_CH3_BIAS_OFF,bias_off_voltage[2], BROADCAST_OFF);
+	Adar_Write(p_adar, REG_PA_CH4_BIAS_OFF,bias_off_voltage[3], BROADCAST_OFF);
+
+	Adar_SetBit(p_adar, 0x30, 4, BROADCAST_OFF);
+	Adar_SetBit(p_adar, 0x30, 6, BROADCAST_OFF);
+	Adar_SetBit(p_adar, 0x31, 2, BROADCAST_OFF);
+	Adar_SetBit(p_adar, 0x38, 5, BROADCAST_OFF);
+	Adar_Write(p_adar, REG_LNA_BIAS_ON,bias_on_voltage[4], BROADCAST_OFF);
+	Adar_Write(p_adar, REG_LNA_BIAS_OFF,bias_off_voltage[4], BROADCAST_OFF);
+
+	Adar_ResetBit(p_adar, 0x30, 7, BROADCAST_OFF);
+	Adar_SetBit(p_adar, 0x31, 2, BROADCAST_OFF);
+	Adar_SetBit(p_adar, 0x31, 4, BROADCAST_OFF);
+	Adar_SetBit(p_adar, 0x31, 7, BROADCAST_OFF);
+	
+	return(ADAR_ERROR_NOERROR);
+}
+
+
+/**
+ * @brief	Setup the ADAR to use settings that are transferred over SPI.
+ *
+ * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
+ *						to use for SPI transfer.
+ * @param 	broadcast	Send the message as a broadcast to all ADARs in the SPI chain
+ *						if this set to BROADCAST_ON.
+ *
+ * @return	Returns ADAR_ERR_NOERROR if the bias currents were set 
+ */
+uint8_t Adar_SetRamBypass(const AdarDevice * p_adar, uint8_t broadcast)
+{
+	uint8_t data;
+
+	data = (MEM_CTRL_BIAS_RAM_BYPASS | MEM_CTRL_BEAM_RAM_BYPASS);
+
+	Adar_Write(p_adar, REG_MEM_CTL, data, broadcast);
+
+	return(ADAR_ERROR_NOERROR);
+}
+
+
+/**
+ * @brief	Set the VGA gain value of a Receive channel in dB.
+ *
+ * @param	p_adar[in]		Adar pointer Which specifies the device and what function 
+ *							to use for SPI transfer.
+ * @param 	channel			Channel in which to set the gain (1-4).
+ * @param 	vga_gain_db		Gain to be applied to the channel, ranging from 0 - 30 dB. 
+ *							(Intended operation >16 dB).
+ * @param 	broadcast	Send the message as a broadcast to all ADARs in the SPI chain
+ *						if this set to BROADCAST_ON.
+ *
+ * @return 	Returns ADAR_ERROR_NOERROR if the gain was successfully set. 
+ * 					ADAR_ERROR_FAILED if an invalid channel was selected.
+ *
+ * @warning 0 dB or 15 dB step attenuator may also be turned on, which is why intended operation is >16 dB.
+ */
+uint8_t Adar_SetRxVgaGain(const AdarDevice * p_adar, uint8_t channel, uint8_t vga_gain_db, uint8_t broadcast)
+{
+	uint8_t	 vga_gain_bits = (uint8_t)(255*vga_gain_db/16);
+	uint32_t mem_addr = 0;
+
+	if((channel == 0) || (channel > 4))
+	{
+		return(ADAR_ERROR_FAILED);
+	}
+
+	mem_addr = REG_CH1_RX_GAIN + (channel & 0x03);
+
+    // Set gain
+	Adar_Write(p_adar, mem_addr, vga_gain_bits, broadcast);
+
+    // Load the new setting
+	Adar_Write(p_adar, REG_LOAD_WORKING, 0x1, broadcast);
+
+	return(ADAR_ERROR_NOERROR);
+}
+
+
+/**
+ * @brief	Set the phase of a given receive channel using the I/Q vector modulator.
+ *
+ * @pre		According to the given @param phase, this sets the polarity (bit 5) and gain (bits 4-0)
+ * 			of the @param channel, and then loads them into the working register.
+ * 			A vector modulator I/Q look-up table has been provided at the beginning of this library.
+ *
+ * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
+ *						to use for SPI transfer.
+ * @param	channel   	Channel in which to set the gain (1-4).
+ * @param	phase     	Byte that is used to set the polarity (bit 5) and gain (bits 4-0).
+ * @param 	broadcast	Send the message as a broadcast to all ADARs in the SPI chain
+ *						if this set to BROADCAST_ON.
+ *
+ * @return 	Returns ADAR_ERROR_NOERROR if the phase was successfully set. 
+ * 					ADAR_ERROR_FAILED if an invalid channel was selected.
+ *
+ * @note    To obtain your phase:
+ *          phase = degrees * 128;
+ *          phase /= 360;
+ */
+uint8_t Adar_SetRxPhase(const AdarDevice * p_adar, uint8_t channel, uint8_t phase, uint8_t broadcast)
+{
+	uint8_t	 i_val = 0;
+	uint8_t	 q_val = 0;
+	uint32_t mem_addr_i, mem_addr_q;
+
+	if((channel == 0) || (channel > 4))
+	{
+		return(ADAR_ERROR_FAILED);
+	}
+
+	//phase = phase % 128;
+	i_val = VM_I[phase];
+	q_val = VM_Q[phase];
+
+	mem_addr_i = REG_CH1_RX_PHS_I + (channel & 0x03) * 2;
+	mem_addr_q = REG_CH1_RX_PHS_Q + (channel & 0x03) * 2;
+
+	Adar_Write(p_adar, mem_addr_i, i_val, broadcast);
+	Adar_Write(p_adar, mem_addr_q, q_val, broadcast);
+	Adar_Write(p_adar, REG_LOAD_WORKING, 0x1, broadcast);
+
+	return(ADAR_ERROR_NOERROR);
+}
+
+
+/**
+ * @brief	Set the VGA gain value of a Tx channel in dB.
+ *
+ * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
+ *						to use for SPI transfer.
+ * @param 	broadcast	Send the message as a broadcast to all ADARs in the SPI chain
+ *						if this set to BROADCAST_ON.
+ *
+ * @return 	Returns ADAR_ERROR_NOERROR if the bias was successfully set. 
+ * 					ADAR_ERROR_FAILED if an invalid channel was selected.
+ *
+ * @warning 0 dB or 15 dB step attenuator may also be turned on, which is why intended operation is >16 dB.
+ */
+uint8_t Adar_SetTxBias(const AdarDevice * p_adar, uint8_t broadcast)
+{
+	uint8_t	 vga_bias_bits;
+	uint8_t	 drv_bias_bits;
+	uint32_t mem_vga_bias;
+	uint32_t mem_drv_bias;
+
+	mem_vga_bias = REG_BIAS_CURRENT_TX;
+	mem_drv_bias = REG_BIAS_CURRENT_TX_DRV;
+
+    // Set bias to nom
+	vga_bias_bits = 0x2D;
+	drv_bias_bits = 0x06;
+
+    // Set bias
+	Adar_Write(p_adar, mem_vga_bias, vga_bias_bits, broadcast);
+    // Set bias
+	Adar_Write(p_adar, mem_drv_bias, drv_bias_bits, broadcast);
+
+    // Load the new setting
+	Adar_Write(p_adar, REG_LOAD_WORKING, 0x2, broadcast);
+
+	return(ADAR_ERROR_NOERROR);
+}
+
+
+/**
+ * @brief	Set the VGA gain value of a Tx channel.
+ *
+ * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
+ *						to use for SPI transfer.
+ * @param 	channel     Tx channel in which to set the gain, ranging from 1 - 4.
+ * @param 	gain   		Gain to be applied to the channel, ranging from 0 - 127,
+ *						plus the MSb 15dB attenuator (Intended operation >16 dB).
+ * @param 	broadcast	Send the message as a broadcast to all ADARs in the SPI chain
+ *						if this set to BROADCAST_ON.
+ *
+ * @return 	Returns ADAR_ERROR_NOERROR if the gain was successfully set. 
+ * 					ADAR_ERROR_FAILED if an invalid channel was selected.
+ *
+ * @warning 0 dB or 15 dB step attenuator may also be turned on, which is why intended operation is >16 dB.
+ */
+uint8_t Adar_SetTxVgaGain(const AdarDevice * p_adar, uint8_t channel, uint8_t gain, uint8_t broadcast)
+{
+	uint32_t mem_addr;
+	
+	if((channel == 0) || (channel > 4))
+	{
+		return(ADAR_ERROR_FAILED);
+	}
+
+	mem_addr = REG_CH1_TX_GAIN + (channel & 0x03);
+
+    // Set gain
+	Adar_Write(p_adar, mem_addr, gain, broadcast);
+
+    // Load the new setting
+	Adar_Write(p_adar, REG_LOAD_WORKING, LD_WRK_REGS_LDTX_OVERRIDE, broadcast);
+
+	return(ADAR_ERROR_NOERROR);
+}
+
+
+/**
+ * @brief 	Set the phase of a given transmit channel using the I/Q vector modulator.
+ *
+ * @pre		According to the given @param phase, this sets the polarity (bit 5) and gain (bits 4-0)
+ * 			of the @param channel, and then loads them into the working register.
+ * 			A vector modulator I/Q look-up table has been provided at the beginning of this library.
+ *
+ * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
+ *						to use for SPI transfer.
+ * @param 	channel   	Channel in which to set the gain (1-4).
+ * @param 	phase     	Byte that is used to set the polarity (bit 5) and gain (bits 4-0).
+ * @param 	broadcast	Send the message as a broadcast to all ADARs in the SPI chain
+ *						if this set to BROADCAST_ON.
+ *
+ * @return 	Returns ADAR_ERROR_NOERROR if the phase was successfully set. 
+ * 					ADAR_ERROR_FAILED if an invalid channel was selected.
+ *
+ * @note    To obtain your phase:
+ *          phase = degrees * 128;
+ *          phase /= 360;
+ */
+uint8_t Adar_SetTxPhase(const AdarDevice * p_adar, uint8_t channel, uint8_t phase, uint8_t broadcast)
+{
+	uint8_t	 i_val = 0;
+	uint8_t	 q_val = 0;
+	uint32_t mem_addr_i, mem_addr_q;
+
+	if((channel == 0) || (channel > 4))
+	{
+		return(ADAR_ERROR_FAILED);
+	}
+
+	//phase = phase % 128;
+	i_val = VM_I[phase];
+	q_val = VM_Q[phase];
+
+	mem_addr_i = REG_CH1_TX_PHS_I + (channel & 0x03) * 2;
+	mem_addr_q = REG_CH1_TX_PHS_Q + (channel & 0x03) * 2;
+
+	Adar_Write(p_adar, mem_addr_i, i_val, broadcast);
+	Adar_Write(p_adar, mem_addr_q, q_val, broadcast);
+	Adar_Write(p_adar, REG_LOAD_WORKING, 0x1, broadcast);
+
+	return(ADAR_ERROR_NOERROR);
+}
+
+
+/**
+ * @brief 	Reset the whole ADAR device.
+ *
+ * @param	p_adar[in]	ADAR pointer Which specifies the device and what function 
+ *						to use for SPI transfer.
+ */
+void Adar_SoftReset(const AdarDevice * p_adar)
+{
+	uint8_t instruction[3];
+
+	instruction[0] = ((p_adar->dev_addr & 0x03) << 5);
+	instruction[1] = 0x00;
+	instruction[2] = 0x81;
+
+	p_adar->Transfer(instruction, NULL, sizeof(instruction));
+}
+
+
+/**
+ * @brief 	Reset ALL ADAR devices in the SPI chain.
+ *
+ * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
+ *						to use for SPI transfer.
+ */
+void Adar_SoftResetAll(const AdarDevice * p_adar)
+{
+	uint8_t instruction[3];
+
+	instruction[0] = 0x08;
+	instruction[1] = 0x00;
+	instruction[2] = 0x81;
+
+	p_adar->Transfer(instruction, NULL, sizeof(instruction));
+}
+
+
+/**
+ * @brief 	Write a byte of @param data to the register located at @param mem_addr.
+ *
+ * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
+ *						to use for SPI transfer.
+ * @param 	mem_addr  	Memory address of the register you wish to read from.
+ * @param 	data      	Byte of data to be stored in the register.
+ * @param 	broadcast	Send the message as a broadcast to all ADARs in the SPI chain
+ 						if this set to BROADCAST_ON.
+ *
+ * @warning If writing the same data to multiple registers, use ADAR_WriteBlock.
+ */
+void Adar_Write(const AdarDevice * p_adar, uint32_t mem_addr, uint8_t data, uint8_t broadcast)
+{
+	uint8_t instruction[3];
+	
+	if (broadcast)
+	{
+		instruction[0] = 0x08;
+	}
+	else
+	{
+		instruction[0] = ((p_adar->dev_addr & 0x03) << 5);
+	}
+
+	instruction[0] |= (0x1F00 & mem_addr) >> 8;
+	instruction[1] = (0xFF & mem_addr);
+	instruction[2] = data;
+
+	p_adar->Transfer(instruction, NULL, sizeof(instruction));
+}
+
+
+/**
+ * @brief 	Block memory write to an ADAR device.
+ *
+ * @pre 	ADDR_ASCN BITS IN REGISTER ZERO MUST BE SET!
+ *
+ * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
+ *						to use for SPI transfer.
+ * @param	mem_addr 	Memory address of the register you wish to read from.
+ * @param	p_data[in]  Pointer to block of data to transfer (must have two unused bytes 
+ 						preceding the data for instruction).
+ * @param	size      	Size of data in bytes, including the two additional leading bytes.
+ *
+ * @warning First two bytes of data will be corrupted if you do not provide two unused leading bytes!
+ */
+void Adar_WriteBlock(const AdarDevice * p_adar, uint16_t mem_addr, uint8_t * p_data, uint32_t size)
+{
+    // Prepare command
+	p_data[0] = ((p_adar->dev_addr & 0x03) << 5);
+	p_data[0] |= ((mem_addr) >> 8) & 0x1F;
+	p_data[1] = (0xFF & mem_addr);
+
+    // Start the transfer
+	p_adar->Transfer(p_data, NULL, size);
+
+    // Return nothing since we assume this is non-blocking and won't wait around
+}
+
+
+/**
+ * @brief	Set contents of the INTERFACE_CONFIG_A register.
+ *
+ * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
+ *						to use for SPI transfer.
+ * @param 	flags     	#INTERFACE_CONFIG_A_SOFTRESET, #INTERFACE_CONFIG_A_LSB_FIRST,
+ *                  	#INTERFACE_CONFIG_A_ADDR_ASCN, #INTERFACE_CONFIG_A_SDO_ACTIVE
+ * @param 	broadcast	Send the message as a broadcast to all ADARs in the SPI chain
+ *						if this set to BROADCAST_ON.
+ */
+void Adar_WriteConfigA(const AdarDevice * p_adar, uint8_t flags, uint8_t broadcast)
+{
+	Adar_Write(p_adar, 0x00, flags, broadcast);
+}
+
+
+/**
+ * @brief 	Write a byte of @param data to the register located at @param mem_addr and
+ *			then read from the device and verify that the register was correctly set.
+ *
+ * @param	p_adar[in]	Adar pointer Which specifies the device and what function 
+ *						to use for SPI transfer.
+ * @param 	mem_addr  	Memory address of the register you wish to read from.
+ * @param 	data      	Byte of data to be stored in the register.
+ *
+ * @return	Returns the number of attempts that it took to successfully write to a register,
+ *			starting from zero.
+ * @warning This function currently only supports writes to a single regiter in a single ADAR.
+ */
+uint8_t Adar_WriteVerify(const AdarDevice * p_adar, uint32_t mem_addr, uint8_t data)
+{
+	uint8_t rx_data;
+
+	for (uint8_t ii = 0; ii < 3; ii++)
+	{
+		Adar_Write(p_adar, mem_addr, data, 0);
+
+		// Can't read back from an ADAR with HW address 0
+		if (!((p_adar->dev_addr) % 4))
+		{
+			return(ADAR_ERROR_INVALIDADDR);
+		}
+		rx_data = Adar_Read(p_adar, mem_addr);
+		if (rx_data == data)
+		{
+			return(ii);
+		}
+	}
+
+	return(ADAR_ERROR_FAILED);
+}
+
+void Adar_SetBit(const AdarDevice * p_adar, uint32_t mem_addr, uint8_t bit, uint8_t broadcast)
+	{
+		uint8_t temp = Adar_Read(p_adar, mem_addr);
+		uint8_t data = temp|(1<<bit);
+		Adar_Write(p_adar,mem_addr, data,broadcast);
+	}
+
+void Adar_ResetBit(const AdarDevice * p_adar, uint32_t mem_addr, uint8_t bit, uint8_t broadcast)
+	{
+		uint8_t temp = Adar_Read(p_adar, mem_addr);
+		uint8_t data = temp&~(1<<bit);
+		Adar_Write(p_adar,mem_addr, data,broadcast);
+	}
+
@@ -0,0 +1,294 @@
+/**
+ * MIT License
+ * 
+ * Copyright (c) 2020 Jimmy Pentz
+ *
+ * Reach me at: github.com/jgpentz, jpentz1( at )gmail.com
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sells
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ * 
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+/* ADAR1000 4-Channel, X Band and Ku Band Beamformer */
+#ifndef LIB_ADAR1000_H_
+#define LIB_ADAR1000_H_
+
+#ifndef NULL
+#define NULL    (0)
+#endif
+
+// ----------------------------------------------------------------------------
+// Includes
+// ----------------------------------------------------------------------------
+#include "main.h"
+#include "stm32f7xx_hal.h"
+#include "stm32f7xx_hal_spi.h"
+#include "stm32f7xx_hal_gpio.h"
+#include <stdbool.h>
+#include <stdint.h>
+#include <string.h>
+
+#ifdef __cplusplus
+extern "C" {  // Prevent C++ name mangling
+#endif
+
+
+
+
+// ----------------------------------------------------------------------------
+// Datatypes
+// ----------------------------------------------------------------------------
+extern SPI_HandleTypeDef hspi1;
+extern const uint8_t VM_GAIN[128];
+extern const uint8_t VM_I[128];
+extern const uint8_t VM_Q[128];
+
+/// A function pointer prototype for a SPI transfer, the 3 parameters would be
+/// p_txData, p_rxData, and size (number of bytes to transfer), respectively.
+typedef uint32_t (*Adar_SpiTransfer)( uint8_t *, uint8_t *, uint32_t);
+
+typedef struct
+ {
+ 	uint8_t			 dev_addr; 		///< 2-bit device hardware address, 0x00, 0x01, 0x10, 0x11
+ 	Adar_SpiTransfer Transfer;		///< Function pointer to the function used for SPI transfers
+ 	uint8_t *		 p_rx_buffer;	///< Data buffer to store received bytes into
+ }const AdarDevice;
+
+
+/// Use this to store bias current values into, as seen in the datasheet 
+/// Table 6. SPI Settings for Different Power Modules
+typedef struct
+{
+	uint8_t rx_lna;		///< nominal:  8, low power: 5
+	uint8_t rx_vm;		///< nominal:  5, low power: 2
+	uint8_t rx_vga;		///< nominal: 10, low power: 3
+	uint8_t tx_vm;		///< nominal:  5, low power: 2
+	uint8_t tx_vga;		///< nominal:  5, low power: 5
+	uint8_t tx_drv;		///< nominal:  6, low power: 3
+} AdarBiasCurrents;
+
+/// Useful for queries regarding the device info
+typedef struct
+{
+	uint8_t	 norm_operating_mode : 2;
+	uint8_t	 cust_operating_mode : 2;
+	uint8_t	 dev_status : 4;
+	uint8_t	 chip_type;
+	uint16_t product_id;
+	uint8_t	 scratchpad;
+	uint8_t	 spi_rev;
+	uint16_t vendor_id;
+	uint8_t	 rev_id;
+} AdarDeviceInfo;
+
+/// Return types for functions in this library
+typedef enum {
+	ADAR_ERROR_NOERROR		= 0,
+	ADAR_ERROR_FAILED		= 1,
+	ADAR_ERROR_INVALIDADDR	= 2,
+} AdarErrorCodes;
+
+
+// ----------------------------------------------------------------------------
+// Function Prototypes
+// ----------------------------------------------------------------------------
+void Adar_AdcInit(const AdarDevice * p_adar, uint8_t broadcast_bit);
+
+uint8_t Adar_AdcRead(const AdarDevice * p_adar, uint8_t broadcast_bit);
+
+uint8_t Adar_GetDeviceInfo(const AdarDevice * p_adar, AdarDeviceInfo * info);
+
+uint8_t Adar_Read(const AdarDevice * p_adar, uint32_t mem_addr);
+
+void Adar_ReadBlock(const AdarDevice * p_adar, uint16_t mem_addr, uint8_t * p_data, uint32_t size);
+
+uint8_t Adar_SetBiasCurrents(const AdarDevice * p_adar, AdarBiasCurrents * p_bias, uint8_t broadcast_bit);
+
+uint8_t Adar_SetBiasVoltages(const AdarDevice * p_adar, uint8_t bias_on_voltage[5], uint8_t bias_off_voltage[5]);
+
+uint8_t Adar_SetRamBypass(const AdarDevice * p_adar, uint8_t broadcast_bit);
+
+uint8_t Adar_SetRxVgaGain(const AdarDevice * p_adar, uint8_t channel, uint8_t vga_gain_db, uint8_t broadcast_bit);
+
+uint8_t Adar_SetRxPhase(const AdarDevice * p_adar, uint8_t channel, uint8_t phase, uint8_t broadcast_bit);
+
+uint8_t Adar_SetTxBias(const AdarDevice * p_adar, uint8_t broadcast_bit);
+
+uint8_t Adar_SetTxVgaGain(const AdarDevice * p_adar, uint8_t channel, uint8_t vga_gain_db, uint8_t broadcast_bit);
+
+uint8_t Adar_SetTxPhase(const AdarDevice * p_adar, uint8_t channel, uint8_t phase, uint8_t broadcast_bit);
+
+void Adar_SoftReset(const AdarDevice * p_adar);
+
+void Adar_SoftResetAll(const AdarDevice * p_adar);
+
+void Adar_Write(const AdarDevice * p_adar, uint32_t mem_addr, uint8_t data, uint8_t broadcast_bit);
+
+void Adar_WriteBlock(const AdarDevice * p_adar, uint16_t mem_addr, uint8_t * p_data, uint32_t size);
+
+void Adar_WriteConfigA(const AdarDevice * p_adar, uint8_t flags, uint8_t broadcast);
+
+uint8_t Adar_WriteVerify(const AdarDevice * p_adar, uint32_t mem_addr, uint8_t data);
+
+void Adar_SetBit(const AdarDevice * p_adar, uint32_t mem_addr, uint8_t bit, uint8_t broadcast);
+
+void Adar_ResetBit(const AdarDevice * p_adar, uint32_t mem_addr, uint8_t bit, uint8_t broadcast);
+
+
+// ----------------------------------------------------------------------------
+// Preprocessor Definitions and Constants
+// ----------------------------------------------------------------------------
+// Using BROADCAST_ON will send a command to all ADARs that share a bus
+#define BROADCAST_OFF					 0
+#define BROADCAST_ON					 1
+
+// The minimum size of a read from the ADARs consists of 3 bytes
+#define ADAR1000_RD_SIZE				 3
+
+// Address at which the TX RAM starts
+#define ADAR_TX_RAM_START_ADDR			 0x1800
+
+// ADC Defines
+#define ADAR1000_ADC_2MHZ_CLK			 0x00
+#define ADAR1000_ADC_EN					 0x60
+#define ADAR1000_ADC_ST_CONV			 0x70
+
+/* REGISTER DEFINITIONS */
+#define REG_INTERFACE_CONFIG_A			 0x000
+#define REG_INTERFACE_CONFIG_B			 0x001
+#define REG_DEV_CONFIG					 0x002
+#define REG_SCRATCHPAD					 0x00A
+#define REG_TRANSFER					 0x00F
+#define REG_CH1_RX_GAIN					 0x010
+#define REG_CH2_RX_GAIN					 0x011
+#define REG_CH3_RX_GAIN					 0x012
+#define REG_CH4_RX_GAIN					 0x013
+#define REG_CH1_RX_PHS_I				 0x014
+#define REG_CH1_RX_PHS_Q				 0x015
+#define REG_CH2_RX_PHS_I				 0x016
+#define REG_CH2_RX_PHS_Q				 0x017
+#define REG_CH3_RX_PHS_I				 0x018
+#define REG_CH3_RX_PHS_Q				 0x019
+#define REG_CH4_RX_PHS_I				 0x01A
+#define REG_CH4_RX_PHS_Q				 0x01B
+#define REG_CH1_TX_GAIN					 0x01C
+#define REG_CH2_TX_GAIN					 0x01D
+#define REG_CH3_TX_GAIN					 0x01E
+#define REG_CH4_TX_GAIN					 0x01F
+#define REG_CH1_TX_PHS_I				 0x020
+#define REG_CH1_TX_PHS_Q				 0x021
+#define REG_CH2_TX_PHS_I				 0x022
+#define REG_CH2_TX_PHS_Q				 0x023
+#define REG_CH3_TX_PHS_I				 0x024
+#define REG_CH3_TX_PHS_Q				 0x025
+#define REG_CH4_TX_PHS_I				 0x026
+#define REG_CH4_TX_PHS_Q				 0x027
+#define REG_LOAD_WORKING				 0x028
+#define REG_PA_CH1_BIAS_ON				 0x029
+#define REG_PA_CH2_BIAS_ON				 0x02A
+#define REG_PA_CH3_BIAS_ON				 0x02B
+#define REG_PA_CH4_BIAS_ON				 0x02C
+#define REG_LNA_BIAS_ON					 0x02D
+#define REG_RX_ENABLES					 0x02E
+#define REG_TX_ENABLES					 0x02F
+#define REG_MISC_ENABLES				 0x030
+#define REG_SW_CONTROL					 0x031
+#define REG_ADC_CONTROL					 0x032
+#define REG_ADC_CONTROL_TEMP_EN			 0xf0
+#define REG_ADC_OUT						 0x033
+#define REG_BIAS_CURRENT_RX_LNA			 0x034
+#define REG_BIAS_CURRENT_RX				 0x035
+#define REG_BIAS_CURRENT_TX				 0x036
+#define REG_BIAS_CURRENT_TX_DRV			 0x037
+#define REG_MEM_CTL						 0x038
+#define REG_RX_CHX_MEM					 0x039
+#define REG_TX_CHX_MEM					 0x03A
+#define REG_RX_CH1_MEM					 0x03D
+#define REG_RX_CH2_MEM					 0x03E
+#define REG_RX_CH3_MEM					 0x03F
+#define REG_RX_CH4_MEM					 0x040
+#define REG_TX_CH1_MEM					 0x041
+#define REG_TX_CH2_MEM					 0x042
+#define REG_TX_CH3_MEM					 0x043
+#define REG_TX_CH4_MEM					 0x044
+#define REG_PA_CH1_BIAS_OFF				 0x046
+#define REG_PA_CH2_BIAS_OFF				 0x047
+#define REG_PA_CH3_BIAS_OFF				 0x048
+#define REG_PA_CH4_BIAS_OFF				 0x049
+#define REG_LNA_BIAS_OFF				 0x04A
+#define REG_TX_BEAM_STEP_START			 0x04D
+#define REG_TX_BEAM_STEP_STOP			 0x04E
+#define REG_RX_BEAM_STEP_START			 0x04F
+#define REG_RX_BEAM_STEP_STOP			 0x050
+
+// REGISTER CONSTANTS
+#define INTERFACE_CONFIG_A_SOFTRESET	 	((1 << 7) | (1 << 0))
+#define INTERFACE_CONFIG_A_LSB_FIRST	 	((1 << 6) | (1 << 1))
+#define INTERFACE_CONFIG_A_ADDR_ASCN	 	((1 << 5) | (1 << 2))
+#define INTERFACE_CONFIG_A_SDO_ACTIVE		((1 << 4) | (1 << 3))
+
+#define LD_WRK_REGS_LDRX_OVERRIDE		   	(1 << 0)
+#define LD_WRK_REGS_LDTX_OVERRIDE		   	(1 << 1)
+
+#define RX_ENABLES_TX_VGA_EN			   	(1 << 0)
+#define RX_ENABLES_TX_VM_EN				   	(1 << 1)
+#define RX_ENABLES_TX_DRV_EN			   	(1 << 2)
+#define RX_ENABLES_CH3_TX_EN			   	(1 << 3)
+#define RX_ENABLES_CH2_TX_EN			   	(1 << 4)
+#define RX_ENABLES_CH1_TX_EN			   	(1 << 5)
+#define RX_ENABLES_CH0_TX_EN			   	(1 << 6)
+
+#define TX_ENABLES_TX_VGA_EN			   	(1 << 0)
+#define TX_ENABLES_TX_VM_EN				   	(1 << 1)
+#define TX_ENABLES_TX_DRV_EN			   	(1 << 2)
+#define TX_ENABLES_CH3_TX_EN			   	(1 << 3)
+#define TX_ENABLES_CH2_TX_EN			   	(1 << 4)
+#define TX_ENABLES_CH1_TX_EN			   	(1 << 5)
+#define TX_ENABLES_CH0_TX_EN			   	(1 << 6)
+
+#define MISC_ENABLES_CH4_DET_EN			   	(1 << 0)
+#define MISC_ENABLES_CH3_DET_EN			   	(1 << 1)
+#define MISC_ENABLES_CH2_DET_EN			   	(1 << 2)
+#define MISC_ENABLES_CH1_DET_EN			   	(1 << 3)
+#define MISC_ENABLES_LNA_BIAS_OUT_EN	   	(1 << 4)
+#define MISC_ENABLES_BIAS_EN			   	(1 << 5)
+#define MISC_ENABLES_BIAS_CTRL			   	(1 << 6)
+#define MISC_ENABLES_SW_DRV_TR_MODE_SEL	   	(1 << 7)
+
+#define SW_CTRL_POL						   	(1 << 0)
+#define SW_CTRL_TR_SPI					   	(1 << 1)
+#define SW_CTRL_TR_SOURCE				   	(1 << 2)
+#define SW_CTRL_SW_DRV_EN_POL			   	(1 << 3)
+#define SW_CTRL_SW_DRV_EN_TR			   	(1 << 4)
+#define SW_CTRL_RX_EN					   	(1 << 5)
+#define SW_CTRL_TX_EN					   	(1 << 6)
+#define SW_CTRL_SW_DRV_TR_STATE			   	(1 << 7)
+
+#define MEM_CTRL_RX_CHX_RAM_BYPASS		   	(1 << 0)
+#define MEM_CTRL_TX_CHX_RAM_BYPASS		   	(1 << 1)
+#define MEM_CTRL_RX_BEAM_STEP_EN		   	(1 << 2)
+#define MEM_CTRL_TX_BEAM_STEP_EN		   	(1 << 3)
+#define MEM_CTRL_BIAS_RAM_BYPASS		   	(1 << 5)
+#define MEM_CTRL_BEAM_RAM_BYPASS		   	(1 << 6)
+#define MEM_CTRL_SCAN_MODE_EN			   	(1 << 7)
+
+#ifdef __cplusplus
+}  // End extern "C"
+#endif
+
+#endif /* LIB_ADAR1000_H_ */
+
@@ -112,7 +112,7 @@ extern "C" {
 *   "BF"    -- ADAR1000 beamformer
 *   "PA"    -- Power amplifier bias/monitoring
 *   "FPGA"  -- FPGA communication and handshake
- *   "USB"   -- USB data path (FT2232H production / FT601 premium)
+ *   "USB"   -- FT601 USB data path
 *   "PWR"   -- Power sequencing and rail monitoring
 *   "IMU"   -- IMU/GPS/barometer sensors
 *   "MOT"   -- Stepper motor/scan mechanics
@@ -21,8 +21,8 @@
 #include "usb_device.h"
 #include "USBHandler.h"
 #include "usbd_cdc_if.h"
+#include "adar1000.h"
 #include "ADAR1000_Manager.h"
-#include "ADAR1000_AGC.h"
 extern "C" {
 #include "ad9523.h"
 }
@@ -45,9 +45,7 @@ extern "C" {
 #include <vector>
 #include "stm32_spi.h"
 #include "stm32_delay.h"
-extern "C" {
-#include "um982_gps.h"
-}
+#include "TinyGPSPlus.h"
 extern "C" {
 #include "GY_85_HAL.h"
 }
@@ -122,8 +120,8 @@ UART_HandleTypeDef huart5;
 UART_HandleTypeDef huart3;

 /* USER CODE BEGIN PV */
-// UM982 dual-antenna GPS receiver
-UM982_GPS_t um982;
+// The TinyGPSPlus object
+TinyGPSPlus gps;

 // Global data structures
 GPS_Data_t current_gps_data = {0};
@@ -174,7 +172,7 @@ float RADAR_Altitude;
 double RADAR_Longitude = 0;
 double RADAR_Latitude = 0;

-extern uint8_t GUI_start_flag_received;  // [STM32-006] Legacy, unused -- kept for linker compat
+extern uint8_t GUI_start_flag_received;


 //RADAR
@@ -226,7 +224,6 @@ extern SPI_HandleTypeDef hspi4;
 //ADAR1000

 ADAR1000Manager adarManager;
-ADAR1000_AGC    outerAgc;
 static uint8_t matrix1[15][16];
 static uint8_t matrix2[15][16];
 static uint8_t vector_0[16] = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
@@ -621,8 +618,7 @@ typedef enum {
    ERROR_POWER_SUPPLY,
    ERROR_TEMPERATURE_HIGH,
    ERROR_MEMORY_ALLOC,
-    ERROR_WATCHDOG_TIMEOUT,
-    ERROR_COUNT  // must be last — used for bounds checking error_strings[]
+    ERROR_WATCHDOG_TIMEOUT
 } SystemError_t;

 static SystemError_t last_error = ERROR_NONE;
@@ -633,41 +629,19 @@ static bool system_emergency_state = false;
 SystemError_t checkSystemHealth(void) {
    SystemError_t current_error = ERROR_NONE;

-    // 0. Watchdog: detect main-loop stall (checkSystemHealth not called for >60 s).
-    //    Timestamp is captured at function ENTRY and updated unconditionally, so
-    //    any early return from a sub-check below cannot leave a stale value that
-    //    would later trip a spurious ERROR_WATCHDOG_TIMEOUT. A dedicated cold-start
-    //    branch ensures the first call after boot never trips (last_health_check==0
-    //    would otherwise make `HAL_GetTick() - 0 > 60000` true forever after the
-    //    60-s mark of the init sequence).
-    static uint32_t last_health_check = 0;
-    uint32_t now_tick = HAL_GetTick();
-    if (last_health_check == 0) {
-        last_health_check = now_tick;          // cold start: seed only
-    } else {
-        uint32_t elapsed = now_tick - last_health_check;
-        last_health_check = now_tick;          // update BEFORE any early return
-        if (elapsed > 60000) {
-            current_error = ERROR_WATCHDOG_TIMEOUT;
-            DIAG_ERR("SYS", "Health check: Watchdog timeout (>60s since last check)");
-            return current_error;
-        }
-    }
-
    // 1. Check AD9523 Clock Generator
    static uint32_t last_clock_check = 0;
-    if (HAL_GetTick() - last_clock_check > 5000) {
-        GPIO_PinState s0 = HAL_GPIO_ReadPin(AD9523_STATUS0_GPIO_Port, AD9523_STATUS0_Pin);
-        GPIO_PinState s1 = HAL_GPIO_ReadPin(AD9523_STATUS1_GPIO_Port, AD9523_STATUS1_Pin);
-        DIAG_GPIO("CLK", "AD9523 STATUS0", s0);
-        DIAG_GPIO("CLK", "AD9523 STATUS1", s1);
-        if (s0 == GPIO_PIN_RESET || s1 == GPIO_PIN_RESET) {
-            current_error = ERROR_AD9523_CLOCK;
-            DIAG_ERR("CLK", "AD9523 clock health check FAILED (STATUS0=%d STATUS1=%d)", s0, s1);
-            return current_error;
-        }
-        last_clock_check = HAL_GetTick();
-    }
+    if (HAL_GetTick() - last_clock_check > 5000) {
+        GPIO_PinState s0 = HAL_GPIO_ReadPin(AD9523_STATUS0_GPIO_Port, AD9523_STATUS0_Pin);
+        GPIO_PinState s1 = HAL_GPIO_ReadPin(AD9523_STATUS1_GPIO_Port, AD9523_STATUS1_Pin);
+        DIAG_GPIO("CLK", "AD9523 STATUS0", s0);
+        DIAG_GPIO("CLK", "AD9523 STATUS1", s1);
+        if (s0 == GPIO_PIN_RESET || s1 == GPIO_PIN_RESET) {
+            current_error = ERROR_AD9523_CLOCK;
+            DIAG_ERR("CLK", "AD9523 clock health check FAILED (STATUS0=%d STATUS1=%d)", s0, s1);
+        }
+        last_clock_check = HAL_GetTick();
+    }

    // 2. Check ADF4382 Lock Status
    bool tx_locked, rx_locked;
@@ -675,12 +649,10 @@ SystemError_t checkSystemHealth(void) {
        if (!tx_locked) {
            current_error = ERROR_ADF4382_TX_UNLOCK;
            DIAG_ERR("LO", "Health check: TX LO UNLOCKED");
-            return current_error;
        }
        if (!rx_locked) {
            current_error = ERROR_ADF4382_RX_UNLOCK;
            DIAG_ERR("LO", "Health check: RX LO UNLOCKED");
-            return current_error;
        }
    }

@@ -689,47 +661,47 @@ SystemError_t checkSystemHealth(void) {
        if (!adarManager.verifyDeviceCommunication(i)) {
            current_error = ERROR_ADAR1000_COMM;
            DIAG_ERR("BF", "Health check: ADAR1000 #%d comm FAILED", i);
-            return current_error;
+            break;
        }

        float temp = adarManager.readTemperature(i);
        if (temp > 85.0f) {
            current_error = ERROR_ADAR1000_TEMP;
            DIAG_ERR("BF", "Health check: ADAR1000 #%d OVERTEMP %.1fC > 85C", i, temp);
-            return current_error;
+            break;
        }
    }

    // 4. Check IMU Communication
    static uint32_t last_imu_check = 0;
-    if (HAL_GetTick() - last_imu_check > 10000) {
-        if (!GY85_Update(&imu)) {
-            current_error = ERROR_IMU_COMM;
-            DIAG_ERR("IMU", "Health check: GY85_Update() FAILED");
-            return current_error;
-        }
-        last_imu_check = HAL_GetTick();
-    }
+    if (HAL_GetTick() - last_imu_check > 10000) {
+        if (!GY85_Update(&imu)) {
+            current_error = ERROR_IMU_COMM;
+            DIAG_ERR("IMU", "Health check: GY85_Update() FAILED");
+        }
+        last_imu_check = HAL_GetTick();
+    }

    // 5. Check BMP180 Communication
    static uint32_t last_bmp_check = 0;
-    if (HAL_GetTick() - last_bmp_check > 15000) {
-        double pressure = myBMP.getPressure();
-        if (pressure < 30000.0 || pressure > 110000.0 || isnan(pressure)) {
-            current_error = ERROR_BMP180_COMM;
-            DIAG_ERR("SYS", "Health check: BMP180 pressure out of range: %.0f", pressure);
-            return current_error;
-        }
-        last_bmp_check = HAL_GetTick();
-    }
+    if (HAL_GetTick() - last_bmp_check > 15000) {
+        double pressure = myBMP.getPressure();
+        if (pressure < 30000.0 || pressure > 110000.0 || isnan(pressure)) {
+            current_error = ERROR_BMP180_COMM;
+            DIAG_ERR("SYS", "Health check: BMP180 pressure out of range: %.0f", pressure);
+        }
+        last_bmp_check = HAL_GetTick();
+    }

-    // 6. Check GPS Communication (30s grace period from boot / last valid fix)
-    uint32_t gps_fix_age = um982_position_age(&um982);
-    if (gps_fix_age > 30000) {
-        current_error = ERROR_GPS_COMM;
-        DIAG_WARN("SYS", "Health check: GPS no fix for >30s (age=%lu ms)", (unsigned long)gps_fix_age);
-        return current_error;
-    }
+    // 6. Check GPS Communication
+    static uint32_t last_gps_fix = 0;
+    if (gps.location.isUpdated()) {
+        last_gps_fix = HAL_GetTick();
+    }
+    if (HAL_GetTick() - last_gps_fix > 30000) {
+        current_error = ERROR_GPS_COMM;
+        DIAG_WARN("SYS", "Health check: GPS no fix for >30s");
+    }

    // 7. Check RF Power Amplifier Current
    if (PowerAmplifier) {
@@ -737,12 +709,12 @@ SystemError_t checkSystemHealth(void) {
            if (Idq_reading[i] > 2.5f) {
                current_error = ERROR_RF_PA_OVERCURRENT;
                DIAG_ERR("PA", "Health check: PA ch%d OVERCURRENT Idq=%.3fA > 2.5A", i, Idq_reading[i]);
-                return current_error;
+                break;
            }
            if (Idq_reading[i] < 0.1f) {
                current_error = ERROR_RF_PA_BIAS;
                DIAG_ERR("PA", "Health check: PA ch%d BIAS FAULT Idq=%.3fA < 0.1A", i, Idq_reading[i]);
-                return current_error;
+                break;
            }
        }
    }
@@ -751,10 +723,15 @@ SystemError_t checkSystemHealth(void) {
    if (temperature > 75.0f) {
        current_error = ERROR_TEMPERATURE_HIGH;
        DIAG_ERR("SYS", "Health check: System OVERTEMP %.1fC > 75C", temperature);
-        return current_error;
    }

-    // 9. Watchdog check is performed at function entry (see step 0).
+    // 9. Simple watchdog check
+    static uint32_t last_health_check = 0;
+    if (HAL_GetTick() - last_health_check > 60000) {
+        current_error = ERROR_WATCHDOG_TIMEOUT;
+        DIAG_ERR("SYS", "Health check: Watchdog timeout (>60s since last check)");
+    }
+    last_health_check = HAL_GetTick();

    if (current_error != ERROR_NONE) {
        DIAG_ERR("SYS", "checkSystemHealth returning error code %d", current_error);
@@ -866,7 +843,7 @@ void handleSystemError(SystemError_t error) {
    DIAG_ERR("SYS", "handleSystemError: error=%d error_count=%lu", error, error_count);

    char error_msg[100];
-    static const char* const error_strings[] = {
+    const char* error_strings[] = {
        "No error",
        "AD9523 Clock failure",
        "ADF4382 TX LO unlocked",
@@ -886,16 +863,9 @@ void handleSystemError(SystemError_t error) {
        "Watchdog timeout"
    };

-    static_assert(sizeof(error_strings) / sizeof(error_strings[0]) == ERROR_COUNT,
-                  "error_strings[] and SystemError_t enum are out of sync");
-
-    const char* err_name = (error >= 0 && error < (int)(sizeof(error_strings) / sizeof(error_strings[0])))
-                           ? error_strings[error]
-                           : "Unknown error";
-
    snprintf(error_msg, sizeof(error_msg),
             "ERROR #%d: %s (Count: %lu)\r\n",
-             error, err_name, error_count);
+             error, error_strings[error], error_count);
    HAL_UART_Transmit(&huart3, (uint8_t*)error_msg, strlen(error_msg), 1000);

    // Blink LED pattern based on error code
@@ -905,23 +875,9 @@ void handleSystemError(SystemError_t error) {
        HAL_Delay(200);
    }

-    // Critical errors trigger emergency shutdown.
-    //
-    // Safety-critical range: any fault that can damage the PAs or leave the
-    // system in an undefined state must cut the RF rails via Emergency_Stop().
-    // This covers:
-    //   ERROR_RF_PA_OVERCURRENT .. ERROR_POWER_SUPPLY (9..13) -- PA/supply faults
-    //   ERROR_TEMPERATURE_HIGH  (14) -- >75 C on the PA thermal sensors;
-    //                                  without cutting bias + 5V/5V5/RFPA rails
-    //                                  the GaN QPA2962 stage can thermal-runaway.
-    //   ERROR_WATCHDOG_TIMEOUT  (16) -- health-check loop has stalled (>60 s);
-    //                                  transmitter state is unknown, safest to
-    //                                  latch Emergency_Stop rather than rely on
-    //                                  IWDG reset (which re-energises the rails).
-    if ((error >= ERROR_RF_PA_OVERCURRENT && error <= ERROR_POWER_SUPPLY) ||
-        error == ERROR_TEMPERATURE_HIGH ||
-        error == ERROR_WATCHDOG_TIMEOUT) {
-        DIAG_ERR("SYS", "CRITICAL ERROR (code %d: %s) -- initiating Emergency_Stop()", error, err_name);
+    // Critical errors trigger emergency shutdown
+    if (error >= ERROR_RF_PA_OVERCURRENT && error <= ERROR_POWER_SUPPLY) {
+        DIAG_ERR("SYS", "CRITICAL ERROR (code %d: %s) -- initiating Emergency_Stop()", error, error_strings[error]);
        snprintf(error_msg, sizeof(error_msg),
                 "CRITICAL ERROR! Initiating emergency shutdown.\r\n");
        HAL_UART_Transmit(&huart3, (uint8_t*)error_msg, strlen(error_msg), 1000);
@@ -963,41 +919,38 @@ bool checkSystemHealthStatus(void) {
 // Get system status for GUI
 // Get system status for GUI with 8 temperature variables
 void getSystemStatusForGUI(char* status_buffer, size_t buffer_size) {
-    // Build status string directly in the output buffer using offset-tracked
-    // snprintf.  Each call returns the number of chars written (excluding NUL),
-    // so we advance 'off' and shrink 'rem' to guarantee we never overflow.
-    size_t off = 0;
-    size_t rem = buffer_size;
-    int w;
+    char temp_buffer[200];
+    char final_status[500] = "System Status: ";

    // Basic status
    if (system_emergency_state) {
-        w = snprintf(status_buffer + off, rem, "System Status: EMERGENCY_STOP|");
+        strcat(final_status, "EMERGENCY_STOP|");
    } else {
-        w = snprintf(status_buffer + off, rem, "System Status: NORMAL|");
+        strcat(final_status, "NORMAL|");
    }
-    if (w > 0 && (size_t)w < rem) { off += (size_t)w; rem -= (size_t)w; }

    // Error information
-    w = snprintf(status_buffer + off, rem, "LastError:%d|ErrorCount:%lu|",
-                 last_error, error_count);
-    if (w > 0 && (size_t)w < rem) { off += (size_t)w; rem -= (size_t)w; }
+    snprintf(temp_buffer, sizeof(temp_buffer), "LastError:%d|ErrorCount:%lu|",
+             last_error, error_count);
+    strcat(final_status, temp_buffer);

    // Sensor status
-    w = snprintf(status_buffer + off, rem, "IMU:%.1f,%.1f,%.1f|GPS:%.6f,%.6f|ALT:%.1f|",
-                 Pitch_Sensor, Roll_Sensor, Yaw_Sensor,
-                 RADAR_Latitude, RADAR_Longitude, RADAR_Altitude);
-    if (w > 0 && (size_t)w < rem) { off += (size_t)w; rem -= (size_t)w; }
+    snprintf(temp_buffer, sizeof(temp_buffer), "IMU:%.1f,%.1f,%.1f|GPS:%.6f,%.6f|ALT:%.1f|",
+             Pitch_Sensor, Roll_Sensor, Yaw_Sensor,
+             RADAR_Latitude, RADAR_Longitude, RADAR_Altitude);
+    strcat(final_status, temp_buffer);

    // LO Status
    bool tx_locked, rx_locked;
    ADF4382A_CheckLockStatus(&lo_manager, &tx_locked, &rx_locked);
-    w = snprintf(status_buffer + off, rem, "LO_TX:%s|LO_RX:%s|",
-                 tx_locked ? "LOCKED" : "UNLOCKED",
-                 rx_locked ? "LOCKED" : "UNLOCKED");
-    if (w > 0 && (size_t)w < rem) { off += (size_t)w; rem -= (size_t)w; }
+    snprintf(temp_buffer, sizeof(temp_buffer), "LO_TX:%s|LO_RX:%s|",
+             tx_locked ? "LOCKED" : "UNLOCKED",
+             rx_locked ? "LOCKED" : "UNLOCKED");
+    strcat(final_status, temp_buffer);

    // Temperature readings (8 variables)
+    // You'll need to populate these temperature values from your sensors
+    // For now, I'll show how to format them - replace with actual temperature readings
    Temperature_1 = ADS7830_Measure_SingleEnded(&hadc3, 0);
    Temperature_2 = ADS7830_Measure_SingleEnded(&hadc3, 1);
    Temperature_3 = ADS7830_Measure_SingleEnded(&hadc3, 2);
@@ -1008,11 +961,11 @@ void getSystemStatusForGUI(char* status_buffer, size_t buffer_size) {
    Temperature_8 = ADS7830_Measure_SingleEnded(&hadc3, 7);

    // Format all 8 temperature variables
-    w = snprintf(status_buffer + off, rem,
-                 "T1:%.1f|T2:%.1f|T3:%.1f|T4:%.1f|T5:%.1f|T6:%.1f|T7:%.1f|T8:%.1f|",
-                 Temperature_1, Temperature_2, Temperature_3, Temperature_4,
-                 Temperature_5, Temperature_6, Temperature_7, Temperature_8);
-    if (w > 0 && (size_t)w < rem) { off += (size_t)w; rem -= (size_t)w; }
+    snprintf(temp_buffer, sizeof(temp_buffer),
+             "T1:%.1f|T2:%.1f|T3:%.1f|T4:%.1f|T5:%.1f|T6:%.1f|T7:%.1f|T8:%.1f|",
+             Temperature_1, Temperature_2, Temperature_3, Temperature_4,
+             Temperature_5, Temperature_6, Temperature_7, Temperature_8);
+    strcat(final_status, temp_buffer);

    // RF Power Amplifier status (if enabled)
    if (PowerAmplifier) {
@@ -1022,17 +975,18 @@ void getSystemStatusForGUI(char* status_buffer, size_t buffer_size) {
        }
        avg_current /= 16.0f;

-        w = snprintf(status_buffer + off, rem, "PA_AvgCurrent:%.2f|PA_Enabled:%d|",
-                     avg_current, PowerAmplifier);
-        if (w > 0 && (size_t)w < rem) { off += (size_t)w; rem -= (size_t)w; }
+        snprintf(temp_buffer, sizeof(temp_buffer), "PA_AvgCurrent:%.2f|PA_Enabled:%d|",
+                 avg_current, PowerAmplifier);
+        strcat(final_status, temp_buffer);
    }

    // Radar operation status
-    w = snprintf(status_buffer + off, rem, "BeamPos:%d|Azimuth:%d|ChirpCount:%d|",
-                 n, y, m);
-    if (w > 0 && (size_t)w < rem) { off += (size_t)w; rem -= (size_t)w; }
+    snprintf(temp_buffer, sizeof(temp_buffer), "BeamPos:%d|Azimuth:%d|ChirpCount:%d|",
+             n, y, m);
+    strcat(final_status, temp_buffer);

-    // NUL termination guaranteed by snprintf, but be safe
+    // Copy to output buffer
+    strncpy(status_buffer, final_status, buffer_size - 1);
    status_buffer[buffer_size - 1] = '\0';
 }

@@ -1054,7 +1008,20 @@ static inline void delay_ms(uint32_t ms) { HAL_Delay(ms); }



-// smartDelay removed -- replaced by non-blocking um982_process() in main loop
+// This custom version of delay() ensures that the gps object
+// is being "fed".
+static void smartDelay(unsigned long ms)
+{
+    uint32_t start = HAL_GetTick();
+    uint8_t ch;
+
+    do {
+        // While there is new data available in UART (non-blocking)
+        if (HAL_UART_Receive(&huart5, &ch, 1, 0) == HAL_OK) {
+            gps.encode(ch);   // Pass received byte to TinyGPS++ equivalent parser
+        }
+    } while (HAL_GetTick() - start < ms);
+}

 // Small helper to enable DWT cycle counter for microdelay
 static void DWT_Init(void)
@@ -1198,14 +1165,7 @@ static int configure_ad9523(void)

    // init ad9523 defaults (fills any missing pdata defaults)
    DIAG("CLK", "Calling ad9523_init() -- fills pdata defaults");
-    {
-        int32_t init_ret = ad9523_init(&init_param);
-        DIAG("CLK", "ad9523_init() returned %ld", (long)init_ret);
-        if (init_ret != 0) {
-            DIAG_ERR("CLK", "ad9523_init() FAILED (ret=%ld)", (long)init_ret);
-            return -1;
-        }
-    }
+    ad9523_init(&init_param);

    /* [Bug #2 FIXED] Removed first ad9523_setup() call that was here.
     * It wrote to the chip while still in reset — writes were lost.
@@ -1594,12 +1554,6 @@ int main(void)
    Yaw_Sensor = (180*atan2(magRawY,magRawX)/PI) - Mag_Declination;

    if(Yaw_Sensor<0)Yaw_Sensor+=360;
-
-    // Override magnetometer heading with UM982 dual-antenna heading when available
-    if (um982_is_heading_valid(&um982)) {
-        Yaw_Sensor = um982_get_heading(&um982);
-    }
-
    RxEst_0 = RxEst_1;
    RyEst_0 = RyEst_1;
    RzEst_0 = RzEst_1;
@@ -1775,38 +1729,14 @@ int main(void)
  	//////////////////////////////////////////////////////////////////////////////////////
    //////////////////////////////////////////GPS/////////////////////////////////////////
    //////////////////////////////////////////////////////////////////////////////////////
-  DIAG_SECTION("GPS INIT (UM982)");
-  DIAG("GPS", "Initializing UM982 on UART5 @ 115200 (baseline=50cm, tol=3cm)");
-  if (!um982_init(&um982, &huart5, 50.0f, 3.0f)) {
-      DIAG_WARN("GPS", "UM982 init: no VERSIONA response -- module may need more time");
-      // Not fatal: module may still start sending NMEA data after boot
-  } else {
-      DIAG("GPS", "UM982 init OK -- VERSIONA received");
+  for(int i=0; i<10;i++){
+  smartDelay(1000);
+  RADAR_Longitude = gps.location.lng();
+  RADAR_Latitude = gps.location.lat();
  }

-  // Collect GPS data for a few seconds (non-blocking pump)
-  DIAG("GPS", "Pumping GPS for 5 seconds to acquire initial fix...");
-  {
-      uint32_t gps_start = HAL_GetTick();
-      while (HAL_GetTick() - gps_start < 5000) {
-          um982_process(&um982);
-          HAL_Delay(10);
-      }
-  }
-  RADAR_Longitude = um982_get_longitude(&um982);
-  RADAR_Latitude = um982_get_latitude(&um982);
-  DIAG("GPS", "Initial position: lat=%.6f lon=%.6f fix=%d sats=%d",
-       RADAR_Latitude, RADAR_Longitude,
-       um982_get_fix_quality(&um982), um982_get_num_sats(&um982));
-
-  // Re-apply heading after GPS init so the north-alignment stepper move uses
-  // UM982 dual-antenna heading when available.
-  if (um982_is_heading_valid(&um982)) {
-      Yaw_Sensor = um982_get_heading(&um982);
-  }
-
-  //move Stepper to position 1 = 0°
-  HAL_GPIO_WritePin(STEPPER_CW_P_GPIO_Port, STEPPER_CW_P_Pin, GPIO_PIN_RESET);//Set stepper motor spinning direction to CCW
+  //move Stepper to position 1 = 0°
+  HAL_GPIO_WritePin(STEPPER_CW_P_GPIO_Port, STEPPER_CW_P_Pin, GPIO_PIN_RESET);//Set stepper motor spinning direction to CCW
  //Point Stepper to North
  for(int i= 0;i<(int)(Yaw_Sensor*Stepper_steps/360);i++){
 	  HAL_GPIO_WritePin(STEPPER_CLK_P_GPIO_Port, STEPPER_CLK_P_Pin, GPIO_PIN_SET);
@@ -1828,11 +1758,29 @@ int main(void)
      HAL_UART_Transmit(&huart3, (uint8_t*)gps_send_error, sizeof(gps_send_error) - 1, 1000);
  }

-  /* [STM32-006 FIXED] Removed blocking do-while loop that waited for
-   * usbHandler.isStartFlagReceived().  The production V7 PyQt GUI does not
-   * send the legacy 4-byte start flag [23,46,158,237], so this loop hung
-   * the MCU at boot indefinitely.  The USB settings handshake (if ever
-   * re-enabled) should be handled non-blocking in the main loop. */
+  // Check if start flag was received and settings are ready
+  do{
+	  if (usbHandler.isStartFlagReceived() &&
+		  usbHandler.getState() == USBHandler::USBState::READY_FOR_DATA) {
+
+		  const RadarSettings& settings = usbHandler.getSettings();
+
+		  // Use the settings to configure your radar system
+		  /*
+			  settings.getSystemFrequency();
+			  settings.getChirpDuration1();
+			  settings.getChirpDuration2();
+			  settings.getChirpsPerPosition();
+			  settings.getFreqMin();
+			  settings.getFreqMax();
+			  settings.getPRF1();
+			  settings.getPRF2();
+			  settings.getMaxDistance();
+			  */
+
+
+              }
+  }while(!usbHandler.isStartFlagReceived());

  /***************************************************************/
  /************RF Power Amplifier Powering up sequence************/
@@ -2047,28 +1995,15 @@ int main(void)
 	        HAL_UART_Transmit(&huart3, (uint8_t*)emergency_msg, strlen(emergency_msg), 1000);
 	        DIAG_ERR("SYS", "SAFE MODE ACTIVE -- blinking all LEDs, waiting for system_emergency_state clear");

-	        // Blink all LEDs to indicate safe mode (500ms period, visible to operator)
+	        // Blink all LEDs to indicate safe mode
 	        while (system_emergency_state) {
 	            HAL_GPIO_TogglePin(LED_1_GPIO_Port, LED_1_Pin);
 	            HAL_GPIO_TogglePin(LED_2_GPIO_Port, LED_2_Pin);
 	            HAL_GPIO_TogglePin(LED_3_GPIO_Port, LED_3_Pin);
 	            HAL_GPIO_TogglePin(LED_4_GPIO_Port, LED_4_Pin);
-	            HAL_Delay(250);
 	        }
 	        DIAG("SYS", "Exited safe mode blink loop -- system_emergency_state cleared");
 	    }
-
-	  //////////////////////////////////////////////////////////////////////////////////////
-	  ////////////////////////// GPS: Non-blocking NMEA processing ////////////////////////
-	  //////////////////////////////////////////////////////////////////////////////////////
-	  um982_process(&um982);
-
-	  // Update position globals continuously
-	  if (um982_is_position_valid(&um982)) {
-	      RADAR_Latitude = um982_get_latitude(&um982);
-	      RADAR_Longitude = um982_get_longitude(&um982);
-	  }
-
 	  //////////////////////////////////////////////////////////////////////////////////////
 	  ////////////////////////// Monitor ADF4382A lock status periodically//////////////////
 	  //////////////////////////////////////////////////////////////////////////////////////
@@ -2179,31 +2114,6 @@ int main(void)

      runRadarPulseSequence();

-      /* [AGC] Outer-loop AGC: sync enable from FPGA via DIG_6 (PD14),
-       * then read saturation flag (DIG_5 / PD13) and adjust ADAR1000 VGA
-       * common gain once per radar frame (~258 ms).
-       * FPGA register host_agc_enable is the single source of truth —
-       * DIG_6 propagates it to MCU every frame.
-       * 2-frame confirmation debounce: only change outerAgc.enabled when
-       * two consecutive frames read the same DIG_6 value. Prevents a
-       * single-sample glitch from causing a spurious AGC state transition.
-       * Added latency: 1 extra frame (~258 ms), acceptable for control plane. */
-      {
-          bool dig6_now = (HAL_GPIO_ReadPin(FPGA_DIG6_GPIO_Port,
-                                            FPGA_DIG6_Pin) == GPIO_PIN_SET);
-          static bool dig6_prev = false;  // matches boot default (AGC off)
-          if (dig6_now == dig6_prev) {
-              outerAgc.enabled = dig6_now;
-          }
-          dig6_prev = dig6_now;
-      }
-      if (outerAgc.enabled) {
-          bool sat = HAL_GPIO_ReadPin(FPGA_DIG5_SAT_GPIO_Port,
-                                      FPGA_DIG5_SAT_Pin) == GPIO_PIN_SET;
-          outerAgc.update(sat);
-          outerAgc.applyGain(adarManager);
-      }
-
      /* [GAP-3 FIX 2] Kick hardware watchdog — if we don't reach here within
       * ~4 s, the IWDG resets the MCU automatically. */
      HAL_IWDG_Refresh(&hiwdg);
@@ -2634,7 +2544,7 @@ static void MX_UART5_Init(void)

  /* USER CODE END UART5_Init 1 */
  huart5.Instance = UART5;
-  huart5.Init.BaudRate = 115200;
+  huart5.Init.BaudRate = 9600;
  huart5.Init.WordLength = UART_WORDLENGTH_8B;
  huart5.Init.StopBits = UART_STOPBITS_1;
  huart5.Init.Parity = UART_PARITY_NONE;
@@ -141,15 +141,6 @@ void Error_Handler(void);
 #define EN_DIS_RFPA_VDD_GPIO_Port GPIOD
 #define EN_DIS_COOLING_Pin GPIO_PIN_7
 #define EN_DIS_COOLING_GPIO_Port GPIOD
-
-/* FPGA digital I/O (directly connected GPIOs) */
-#define FPGA_DIG5_SAT_Pin       GPIO_PIN_13
-#define FPGA_DIG5_SAT_GPIO_Port GPIOD
-#define FPGA_DIG6_Pin           GPIO_PIN_14
-#define FPGA_DIG6_GPIO_Port     GPIOD
-#define FPGA_DIG7_Pin           GPIO_PIN_15
-#define FPGA_DIG7_GPIO_Port     GPIOD
-
 #define ADF4382_RX_CE_Pin GPIO_PIN_9
 #define ADF4382_RX_CE_GPIO_Port GPIOG
 #define ADF4382_RX_CS_Pin GPIO_PIN_10
@@ -1,586 +0,0 @@
-/*******************************************************************************
- * um982_gps.c -- UM982 dual-antenna GNSS receiver driver implementation
- *
- * See um982_gps.h for API documentation.
- * Command syntax per Unicore N4 Command Reference EN R1.14.
- ******************************************************************************/
-#include "um982_gps.h"
-#include <string.h>
-#include <stdlib.h>
-#include <stdio.h>
-
-/* ========================= Internal helpers ========================== */
-
-/**
- * Advance to the next comma-delimited field in an NMEA sentence.
- * Returns pointer to the start of the next field (after the comma),
- * or NULL if no more commas found before end-of-string or '*'.
- *
- * Handles empty fields (consecutive commas) correctly by returning
- * a pointer to the character after the comma (which may be another comma).
- */
-static const char *next_field(const char *p)
-{
-    if (p == NULL) return NULL;
-    while (*p != '\0' && *p != ',' && *p != '*') {
-        p++;
-    }
-    if (*p == ',') return p + 1;
-    return NULL;  /* End of sentence or checksum marker */
-}
-
-/**
- * Get the length of the current field (up to next comma, '*', or '\0').
- */
-static int field_len(const char *p)
-{
-    int len = 0;
-    if (p == NULL) return 0;
-    while (p[len] != '\0' && p[len] != ',' && p[len] != '*') {
-        len++;
-    }
-    return len;
-}
-
-/**
- * Check if a field is non-empty (has at least one character before delimiter).
- */
-static bool field_valid(const char *p)
-{
-    return p != NULL && field_len(p) > 0;
-}
-
-/**
- * Parse a floating-point value from a field, returning 0.0 if empty.
- */
-static double field_to_double(const char *p)
-{
-    if (!field_valid(p)) return 0.0;
-    return strtod(p, NULL);
-}
-
-static float field_to_float(const char *p)
-{
-    return (float)field_to_double(p);
-}
-
-static int field_to_int(const char *p)
-{
-    if (!field_valid(p)) return 0;
-    return (int)strtol(p, NULL, 10);
-}
-
-/* ========================= Checksum ================================== */
-
-bool um982_verify_checksum(const char *sentence)
-{
-    if (sentence == NULL || sentence[0] != '$') return false;
-
-    const char *p = sentence + 1;  /* Skip '$' */
-    uint8_t computed = 0;
-
-    while (*p != '\0' && *p != '*') {
-        computed ^= (uint8_t)*p;
-        p++;
-    }
-
-    if (*p != '*') return false;  /* No checksum marker found */
-    p++;  /* Skip '*' */
-
-    /* Parse 2-char hex checksum */
-    if (p[0] == '\0' || p[1] == '\0') return false;
-
-    char hex_str[3] = { p[0], p[1], '\0' };
-    unsigned long expected = strtoul(hex_str, NULL, 16);
-
-    return computed == (uint8_t)expected;
-}
-
-/* ========================= Coordinate parsing ======================== */
-
-double um982_parse_coord(const char *field, char hemisphere)
-{
-    if (field == NULL || field[0] == '\0') return NAN;
-
-    /* Find the decimal point to determine degree digit count.
-     * Latitude:  ddmm.mmmm  (dot at index 4, degrees = 2)
-     * Longitude: dddmm.mmmm (dot at index 5, degrees = 3)
-     * General:   degree_digits = dot_position - 2
-     */
-    const char *dot = strchr(field, '.');
-    if (dot == NULL) return NAN;
-
-    int dot_pos = (int)(dot - field);
-    int deg_digits = dot_pos - 2;
-
-    if (deg_digits < 1 || deg_digits > 3) return NAN;
-
-    /* Extract degree portion */
-    double degrees = 0.0;
-    for (int i = 0; i < deg_digits; i++) {
-        if (field[i] < '0' || field[i] > '9') return NAN;
-        degrees = degrees * 10.0 + (field[i] - '0');
-    }
-
-    /* Extract minutes portion (everything from deg_digits onward) */
-    double minutes = strtod(field + deg_digits, NULL);
-    if (minutes < 0.0 || minutes >= 60.0) return NAN;
-
-    double result = degrees + minutes / 60.0;
-
-    /* Apply hemisphere sign */
-    if (hemisphere == 'S' || hemisphere == 'W') {
-        result = -result;
-    }
-
-    return result;
-}
-
-/* ========================= Sentence parsers ========================== */
-
-/**
- * Identify the NMEA sentence type by skipping the 2-char talker ID
- * and comparing the 3-letter formatter.
- *
- * "$GNGGA,..." -> talker="GN", formatter="GGA"
- * "$GPTHS,..." -> talker="GP", formatter="THS"
- *
- * Returns pointer to the formatter (3 chars at sentence+3), or NULL
- * if sentence is too short.
- */
-static const char *get_formatter(const char *sentence)
-{
-    /* sentence starts with '$', followed by 2-char talker + 3-char formatter */
-    if (sentence == NULL || strlen(sentence) < 6) return NULL;
-    return sentence + 3;  /* Skip "$XX" -> points to formatter */
-}
-
-/**
- * Parse GGA sentence — position and fix quality.
- *
- * Format: $--GGA,time,lat,N/S,lon,E/W,quality,numSat,hdop,alt,M,geoidSep,M,dgpsAge,refID*XX
- *         field:  1    2   3    4   5     6      7     8    9 10    11    12   13     14
- */
-static void parse_gga(UM982_GPS_t *gps, const char *sentence)
-{
-    /* Skip to first field (after "$XXGGA,") */
-    const char *f = strchr(sentence, ',');
-    if (f == NULL) return;
-    f++;  /* f -> field 1 (time) */
-
-    /* Field 1: UTC time — skip for now */
-    const char *f2 = next_field(f);   /* lat */
-    const char *f3 = next_field(f2);  /* N/S */
-    const char *f4 = next_field(f3);  /* lon */
-    const char *f5 = next_field(f4);  /* E/W */
-    const char *f6 = next_field(f5);  /* quality */
-    const char *f7 = next_field(f6);  /* numSat */
-    const char *f8 = next_field(f7);  /* hdop */
-    const char *f9 = next_field(f8);  /* altitude */
-    const char *f10 = next_field(f9); /* M */
-    const char *f11 = next_field(f10); /* geoid sep */
-
-    uint32_t now = HAL_GetTick();
-
-    /* Parse fix quality first — if 0, position is meaningless */
-    gps->fix_quality = (uint8_t)field_to_int(f6);
-
-    /* Parse coordinates */
-    if (field_valid(f2) && field_valid(f3)) {
-        char hem = field_valid(f3) ? *f3 : 'N';
-        double lat = um982_parse_coord(f2, hem);
-        if (!isnan(lat)) gps->latitude = lat;
-    }
-
-    if (field_valid(f4) && field_valid(f5)) {
-        char hem = field_valid(f5) ? *f5 : 'E';
-        double lon = um982_parse_coord(f4, hem);
-        if (!isnan(lon)) gps->longitude = lon;
-    }
-
-    /* Number of satellites */
-    gps->num_satellites = (uint8_t)field_to_int(f7);
-
-    /* HDOP */
-    if (field_valid(f8)) {
-        gps->hdop = field_to_float(f8);
-    }
-
-    /* Altitude */
-    if (field_valid(f9)) {
-        gps->altitude = field_to_float(f9);
-    }
-
-    /* Geoid separation */
-    if (field_valid(f11)) {
-        gps->geoid_sep = field_to_float(f11);
-    }
-
-    gps->last_gga_tick = now;
-    if (gps->fix_quality != UM982_FIX_NONE) {
-        gps->last_fix_tick = now;
-    }
-}
-
-/**
- * Parse RMC sentence — recommended minimum (position, speed, date).
- *
- * Format: $--RMC,time,status,lat,N/S,lon,E/W,speed,course,date,magVar,E/W,mode*XX
- *         field:  1     2      3   4   5   6    7      8     9    10    11   12
- */
-static void parse_rmc(UM982_GPS_t *gps, const char *sentence)
-{
-    const char *f = strchr(sentence, ',');
-    if (f == NULL) return;
-    f++;  /* f -> field 1 (time) */
-
-    const char *f2 = next_field(f);   /* status */
-    const char *f3 = next_field(f2);  /* lat */
-    const char *f4 = next_field(f3);  /* N/S */
-    const char *f5 = next_field(f4);  /* lon */
-    const char *f6 = next_field(f5);  /* E/W */
-    const char *f7 = next_field(f6);  /* speed knots */
-    const char *f8 = next_field(f7);  /* course true */
-
-    /* Status */
-    if (field_valid(f2)) {
-        gps->rmc_status = *f2;
-    }
-
-    /* Position (only if status = A for valid) */
-    if (field_valid(f2) && *f2 == 'A') {
-        if (field_valid(f3) && field_valid(f4)) {
-            double lat = um982_parse_coord(f3, *f4);
-            if (!isnan(lat)) gps->latitude = lat;
-        }
-        if (field_valid(f5) && field_valid(f6)) {
-            double lon = um982_parse_coord(f5, *f6);
-            if (!isnan(lon)) gps->longitude = lon;
-        }
-    }
-
-    /* Speed (knots) */
-    if (field_valid(f7)) {
-        gps->speed_knots = field_to_float(f7);
-    }
-
-    /* Course */
-    if (field_valid(f8)) {
-        gps->course_true = field_to_float(f8);
-    }
-
-    gps->last_rmc_tick = HAL_GetTick();
-}
-
-/**
- * Parse THS sentence — true heading and status (UM982-specific).
- *
- * Format: $--THS,heading,mode*XX
- *         field:    1      2
- */
-static void parse_ths(UM982_GPS_t *gps, const char *sentence)
-{
-    const char *f = strchr(sentence, ',');
-    if (f == NULL) return;
-    f++;  /* f -> field 1 (heading) */
-
-    const char *f2 = next_field(f);  /* mode */
-
-    /* Heading */
-    if (field_valid(f)) {
-        gps->heading = field_to_float(f);
-    } else {
-        gps->heading = NAN;
-    }
-
-    /* Mode */
-    if (field_valid(f2)) {
-        gps->heading_mode = *f2;
-    } else {
-        gps->heading_mode = 'V';  /* Not valid if missing */
-    }
-
-    gps->last_ths_tick = HAL_GetTick();
-}
-
-/**
- * Parse VTG sentence — course and speed over ground.
- *
- * Format: $--VTG,courseTrue,T,courseMag,M,speedKnots,N,speedKmh,K,mode*XX
- *         field:     1      2     3      4     5      6    7     8   9
- */
-static void parse_vtg(UM982_GPS_t *gps, const char *sentence)
-{
-    const char *f = strchr(sentence, ',');
-    if (f == NULL) return;
-    f++;  /* f -> field 1 (course true) */
-
-    const char *f2 = next_field(f);   /* T */
-    const char *f3 = next_field(f2);  /* course mag */
-    const char *f4 = next_field(f3);  /* M */
-    const char *f5 = next_field(f4);  /* speed knots */
-    const char *f6 = next_field(f5);  /* N */
-    const char *f7 = next_field(f6);  /* speed km/h */
-
-    /* Course true */
-    if (field_valid(f)) {
-        gps->course_true = field_to_float(f);
-    }
-
-    /* Speed knots */
-    if (field_valid(f5)) {
-        gps->speed_knots = field_to_float(f5);
-    }
-
-    /* Speed km/h */
-    if (field_valid(f7)) {
-        gps->speed_kmh = field_to_float(f7);
-    }
-
-    gps->last_vtg_tick = HAL_GetTick();
-}
-
-/* ========================= Sentence dispatch ========================= */
-
-void um982_parse_sentence(UM982_GPS_t *gps, const char *sentence)
-{
-    if (sentence == NULL || sentence[0] != '$') return;
-
-    /* Verify checksum before parsing */
-    if (!um982_verify_checksum(sentence)) return;
-
-    /* Check for VERSIONA response (starts with '#', not '$') -- handled separately */
-    /* Actually VERSIONA starts with '#', so it won't enter here. We check in feed(). */
-
-    /* Identify sentence type */
-    const char *fmt = get_formatter(sentence);
-    if (fmt == NULL) return;
-
-    if (strncmp(fmt, "GGA", 3) == 0) {
-        gps->initialized = true;
-        parse_gga(gps, sentence);
-    } else if (strncmp(fmt, "RMC", 3) == 0) {
-        gps->initialized = true;
-        parse_rmc(gps, sentence);
-    } else if (strncmp(fmt, "THS", 3) == 0) {
-        gps->initialized = true;
-        parse_ths(gps, sentence);
-    } else if (strncmp(fmt, "VTG", 3) == 0) {
-        gps->initialized = true;
-        parse_vtg(gps, sentence);
-    }
-    /* Other sentences silently ignored */
-}
-
-/* ========================= Command interface ========================= */
-
-bool um982_send_command(UM982_GPS_t *gps, const char *cmd)
-{
-    if (gps == NULL || gps->huart == NULL || cmd == NULL) return false;
-
-    /* Build command with \r\n termination */
-    char buf[UM982_CMD_BUF_SIZE];
-    int len = snprintf(buf, sizeof(buf), "%s\r\n", cmd);
-    if (len <= 0 || (size_t)len >= sizeof(buf)) return false;
-
-    HAL_StatusTypeDef status = HAL_UART_Transmit(
-        gps->huart, (const uint8_t *)buf, (uint16_t)len, 100);
-
-    return status == HAL_OK;
-}
-
-/* ========================= Line assembly + feed ====================== */
-
-/**
- * Process a completed line from the line buffer.
- */
-static void process_line(UM982_GPS_t *gps, const char *line)
-{
-    if (line == NULL || line[0] == '\0') return;
-
-    /* NMEA sentence starts with '$' */
-    if (line[0] == '$') {
-        um982_parse_sentence(gps, line);
-        return;
-    }
-
-    /* Unicore proprietary response starts with '#' (e.g. #VERSIONA) */
-    if (line[0] == '#') {
-        if (strncmp(line + 1, "VERSIONA", 8) == 0) {
-            gps->version_received = true;
-            gps->initialized = true;
-        }
-        return;
-    }
-}
-
-void um982_feed(UM982_GPS_t *gps, const uint8_t *data, uint16_t len)
-{
-    if (gps == NULL || data == NULL || len == 0) return;
-
-    for (uint16_t i = 0; i < len; i++) {
-        uint8_t ch = data[i];
-
-        /* End of line: process if we have content */
-        if (ch == '\n' || ch == '\r') {
-            if (gps->line_len > 0 && !gps->line_overflow) {
-                gps->line_buf[gps->line_len] = '\0';
-                process_line(gps, gps->line_buf);
-            }
-            gps->line_len = 0;
-            gps->line_overflow = false;
-            continue;
-        }
-
-        /* Accumulate into line buffer */
-        if (gps->line_len < UM982_LINE_BUF_SIZE - 1) {
-            gps->line_buf[gps->line_len++] = (char)ch;
-        } else {
-            gps->line_overflow = true;
-        }
-    }
-}
-
-/* ========================= UART process (production) ================= */
-
-void um982_process(UM982_GPS_t *gps)
-{
-    if (gps == NULL || gps->huart == NULL) return;
-
-    /* Read all available bytes from the UART one at a time.
-     * At 115200 baud (~11.5 KB/s) and a typical main-loop period of ~10 ms,
-     * we expect ~115 bytes per call — negligible overhead on a 168 MHz STM32.
-     *
-     * Note: batch reads (HAL_UART_Receive with Size > 1 and Timeout = 0) are
-     * NOT safe here because the HAL consumes bytes from the data register as
-     * it reads them.  If fewer than Size bytes are available, the consumed
-     * bytes are lost (HAL_TIMEOUT is returned and the caller has no way to
-     * know how many bytes were actually placed into the buffer). */
-    uint8_t ch;
-    while (HAL_UART_Receive(gps->huart, &ch, 1, 0) == HAL_OK) {
-        um982_feed(gps, &ch, 1);
-    }
-}
-
-/* ========================= Validity checks =========================== */
-
-bool um982_is_heading_valid(const UM982_GPS_t *gps)
-{
-    if (gps == NULL) return false;
-    if (isnan(gps->heading)) return false;
-
-    /* Mode must be Autonomous or Differential */
-    if (gps->heading_mode != 'A' && gps->heading_mode != 'D') return false;
-
-    /* Check age */
-    uint32_t age = HAL_GetTick() - gps->last_ths_tick;
-    return age < UM982_HEADING_TIMEOUT_MS;
-}
-
-bool um982_is_position_valid(const UM982_GPS_t *gps)
-{
-    if (gps == NULL) return false;
-    if (gps->fix_quality == UM982_FIX_NONE) return false;
-
-    /* Check age of the last valid fix */
-    uint32_t age = HAL_GetTick() - gps->last_fix_tick;
-    return age < UM982_POSITION_TIMEOUT_MS;
-}
-
-uint32_t um982_heading_age(const UM982_GPS_t *gps)
-{
-    if (gps == NULL) return UINT32_MAX;
-    return HAL_GetTick() - gps->last_ths_tick;
-}
-
-uint32_t um982_position_age(const UM982_GPS_t *gps)
-{
-    if (gps == NULL) return UINT32_MAX;
-    return HAL_GetTick() - gps->last_fix_tick;
-}
-
-/* ========================= Initialization ============================ */
-
-bool um982_init(UM982_GPS_t *gps, UART_HandleTypeDef *huart,
-                float baseline_cm, float tolerance_cm)
-{
-    if (gps == NULL || huart == NULL) return false;
-
-    /* Zero-init entire structure */
-    memset(gps, 0, sizeof(UM982_GPS_t));
-
-    gps->huart = huart;
-    gps->heading = NAN;
-    gps->heading_mode = 'V';
-    gps->rmc_status = 'V';
-    gps->speed_knots = 0.0f;
-
-    /* Seed fix timestamp so position_age() returns ~0 instead of uptime.
-     * Gives the module a full 30s grace window from init to acquire a fix
-     * before the health check fires ERROR_GPS_COMM. */
-    gps->last_fix_tick = HAL_GetTick();
-    gps->speed_kmh = 0.0f;
-    gps->course_true = 0.0f;
-
-    /* Step 1: Stop all current output to get a clean slate */
-    um982_send_command(gps, "UNLOG");
-    HAL_Delay(100);
-
-    /* Step 2: Configure heading mode
-     * Per N4 Reference 4.18: CONFIG HEADING FIXLENGTH (default mode)
-     * "The distance between ANT1 and ANT2 is fixed. They move synchronously." */
-    um982_send_command(gps, "CONFIG HEADING FIXLENGTH");
-    HAL_Delay(50);
-
-    /* Step 3: Set baseline length if specified
-     * Per N4 Reference: CONFIG HEADING LENGTH <cm> <tolerance_cm>
-     * "parameter1: Fixed baseline length (cm), valid range >= 0"
-     * "parameter2: Tolerable error margin (cm), valid range > 0" */
-    if (baseline_cm > 0.0f) {
-        char cmd[64];
-        if (tolerance_cm > 0.0f) {
-            snprintf(cmd, sizeof(cmd), "CONFIG HEADING LENGTH %.0f %.0f",
-                     baseline_cm, tolerance_cm);
-        } else {
-            snprintf(cmd, sizeof(cmd), "CONFIG HEADING LENGTH %.0f",
-                     baseline_cm);
-        }
-        um982_send_command(gps, cmd);
-        HAL_Delay(50);
-    }
-
-    /* Step 4: Enable NMEA output sentences on COM2.
-     * Per N4 Reference: "When requesting NMEA messages, users should add GP
-     * before each command name"
-     *
-     * We target COM2 because the ELT0213 board (GNSS.STORE) exposes COM2
-     * (RXD2/TXD2) on its 12-pin JST connector (pins 5 & 6).  The STM32
-     * UART5 (PC12-TX, PD2-RX) connects to these pins via JP8.
-     * COM2 defaults to 115200 baud — matching our UART5 config. */
-    um982_send_command(gps, "GPGGA COM2 1");     /* GGA at 1 Hz */
-    HAL_Delay(50);
-    um982_send_command(gps, "GPRMC COM2 1");     /* RMC at 1 Hz */
-    HAL_Delay(50);
-    um982_send_command(gps, "GPTHS COM2 0.2");   /* THS at 5 Hz (heading primary) */
-    HAL_Delay(50);
-
-    /* Step 5: Skip SAVECONFIG -- NMEA config is re-sent every boot anyway.
-     * Saving to NVM on every power cycle would wear flash.  If persistent
-     * config is needed, call um982_send_command(gps, "SAVECONFIG") once
-     * during commissioning. */
-
-    /* Step 6: Query version to verify communication */
-    gps->version_received = false;
-    um982_send_command(gps, "VERSIONA");
-
-    /* Wait for VERSIONA response (non-blocking poll) */
-    uint32_t start = HAL_GetTick();
-    while (!gps->version_received &&
-           (HAL_GetTick() - start) < UM982_INIT_TIMEOUT_MS) {
-        um982_process(gps);
-        HAL_Delay(10);
-    }
-
-    gps->initialized = gps->version_received;
-    return gps->initialized;
-}
@@ -1,213 +0,0 @@
-/*******************************************************************************
- * um982_gps.h -- UM982 dual-antenna GNSS receiver driver
- *
- * Parses NMEA sentences (GGA, RMC, THS, VTG) from the Unicore UM982 module
- * and provides position, heading, and velocity data.
- *
- * Design principles:
- *   - Non-blocking: process() reads available UART bytes without waiting
- *   - Correct NMEA parsing: proper tokenizer handles empty fields
- *   - Longitude handles 3-digit degrees (dddmm.mmmm) via decimal-point detection
- *   - Checksum verified on every sentence
- *   - Command syntax verified against Unicore N4 Command Reference EN R1.14
- *
- * Hardware: UM982 on UART5 @ 115200 baud, dual-antenna heading mode
- ******************************************************************************/
-#ifndef UM982_GPS_H
-#define UM982_GPS_H
-
-#include <stdint.h>
-#include <stdbool.h>
-#include <math.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Forward-declare the HAL UART handle type.  The real definition comes from
- * stm32f7xx_hal.h (production) or stm32_hal_mock.h (tests). */
-#ifndef STM32_HAL_MOCK_H
-#include "stm32f7xx_hal.h"
-#else
-/* Already included via mock -- nothing to do */
-#endif
-
-/* ========================= Constants ================================= */
-
-#define UM982_RX_BUF_SIZE    512   /* Ring buffer for incoming UART bytes */
-#define UM982_LINE_BUF_SIZE   96   /* Max NMEA sentence (82 chars + margin) */
-#define UM982_CMD_BUF_SIZE   128   /* Outgoing command buffer */
-#define UM982_INIT_TIMEOUT_MS 3000 /* Timeout waiting for VERSIONA response */
-
-/* Fix quality values (from GGA field 6) */
-#define UM982_FIX_NONE       0
-#define UM982_FIX_GPS        1
-#define UM982_FIX_DGPS       2
-#define UM982_FIX_RTK_FIXED  4
-#define UM982_FIX_RTK_FLOAT  5
-
-/* Validity timeout defaults (ms) */
-#define UM982_HEADING_TIMEOUT_MS 2000
-#define UM982_POSITION_TIMEOUT_MS 5000
-
-/* ========================= Data Types ================================ */
-
-typedef struct {
-    /* Position */
-    double   latitude;       /* Decimal degrees, positive = North */
-    double   longitude;      /* Decimal degrees, positive = East */
-    float    altitude;       /* Meters above MSL */
-    float    geoid_sep;      /* Geoid separation (meters) */
-
-    /* Heading (from dual-antenna THS) */
-    float    heading;        /* True heading 0-360 degrees, NAN if invalid */
-    char     heading_mode;   /* A=autonomous, D=diff, E=est, M=manual, S=sim, V=invalid */
-
-    /* Velocity */
-    float    speed_knots;    /* Speed over ground (knots) */
-    float    speed_kmh;      /* Speed over ground (km/h) */
-    float    course_true;    /* Course over ground (degrees true) */
-
-    /* Quality */
-    uint8_t  fix_quality;    /* 0=none, 1=GPS, 2=DGPS, 4=RTK fixed, 5=RTK float */
-    uint8_t  num_satellites; /* Satellites used in fix */
-    float    hdop;           /* Horizontal dilution of precision */
-
-    /* RMC status */
-    char     rmc_status;     /* A=valid, V=warning */
-
-    /* Timestamps (HAL_GetTick() at last update) */
-    uint32_t last_fix_tick;   /* Last valid GGA fix (fix_quality > 0) */
-    uint32_t last_gga_tick;
-    uint32_t last_rmc_tick;
-    uint32_t last_ths_tick;
-    uint32_t last_vtg_tick;
-
-    /* Communication state */
-    bool     initialized;      /* VERSIONA or supported NMEA traffic seen */
-    bool     version_received; /* VERSIONA response seen */
-
-    /* ---- Internal parser state (not for external use) ---- */
-
-    /* Ring buffer */
-    uint8_t  rx_buf[UM982_RX_BUF_SIZE];
-    uint16_t rx_head;        /* Write index */
-    uint16_t rx_tail;        /* Read index */
-
-    /* Line assembler */
-    char     line_buf[UM982_LINE_BUF_SIZE];
-    uint8_t  line_len;
-    bool     line_overflow;  /* Current line exceeded buffer */
-
-    /* UART handle */
-    UART_HandleTypeDef *huart;
-
-} UM982_GPS_t;
-
-/* ========================= Public API ================================ */
-
-/**
- * Initialize the UM982_GPS_t structure and configure the module.
- *
- * Sends: UNLOG, CONFIG HEADING, optional CONFIG HEADING LENGTH,
- *        GPGGA, GPRMC, GPTHS
- * Queries VERSIONA to verify communication.
- *
- * @param gps          Pointer to UM982_GPS_t instance
- * @param huart        UART handle (e.g. &huart5)
- * @param baseline_cm  Distance between antennas in cm (0 = use module default)
- * @param tolerance_cm Baseline tolerance in cm (0 = use module default)
- * @return true if VERSIONA response received within timeout
- */
-bool um982_init(UM982_GPS_t *gps, UART_HandleTypeDef *huart,
-                float baseline_cm, float tolerance_cm);
-
-/**
- * Process available UART data. Call from main loop — non-blocking.
- *
- * Reads all available bytes from UART, assembles lines, and dispatches
- * complete NMEA sentences to the appropriate parser.
- *
- * @param gps  Pointer to UM982_GPS_t instance
- */
-void um982_process(UM982_GPS_t *gps);
-
-/**
- * Feed raw bytes directly into the parser (useful for testing).
- * In production, um982_process() calls this internally after UART read.
- *
- * @param gps   Pointer to UM982_GPS_t instance
- * @param data  Pointer to byte array
- * @param len   Number of bytes
- */
-void um982_feed(UM982_GPS_t *gps, const uint8_t *data, uint16_t len);
-
-/* ---- Getters ---- */
-
-static inline float    um982_get_heading(const UM982_GPS_t *gps)     { return gps->heading; }
-static inline double   um982_get_latitude(const UM982_GPS_t *gps)    { return gps->latitude; }
-static inline double   um982_get_longitude(const UM982_GPS_t *gps)   { return gps->longitude; }
-static inline float    um982_get_altitude(const UM982_GPS_t *gps)    { return gps->altitude; }
-static inline uint8_t  um982_get_fix_quality(const UM982_GPS_t *gps) { return gps->fix_quality; }
-static inline uint8_t  um982_get_num_sats(const UM982_GPS_t *gps)    { return gps->num_satellites; }
-static inline float    um982_get_hdop(const UM982_GPS_t *gps)        { return gps->hdop; }
-static inline float    um982_get_speed_knots(const UM982_GPS_t *gps) { return gps->speed_knots; }
-static inline float    um982_get_speed_kmh(const UM982_GPS_t *gps)   { return gps->speed_kmh; }
-static inline float    um982_get_course(const UM982_GPS_t *gps)      { return gps->course_true; }
-
-/**
- * Check if heading is valid (mode A or D, and within timeout).
- */
-bool um982_is_heading_valid(const UM982_GPS_t *gps);
-
-/**
- * Check if position is valid (fix_quality > 0, and within timeout).
- */
-bool um982_is_position_valid(const UM982_GPS_t *gps);
-
-/**
- * Get age of last heading update in milliseconds.
- */
-uint32_t um982_heading_age(const UM982_GPS_t *gps);
-
-/**
- * Get age of the last valid position fix in milliseconds.
- */
-uint32_t um982_position_age(const UM982_GPS_t *gps);
-
-/* ========================= Internal (exposed for testing) ============ */
-
-/**
- * Verify NMEA checksum. Returns true if valid.
- * Sentence must start with '$' and contain '*XX' before termination.
- */
-bool um982_verify_checksum(const char *sentence);
-
-/**
- * Parse a complete NMEA line (with $ prefix and *XX checksum).
- * Dispatches to GGA/RMC/THS/VTG parsers as appropriate.
- */
-void um982_parse_sentence(UM982_GPS_t *gps, const char *sentence);
-
-/**
- * Parse NMEA coordinate string to decimal degrees.
- * Works for both latitude (ddmm.mmmm) and longitude (dddmm.mmmm)
- * by detecting the decimal point position.
- *
- * @param field     NMEA coordinate field (e.g. "4404.14036" or "12118.85961")
- * @param hemisphere 'N', 'S', 'E', or 'W'
- * @return Decimal degrees (negative for S/W), or NAN on parse error
- */
-double um982_parse_coord(const char *field, char hemisphere);
-
-/**
- * Send a command to the UM982. Appends \r\n automatically.
- * @return true if UART transmit succeeded
- */
-bool um982_send_command(UM982_GPS_t *gps, const char *cmd);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* UM982_GPS_H */
@@ -3,38 +3,18 @@
 *.dSYM/

 # Test binaries (built by Makefile)
-# TESTS_WITH_REAL
 test_bug1_timed_sync_init_ordering
+test_bug2_ad9523_double_setup
 test_bug3_timed_sync_noop
 test_bug4_phase_shift_before_check
 test_bug5_fine_phase_gpio_only
-test_bug9_platform_ops_null
-test_bug10_spi_cs_not_toggled
-test_bug15_htim3_dangling_extern
-
-# TESTS_MOCK_ONLY
-test_bug2_ad9523_double_setup
 test_bug6_timer_variable_collision
 test_bug7_gpio_pin_conflict
 test_bug8_uart_commented_out
-test_bug14_diag_section_args
-test_gap3_emergency_stop_rails
-
-# TESTS_STANDALONE
+test_bug9_platform_ops_null
+test_bug10_spi_cs_not_toggled
+test_bug11_platform_spi_transmit_only
 test_bug12_pa_cal_loop_inverted
 test_bug13_dac2_adc_buffer_mismatch
-test_gap3_iwdg_config
-test_gap3_temperature_max
-test_gap3_idq_periodic_reread
-test_gap3_emergency_state_ordering
-test_gap3_overtemp_emergency_stop
-test_gap3_health_watchdog_cold_start
-
-# TESTS_WITH_PLATFORM
-test_bug11_platform_spi_transmit_only
-
-# TESTS_WITH_CXX
-test_agc_outer_loop
-
-# Manual / one-off test builds
-test_um982_gps
+test_bug14_diag_section_args
+test_bug15_htim3_dangling_extern
@@ -16,21 +16,10 @@
 ################################################################################

 CC       := cc
-CXX      := c++
 CFLAGS   := -std=c11 -Wall -Wextra -Wno-unused-parameter -g -O0
-CXXFLAGS := -std=c++17 -Wall -Wextra -Wno-unused-parameter -g -O0
 # Shim headers come FIRST so they override real headers
 INCLUDES := -Ishims -I. -I../9_1_1_C_Cpp_Libraries

-# C++ library directory (AGC, ADAR1000 Manager)
-CXX_LIB_DIR := ../9_1_1_C_Cpp_Libraries
-CXX_SRCS    := $(CXX_LIB_DIR)/ADAR1000_AGC.cpp $(CXX_LIB_DIR)/ADAR1000_Manager.cpp
-CXX_OBJS    := ADAR1000_AGC.o ADAR1000_Manager.o
-
-# GPS driver source
-GPS_SRC := ../9_1_3_C_Cpp_Code/um982_gps.c
-GPS_OBJ := um982_gps.o
-
 # Real source files compiled against mock headers
 REAL_SRC := ../9_1_1_C_Cpp_Libraries/adf4382a_manager.c

@@ -68,25 +57,16 @@ TESTS_STANDALONE := test_bug12_pa_cal_loop_inverted \
                    test_gap3_iwdg_config \
                    test_gap3_temperature_max \
                    test_gap3_idq_periodic_reread \
-                    test_gap3_emergency_state_ordering \
-                    test_gap3_overtemp_emergency_stop \
-                    test_gap3_health_watchdog_cold_start
+                    test_gap3_emergency_state_ordering

 # Tests that need platform_noos_stm32.o + mocks
 TESTS_WITH_PLATFORM := test_bug11_platform_spi_transmit_only

-# C++ tests (AGC outer loop)
-TESTS_WITH_CXX := test_agc_outer_loop
-
-# GPS driver tests (need mocks + GPS source + -lm)
-TESTS_GPS := test_um982_gps
-
-ALL_TESTS := $(TESTS_WITH_REAL) $(TESTS_MOCK_ONLY) $(TESTS_STANDALONE) $(TESTS_WITH_PLATFORM) $(TESTS_WITH_CXX) $(TESTS_GPS)
+ALL_TESTS := $(TESTS_WITH_REAL) $(TESTS_MOCK_ONLY) $(TESTS_STANDALONE) $(TESTS_WITH_PLATFORM)

 .PHONY: all build test clean \
        $(addprefix test_,bug1 bug2 bug3 bug4 bug5 bug6 bug7 bug8 bug9 bug10 bug11 bug12 bug13 bug14 bug15) \
-        test_gap3_estop test_gap3_iwdg test_gap3_temp test_gap3_idq test_gap3_order \
-        test_gap3_overtemp test_gap3_wdog
+        test_gap3_estop test_gap3_iwdg test_gap3_temp test_gap3_idq test_gap3_order

 all: build test

@@ -172,48 +152,10 @@ test_gap3_idq_periodic_reread: test_gap3_idq_periodic_reread.c
 test_gap3_emergency_state_ordering: test_gap3_emergency_state_ordering.c
 	$(CC) $(CFLAGS) $< -o $@

-test_gap3_overtemp_emergency_stop: test_gap3_overtemp_emergency_stop.c
-	$(CC) $(CFLAGS) $< -o $@
-
-test_gap3_health_watchdog_cold_start: test_gap3_health_watchdog_cold_start.c
-	$(CC) $(CFLAGS) $< -o $@
-
 # Tests that need platform_noos_stm32.o + mocks
 $(TESTS_WITH_PLATFORM): %: %.c $(MOCK_OBJS) $(PLATFORM_OBJ)
 	$(CC) $(CFLAGS) $(INCLUDES) $< $(MOCK_OBJS) $(PLATFORM_OBJ) -o $@

-# --- C++ object rules ---
-
-ADAR1000_AGC.o: $(CXX_LIB_DIR)/ADAR1000_AGC.cpp $(CXX_LIB_DIR)/ADAR1000_AGC.h
-	$(CXX) $(CXXFLAGS) $(INCLUDES) -c $< -o $@
-
-ADAR1000_Manager.o: $(CXX_LIB_DIR)/ADAR1000_Manager.cpp $(CXX_LIB_DIR)/ADAR1000_Manager.h
-	$(CXX) $(CXXFLAGS) $(INCLUDES) -c $< -o $@
-
-# --- C++ test binary rules ---
-
-test_agc_outer_loop: test_agc_outer_loop.cpp $(CXX_OBJS) $(MOCK_OBJS)
-	$(CXX) $(CXXFLAGS) $(INCLUDES) $< $(CXX_OBJS) $(MOCK_OBJS) -o $@
-
-# Convenience target
-.PHONY: test_agc
-test_agc: test_agc_outer_loop
-	./test_agc_outer_loop
-
-# --- GPS driver rules ---
-
-$(GPS_OBJ): $(GPS_SRC)
-	$(CC) $(CFLAGS) $(INCLUDES) -I../9_1_3_C_Cpp_Code -c $< -o $@
-
-# Note: test includes um982_gps.c directly for white-box testing (static fn access)
-test_um982_gps: test_um982_gps.c $(MOCK_OBJS)
-	$(CC) $(CFLAGS) $(INCLUDES) -I../9_1_3_C_Cpp_Code $< $(MOCK_OBJS) -lm -o $@
-
-# Convenience target
-.PHONY: test_gps
-test_gps: test_um982_gps
-	./test_um982_gps
-
 # --- Individual test targets ---

 test_bug1: test_bug1_timed_sync_init_ordering
@@ -276,12 +218,6 @@ test_gap3_idq: test_gap3_idq_periodic_reread
 test_gap3_order: test_gap3_emergency_state_ordering
 	./test_gap3_emergency_state_ordering

-test_gap3_overtemp: test_gap3_overtemp_emergency_stop
-	./test_gap3_overtemp_emergency_stop
-
-test_gap3_wdog: test_gap3_health_watchdog_cold_start
-	./test_gap3_health_watchdog_cold_start
-
 # --- Clean ---

 clean:
@@ -129,14 +129,6 @@ void Error_Handler(void);
 #define GYR_INT_Pin GPIO_PIN_8
 #define GYR_INT_GPIO_Port GPIOC

-/* FPGA digital I/O (directly connected GPIOs) */
-#define FPGA_DIG5_SAT_Pin       GPIO_PIN_13
-#define FPGA_DIG5_SAT_GPIO_Port GPIOD
-#define FPGA_DIG6_Pin           GPIO_PIN_14
-#define FPGA_DIG6_GPIO_Port     GPIOD
-#define FPGA_DIG7_Pin           GPIO_PIN_15
-#define FPGA_DIG7_GPIO_Port     GPIOD
-
 #ifdef __cplusplus
 }
 #endif
@@ -21,7 +21,6 @@ SPI_HandleTypeDef  hspi4 = { .id = 4 };
 I2C_HandleTypeDef  hi2c1 = { .id = 1 };
 I2C_HandleTypeDef  hi2c2 = { .id = 2 };
 UART_HandleTypeDef huart3 = { .id = 3 };
-UART_HandleTypeDef huart5 = { .id = 5 };  /* GPS UART */
 ADC_HandleTypeDef  hadc3 = { .id = 3 };
 TIM_HandleTypeDef  htim3 = { .id = 3 };

@@ -35,26 +34,6 @@ uint32_t mock_tick = 0;
 /* ========================= Printf control ========================= */
 int mock_printf_enabled = 0;

-/* ========================= Mock UART TX capture =================== */
-uint8_t  mock_uart_tx_buf[MOCK_UART_TX_BUF_SIZE];
-uint16_t mock_uart_tx_len = 0;
-
-/* ========================= Mock UART RX buffer ==================== */
-#define MOCK_UART_RX_SLOTS 8
-
-static struct {
-    uint32_t uart_id;
-    uint8_t  buf[MOCK_UART_RX_BUF_SIZE];
-    uint16_t head;
-    uint16_t tail;
-} mock_uart_rx[MOCK_UART_RX_SLOTS];
-
-void mock_uart_tx_clear(void)
-{
-    mock_uart_tx_len = 0;
-    memset(mock_uart_tx_buf, 0, sizeof(mock_uart_tx_buf));
-}
-
 /* ========================= Mock GPIO read ========================= */
 #define GPIO_READ_TABLE_SIZE 32
 static struct {
@@ -70,9 +49,6 @@ void spy_reset(void)
    mock_tick = 0;
    mock_printf_enabled = 0;
    memset(gpio_read_table, 0, sizeof(gpio_read_table));
-    memset(mock_uart_rx, 0, sizeof(mock_uart_rx));
-    mock_uart_tx_len = 0;
-    memset(mock_uart_tx_buf, 0, sizeof(mock_uart_tx_buf));
 }

 const SpyRecord *spy_get(int index)
@@ -199,7 +175,7 @@ void HAL_Delay(uint32_t Delay)
    mock_tick += Delay;
 }

-HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData,
+HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData,
                                     uint16_t Size, uint32_t Timeout)
 {
    spy_push((SpyRecord){
@@ -209,83 +185,6 @@ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pD
        .value = Timeout,
        .extra = huart
    });
-    /* Capture TX data for test inspection */
-    for (uint16_t i = 0; i < Size && mock_uart_tx_len < MOCK_UART_TX_BUF_SIZE; i++) {
-        mock_uart_tx_buf[mock_uart_tx_len++] = pData[i];
-    }
-    return HAL_OK;
-}
-
-/* ========================= Mock UART RX helpers ====================== */
-
-/* find_rx_slot, mock_uart_rx_load, etc. use the mock_uart_rx declared above */
-
-static int find_rx_slot(UART_HandleTypeDef *huart)
-{
-    if (huart == NULL) return -1;
-    /* Find existing slot */
-    for (int i = 0; i < MOCK_UART_RX_SLOTS; i++) {
-        if (mock_uart_rx[i].uart_id == huart->id && mock_uart_rx[i].head != mock_uart_rx[i].tail) {
-            return i;
-        }
-        if (mock_uart_rx[i].uart_id == huart->id) {
-            return i;
-        }
-    }
-    /* Find empty slot */
-    for (int i = 0; i < MOCK_UART_RX_SLOTS; i++) {
-        if (mock_uart_rx[i].uart_id == 0) {
-            mock_uart_rx[i].uart_id = huart->id;
-            return i;
-        }
-    }
-    return -1;
-}
-
-void mock_uart_rx_load(UART_HandleTypeDef *huart, const uint8_t *data, uint16_t len)
-{
-    int slot = find_rx_slot(huart);
-    if (slot < 0) return;
-    mock_uart_rx[slot].uart_id = huart->id;
-    for (uint16_t i = 0; i < len; i++) {
-        uint16_t next = (mock_uart_rx[slot].head + 1) % MOCK_UART_RX_BUF_SIZE;
-        if (next == mock_uart_rx[slot].tail) break;  /* Buffer full */
-        mock_uart_rx[slot].buf[mock_uart_rx[slot].head] = data[i];
-        mock_uart_rx[slot].head = next;
-    }
-}
-
-void mock_uart_rx_clear(UART_HandleTypeDef *huart)
-{
-    int slot = find_rx_slot(huart);
-    if (slot < 0) return;
-    mock_uart_rx[slot].head = 0;
-    mock_uart_rx[slot].tail = 0;
-}
-
-HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData,
-                                    uint16_t Size, uint32_t Timeout)
-{
-    (void)Timeout;
-    int slot = find_rx_slot(huart);
-    if (slot < 0) return HAL_TIMEOUT;
-
-    for (uint16_t i = 0; i < Size; i++) {
-        if (mock_uart_rx[slot].head == mock_uart_rx[slot].tail) {
-            return HAL_TIMEOUT;  /* No more data */
-        }
-        pData[i] = mock_uart_rx[slot].buf[mock_uart_rx[slot].tail];
-        mock_uart_rx[slot].tail = (mock_uart_rx[slot].tail + 1) % MOCK_UART_RX_BUF_SIZE;
-    }
-
-    spy_push((SpyRecord){
-        .type  = SPY_UART_RX,
-        .port  = NULL,
-        .pin   = Size,
-        .value = Timeout,
-        .extra = huart
-    });
-
    return HAL_OK;
 }

@@ -34,10 +34,6 @@ typedef uint32_t HAL_StatusTypeDef;

 #define HAL_MAX_DELAY 0xFFFFFFFFU

-#ifndef __NOP
-#define __NOP() ((void)0)
-#endif
-
 /* ========================= GPIO Types ============================ */

 typedef struct {
@@ -105,7 +101,6 @@ typedef struct {
 extern SPI_HandleTypeDef  hspi1, hspi4;
 extern I2C_HandleTypeDef  hi2c1, hi2c2;
 extern UART_HandleTypeDef huart3;
-extern UART_HandleTypeDef huart5;  /* GPS UART */
 extern ADC_HandleTypeDef  hadc3;
 extern TIM_HandleTypeDef  htim3;  /* Timer for DELADJ PWM */

@@ -140,7 +135,6 @@ typedef enum {
    SPY_TIM_SET_COMPARE,
    SPY_SPI_TRANSMIT_RECEIVE,
    SPY_SPI_TRANSMIT,
-    SPY_UART_RX,
 } SpyCallType;

 typedef struct {
@@ -188,24 +182,7 @@ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
 void          HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
 uint32_t      HAL_GetTick(void);
 void          HAL_Delay(uint32_t Delay);
-HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-
-/* ========================= Mock UART RX buffer ======================= */
-
-/* Inject bytes into the mock UART RX buffer for a specific UART handle.
- * HAL_UART_Receive will return these bytes one at a time. */
-#define MOCK_UART_RX_BUF_SIZE 2048
-
-void mock_uart_rx_load(UART_HandleTypeDef *huart, const uint8_t *data, uint16_t len);
-void mock_uart_rx_clear(UART_HandleTypeDef *huart);
-
-/* Capture buffer for UART TX data (to verify commands sent to GPS module) */
-#define MOCK_UART_TX_BUF_SIZE 2048
-
-extern uint8_t  mock_uart_tx_buf[MOCK_UART_TX_BUF_SIZE];
-extern uint16_t mock_uart_tx_len;
-void mock_uart_tx_clear(void);
+HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);

 /* ========================= SPI stubs ============================== */

@@ -1,369 +0,0 @@
-// test_agc_outer_loop.cpp -- C++ unit tests for ADAR1000_AGC outer-loop AGC
-//
-// Tests the STM32 outer-loop AGC class that adjusts ADAR1000 VGA gain based
-// on the FPGA's saturation flag.  Uses the existing HAL mock/spy framework.
-//
-// Build: c++ -std=c++17 ... (see Makefile TESTS_WITH_CXX rule)
-
-#include <cassert>
-#include <cstdio>
-#include <cstring>
-
-// Shim headers override real STM32/diag headers
-#include "stm32_hal_mock.h"
-#include "ADAR1000_AGC.h"
-#include "ADAR1000_Manager.h"
-
-// ---------------------------------------------------------------------------
-// Linker symbols required by ADAR1000_Manager.cpp (pulled in via main.h shim)
-// ---------------------------------------------------------------------------
-uint8_t GUI_start_flag_received = 0;
-uint8_t USB_Buffer[64] = {0};
-extern "C" void Error_Handler(void) {}
-
-// ---------------------------------------------------------------------------
-// Helpers
-// ---------------------------------------------------------------------------
-
-static int tests_passed = 0;
-static int tests_total  = 0;
-
-#define RUN_TEST(fn)                                                           \
-    do {                                                                        \
-        tests_total++;                                                          \
-        printf("  [%2d] %-55s ", tests_total, #fn);                            \
-        fn();                                                                   \
-        tests_passed++;                                                         \
-        printf("PASS\n");                                                       \
-    } while (0)
-
-// ---------------------------------------------------------------------------
-// Test 1: Default construction matches design spec
-// ---------------------------------------------------------------------------
-static void test_defaults()
-{
-    ADAR1000_AGC agc;
-
-    assert(agc.agc_base_gain == 30);  // kDefaultRxVgaGain
-    assert(agc.gain_step_down == 4);
-    assert(agc.gain_step_up == 1);
-    assert(agc.min_gain == 0);
-    assert(agc.max_gain == 127);
-    assert(agc.holdoff_frames == 4);
-    assert(agc.enabled == false);  // disabled by default — FPGA DIG_6 is source of truth
-    assert(agc.holdoff_counter == 0);
-    assert(agc.last_saturated == false);
-    assert(agc.saturation_event_count == 0);
-
-    // All cal offsets zero
-    for (int i = 0; i < AGC_TOTAL_CHANNELS; ++i) {
-        assert(agc.cal_offset[i] == 0);
-    }
-}
-
-// ---------------------------------------------------------------------------
-// Test 2: Saturation reduces gain by step_down
-// ---------------------------------------------------------------------------
-static void test_saturation_reduces_gain()
-{
-    ADAR1000_AGC agc;
-    agc.enabled = true;  // default is OFF; enable for this test
-    uint8_t initial = agc.agc_base_gain;  // 30
-
-    agc.update(true);  // saturation
-
-    assert(agc.agc_base_gain == initial - agc.gain_step_down);  // 26
-    assert(agc.last_saturated == true);
-    assert(agc.holdoff_counter == 0);
-}
-
-// ---------------------------------------------------------------------------
-// Test 3: Holdoff prevents premature gain-up
-// ---------------------------------------------------------------------------
-static void test_holdoff_prevents_early_gain_up()
-{
-    ADAR1000_AGC agc;
-    agc.enabled = true;  // default is OFF; enable for this test
-    agc.update(true);  // saturate once -> gain = 26
-    uint8_t after_sat = agc.agc_base_gain;
-
-    // Feed (holdoff_frames - 1) clear frames — should NOT increase gain
-    for (uint8_t i = 0; i < agc.holdoff_frames - 1; ++i) {
-        agc.update(false);
-        assert(agc.agc_base_gain == after_sat);
-    }
-
-    // holdoff_counter should be holdoff_frames - 1
-    assert(agc.holdoff_counter == agc.holdoff_frames - 1);
-}
-
-// ---------------------------------------------------------------------------
-// Test 4: Recovery after holdoff period
-// ---------------------------------------------------------------------------
-static void test_recovery_after_holdoff()
-{
-    ADAR1000_AGC agc;
-    agc.enabled = true;  // default is OFF; enable for this test
-    agc.update(true);  // saturate -> gain = 26
-    uint8_t after_sat = agc.agc_base_gain;
-
-    // Feed exactly holdoff_frames clear frames
-    for (uint8_t i = 0; i < agc.holdoff_frames; ++i) {
-        agc.update(false);
-    }
-
-    assert(agc.agc_base_gain == after_sat + agc.gain_step_up);  // 27
-    assert(agc.holdoff_counter == 0);  // reset after recovery
-}
-
-// ---------------------------------------------------------------------------
-// Test 5: Min gain clamping
-// ---------------------------------------------------------------------------
-static void test_min_gain_clamp()
-{
-    ADAR1000_AGC agc;
-    agc.enabled = true;  // default is OFF; enable for this test
-    agc.min_gain = 10;
-    agc.agc_base_gain = 12;
-    agc.gain_step_down = 4;
-
-    agc.update(true);  // 12 - 4 = 8, but min = 10
-    assert(agc.agc_base_gain == 10);
-
-    agc.update(true);  // already at min
-    assert(agc.agc_base_gain == 10);
-}
-
-// ---------------------------------------------------------------------------
-// Test 6: Max gain clamping
-// ---------------------------------------------------------------------------
-static void test_max_gain_clamp()
-{
-    ADAR1000_AGC agc;
-    agc.enabled = true;  // default is OFF; enable for this test
-    agc.max_gain = 32;
-    agc.agc_base_gain = 31;
-    agc.gain_step_up = 2;
-    agc.holdoff_frames = 1;  // immediate recovery
-
-    agc.update(false);  // 31 + 2 = 33, but max = 32
-    assert(agc.agc_base_gain == 32);
-
-    agc.update(false);  // already at max
-    assert(agc.agc_base_gain == 32);
-}
-
-// ---------------------------------------------------------------------------
-// Test 7: Per-channel calibration offsets
-// ---------------------------------------------------------------------------
-static void test_calibration_offsets()
-{
-    ADAR1000_AGC agc;
-    agc.agc_base_gain = 30;
-    agc.min_gain = 0;
-    agc.max_gain = 60;
-
-    agc.cal_offset[0]  =  5;   // 30 + 5  = 35
-    agc.cal_offset[1]  = -10;  // 30 - 10 = 20
-    agc.cal_offset[15] =  40;  // 30 + 40 = 60 (clamped to max)
-
-    assert(agc.effectiveGain(0) == 35);
-    assert(agc.effectiveGain(1) == 20);
-    assert(agc.effectiveGain(15) == 60);  // clamped to max_gain
-
-    // Negative clamp
-    agc.cal_offset[2] = -50;   // 30 - 50 = -20, clamped to min_gain = 0
-    assert(agc.effectiveGain(2) == 0);
-
-    // Out-of-range index returns min_gain
-    assert(agc.effectiveGain(16) == agc.min_gain);
-}
-
-// ---------------------------------------------------------------------------
-// Test 8: Disabled AGC is a no-op
-// ---------------------------------------------------------------------------
-static void test_disabled_noop()
-{
-    ADAR1000_AGC agc;
-    agc.enabled = false;
-    uint8_t original = agc.agc_base_gain;
-
-    agc.update(true);   // should be ignored
-    assert(agc.agc_base_gain == original);
-    assert(agc.last_saturated == false);  // not updated when disabled
-    assert(agc.saturation_event_count == 0);
-
-    agc.update(false);  // also ignored
-    assert(agc.agc_base_gain == original);
-}
-
-// ---------------------------------------------------------------------------
-// Test 9: applyGain() produces correct SPI writes
-// ---------------------------------------------------------------------------
-static void test_apply_gain_spi()
-{
-    spy_reset();
-
-    ADAR1000Manager mgr;  // creates 4 devices
-    ADAR1000_AGC agc;
-    agc.agc_base_gain = 42;
-
-    agc.applyGain(mgr);
-
-    // Each channel: adarSetRxVgaGain -> adarWrite(gain) + adarWrite(LOAD_WORKING)
-    // Each adarWrite: CS_low (GPIO_WRITE) + SPI_TRANSMIT + CS_high (GPIO_WRITE)
-    // = 3 spy records per adarWrite
-    // = 6 spy records per channel
-    // = 16 channels * 6 = 96 total spy records
-
-    // Verify SPI transmit count: 2 SPI calls per channel * 16 channels = 32
-    int spi_count = spy_count_type(SPY_SPI_TRANSMIT);
-    assert(spi_count == 32);
-
-    // Verify GPIO write count: 4 GPIO writes per channel (CS low + CS high for each of 2 adarWrite calls)
-    int gpio_writes = spy_count_type(SPY_GPIO_WRITE);
-    assert(gpio_writes == 64);  // 16 ch * 2 adarWrite * 2 GPIO each
-}
-
-// ---------------------------------------------------------------------------
-// Test 10: resetState() clears counters but preserves config
-// ---------------------------------------------------------------------------
-static void test_reset_preserves_config()
-{
-    ADAR1000_AGC agc;
-    agc.enabled = true;  // default is OFF; enable for this test
-    agc.agc_base_gain = 42;
-    agc.gain_step_down = 8;
-    agc.cal_offset[3] = -5;
-
-    // Generate some state
-    agc.update(true);
-    agc.update(true);
-    assert(agc.saturation_event_count == 2);
-    assert(agc.last_saturated == true);
-
-    agc.resetState();
-
-    // State cleared
-    assert(agc.holdoff_counter == 0);
-    assert(agc.last_saturated == false);
-    assert(agc.saturation_event_count == 0);
-
-    // Config preserved
-    assert(agc.agc_base_gain == 42 - 8 - 8);  // two saturations applied before reset
-    assert(agc.gain_step_down == 8);
-    assert(agc.cal_offset[3] == -5);
-}
-
-// ---------------------------------------------------------------------------
-// Test 11: Saturation counter increments correctly
-// ---------------------------------------------------------------------------
-static void test_saturation_counter()
-{
-    ADAR1000_AGC agc;
-    agc.enabled = true;  // default is OFF; enable for this test
-
-    for (int i = 0; i < 10; ++i) {
-        agc.update(true);
-    }
-    assert(agc.saturation_event_count == 10);
-
-    // Clear frames don't increment saturation count
-    for (int i = 0; i < 5; ++i) {
-        agc.update(false);
-    }
-    assert(agc.saturation_event_count == 10);
-}
-
-// ---------------------------------------------------------------------------
-// Test 12: Mixed saturation/clear sequence
-// ---------------------------------------------------------------------------
-static void test_mixed_sequence()
-{
-    ADAR1000_AGC agc;
-    agc.enabled = true;  // default is OFF; enable for this test
-    agc.agc_base_gain = 30;
-    agc.gain_step_down = 4;
-    agc.gain_step_up = 1;
-    agc.holdoff_frames = 3;
-
-    // Saturate: 30 -> 26
-    agc.update(true);
-    assert(agc.agc_base_gain == 26);
-    assert(agc.holdoff_counter == 0);
-
-    // 2 clear frames (not enough for recovery)
-    agc.update(false);
-    agc.update(false);
-    assert(agc.agc_base_gain == 26);
-    assert(agc.holdoff_counter == 2);
-
-    // Saturate again: 26 -> 22, counter resets
-    agc.update(true);
-    assert(agc.agc_base_gain == 22);
-    assert(agc.holdoff_counter == 0);
-    assert(agc.saturation_event_count == 2);
-
-    // 3 clear frames -> recovery: 22 -> 23
-    agc.update(false);
-    agc.update(false);
-    agc.update(false);
-    assert(agc.agc_base_gain == 23);
-    assert(agc.holdoff_counter == 0);
-
-    // 3 more clear -> 23 -> 24
-    agc.update(false);
-    agc.update(false);
-    agc.update(false);
-    assert(agc.agc_base_gain == 24);
-}
-
-// ---------------------------------------------------------------------------
-// Test 13: Effective gain with edge-case base_gain values
-// ---------------------------------------------------------------------------
-static void test_effective_gain_edge_cases()
-{
-    ADAR1000_AGC agc;
-    agc.min_gain = 5;
-    agc.max_gain = 250;
-
-    // Base gain at zero with positive offset
-    agc.agc_base_gain = 0;
-    agc.cal_offset[0] = 3;
-    assert(agc.effectiveGain(0) == 5);  // 0 + 3 = 3, clamped to min_gain=5
-
-    // Base gain at max with zero offset
-    agc.agc_base_gain = 250;
-    agc.cal_offset[0] = 0;
-    assert(agc.effectiveGain(0) == 250);
-
-    // Base gain at max with positive offset -> clamped
-    agc.agc_base_gain = 250;
-    agc.cal_offset[0] = 10;
-    assert(agc.effectiveGain(0) == 250);  // clamped to max_gain
-}
-
-// ---------------------------------------------------------------------------
-// main
-// ---------------------------------------------------------------------------
-int main()
-{
-    printf("=== ADAR1000_AGC Outer-Loop Unit Tests ===\n");
-
-    RUN_TEST(test_defaults);
-    RUN_TEST(test_saturation_reduces_gain);
-    RUN_TEST(test_holdoff_prevents_early_gain_up);
-    RUN_TEST(test_recovery_after_holdoff);
-    RUN_TEST(test_min_gain_clamp);
-    RUN_TEST(test_max_gain_clamp);
-    RUN_TEST(test_calibration_offsets);
-    RUN_TEST(test_disabled_noop);
-    RUN_TEST(test_apply_gain_spi);
-    RUN_TEST(test_reset_preserves_config);
-    RUN_TEST(test_saturation_counter);
-    RUN_TEST(test_mixed_sequence);
-    RUN_TEST(test_effective_gain_edge_cases);
-
-    printf("=== Results: %d/%d passed ===\n", tests_passed, tests_total);
-    return (tests_passed == tests_total) ? 0 : 1;
-}
@@ -34,25 +34,22 @@ static void Mock_Emergency_Stop(void)
    state_was_true_when_estop_called = system_emergency_state;
 }

-/* Error codes (subset matching main.cpp SystemError_t) */
+/* Error codes (subset matching main.cpp) */
 typedef enum {
    ERROR_NONE = 0,
    ERROR_RF_PA_OVERCURRENT = 9,
    ERROR_RF_PA_BIAS = 10,
-    ERROR_STEPPER_MOTOR = 11,
+    ERROR_STEPPER_FAULT = 11,
    ERROR_FPGA_COMM = 12,
    ERROR_POWER_SUPPLY = 13,
    ERROR_TEMPERATURE_HIGH = 14,
-    ERROR_MEMORY_ALLOC = 15,
-    ERROR_WATCHDOG_TIMEOUT = 16,
 } SystemError_t;

-/* Extracted critical-error handling logic (matches post-fix main.cpp predicate) */
+/* Extracted critical-error handling logic (post-fix ordering) */
 static void simulate_handleSystemError_critical(SystemError_t error)
 {
-    if ((error >= ERROR_RF_PA_OVERCURRENT && error <= ERROR_POWER_SUPPLY) ||
-        error == ERROR_TEMPERATURE_HIGH ||
-        error == ERROR_WATCHDOG_TIMEOUT) {
+    /* Only critical errors (PA overcurrent through power supply) trigger e-stop */
+    if (error >= ERROR_RF_PA_OVERCURRENT && error <= ERROR_POWER_SUPPLY) {
        /* FIX 5: set flag BEFORE calling Emergency_Stop */
        system_emergency_state = true;
        Mock_Emergency_Stop();
@@ -96,39 +93,17 @@ int main(void)
    assert(state_was_true_when_estop_called == true);
    printf("PASS\n");

-    /* Test 4: Overtemp → MUST trigger e-stop (was incorrectly non-critical before fix) */
-    printf("  Test 4: Overtemp triggers e-stop... ");
+    /* Test 4: Non-critical error → no e-stop, flag stays false */
+    printf("  Test 4: Non-critical error (no e-stop)... ");
    system_emergency_state = false;
    emergency_stop_called = false;
-    state_was_true_when_estop_called = false;
    simulate_handleSystemError_critical(ERROR_TEMPERATURE_HIGH);
-    assert(emergency_stop_called == true);
-    assert(system_emergency_state == true);
-    assert(state_was_true_when_estop_called == true);
-    printf("PASS\n");
-
-    /* Test 5: Watchdog timeout → MUST trigger e-stop */
-    printf("  Test 5: Watchdog timeout triggers e-stop... ");
-    system_emergency_state = false;
-    emergency_stop_called = false;
-    state_was_true_when_estop_called = false;
-    simulate_handleSystemError_critical(ERROR_WATCHDOG_TIMEOUT);
-    assert(emergency_stop_called == true);
-    assert(system_emergency_state == true);
-    assert(state_was_true_when_estop_called == true);
-    printf("PASS\n");
-
-    /* Test 6: Non-critical error (memory alloc) → no e-stop */
-    printf("  Test 6: Non-critical error (no e-stop)... ");
-    system_emergency_state = false;
-    emergency_stop_called = false;
-    simulate_handleSystemError_critical(ERROR_MEMORY_ALLOC);
    assert(emergency_stop_called == false);
    assert(system_emergency_state == false);
    printf("PASS\n");

-    /* Test 7: ERROR_NONE → no e-stop */
-    printf("  Test 7: ERROR_NONE (no action)... ");
+    /* Test 5: ERROR_NONE → no e-stop */
+    printf("  Test 5: ERROR_NONE (no action)... ");
    system_emergency_state = false;
    emergency_stop_called = false;
    simulate_handleSystemError_critical(ERROR_NONE);
@@ -136,6 +111,6 @@ int main(void)
    assert(system_emergency_state == false);
    printf("PASS\n");

-    printf("\n=== Gap-3 Fix 5: ALL 7 TESTS PASSED ===\n\n");
+    printf("\n=== Gap-3 Fix 5: ALL TESTS PASSED ===\n\n");
    return 0;
 }
@@ -1,132 +0,0 @@
-/*******************************************************************************
- * test_gap3_health_watchdog_cold_start.c
- *
- * Safety bug: checkSystemHealth()'s internal watchdog (step 9, pre-fix) had two
- * linked defects that, once ERROR_WATCHDOG_TIMEOUT was escalated to
- * Emergency_Stop() by the overtemp/watchdog PR, would false-latch the radar:
- *
- *   (1) Cold-start false trip:
- *         static uint32_t last_health_check = 0;
- *         if (HAL_GetTick() - last_health_check > 60000) { ... }
- *       On the very first call, last_health_check == 0, so once the MCU has
- *       been up >60 s (which is typical after the ADAR1000 / AD9523 / ADF4382
- *       init sequence) the subtraction `now - 0` exceeds 60 000 ms and the
- *       watchdog trips spuriously.
- *
- *   (2) Stale-timestamp after early returns:
- *         last_health_check = HAL_GetTick();   // at END of function
- *       Every earlier sub-check (IMU, BMP180, GPS, PA Idq, temperature) has an
- *       `if (fault) return current_error;` path that skips the update. After a
- *       cumulative 60 s of transient faults, the next clean call compares
- *       `now` against the long-stale `last_health_check` and trips.
- *
- * After fix:  Watchdog logic moved to function ENTRY. A dedicated cold-start
- *             branch seeds the timestamp on the first call without checking.
- *             On every subsequent call, the elapsed delta is captured FIRST
- *             and last_health_check is updated BEFORE any sub-check runs, so
- *             early returns no longer leave a stale value.
- *
- * Test strategy:
- *   Extract the post-fix watchdog predicate into a standalone function that
- *   takes a simulated HAL_GetTick() value and returns whether the watchdog
- *   should trip. Walk through boot + fault sequences that would have tripped
- *   the pre-fix code and assert the post-fix code does NOT trip.
- ******************************************************************************/
-#include <assert.h>
-#include <stdint.h>
-#include <stdio.h>
-
-/* --- Post-fix watchdog state + predicate, extracted verbatim --- */
-static uint32_t last_health_check = 0;
-
-/* Returns 1 iff this call should raise ERROR_WATCHDOG_TIMEOUT.
-   Updates last_health_check BEFORE returning (matches post-fix behaviour). */
-static int health_watchdog_step(uint32_t now_tick)
-{
-    if (last_health_check == 0) {
-        last_health_check = now_tick;   /* cold start: seed only, never trip */
-        return 0;
-    }
-    uint32_t elapsed = now_tick - last_health_check;
-    last_health_check = now_tick;       /* update BEFORE any early return */
-    return (elapsed > 60000) ? 1 : 0;
-}
-
-/* Test helper: reset the static state between scenarios. */
-static void reset_state(void) { last_health_check = 0; }
-
-int main(void)
-{
-    printf("=== Safety fix: checkSystemHealth() watchdog cold-start + stale-ts ===\n");
-
-    /* ---------- Scenario 1: cold-start after 60 s of init must NOT trip ---- */
-    printf("  Test 1: first call at t=75000 ms (post-init) does not trip... ");
-    reset_state();
-    assert(health_watchdog_step(75000) == 0);
-    printf("PASS\n");
-
-    /* ---------- Scenario 2: first call far beyond 60 s (PRE-FIX BUG) ------- */
-    printf("  Test 2: first call at t=600000 ms still does not trip... ");
-    reset_state();
-    assert(health_watchdog_step(600000) == 0);
-    printf("PASS\n");
-
-    /* ---------- Scenario 3: healthy main-loop pacing (10 ms period) -------- */
-    printf("  Test 3: 1000 calls at 10 ms intervals never trip... ");
-    reset_state();
-    (void)health_watchdog_step(1000);  /* seed */
-    for (int i = 1; i <= 1000; i++) {
-        assert(health_watchdog_step(1000 + i * 10) == 0);
-    }
-    printf("PASS\n");
-
-    /* ---------- Scenario 4: stale-timestamp after a burst of early returns -
-       Pre-fix bug: many early returns skipped the timestamp update, so a
-       later clean call would compare `now` against a 60+ s old value. Post-fix,
-       every call (including ones that would have early-returned in the real
-       function) updates the timestamp at the top, so this scenario is modelled
-       by calling health_watchdog_step() on every iteration of the main loop. */
-    printf("  Test 4: 70 s of 100 ms-spaced calls after seed do not trip... ");
-    reset_state();
-    (void)health_watchdog_step(50000);   /* seed mid-run */
-    for (int i = 1; i <= 700; i++) {     /* 70 s @ 100 ms */
-        int tripped = health_watchdog_step(50000 + i * 100);
-        assert(tripped == 0);
-    }
-    printf("PASS\n");
-
-    /* ---------- Scenario 5: genuine stall MUST trip ------------------------ */
-    printf("  Test 5: real 60+ s gap between calls does trip... ");
-    reset_state();
-    (void)health_watchdog_step(10000);              /* seed */
-    assert(health_watchdog_step(10000 + 60001) == 1);
-    printf("PASS\n");
-
-    /* ---------- Scenario 6: exactly 60 s gap is the boundary -- do NOT trip
-       Post-fix predicate uses strict >60000, matching the pre-fix comparator. */
-    printf("  Test 6: exactly 60000 ms gap does not trip (boundary)... ");
-    reset_state();
-    (void)health_watchdog_step(10000);
-    assert(health_watchdog_step(10000 + 60000) == 0);
-    printf("PASS\n");
-
-    /* ---------- Scenario 7: trip, then recover on next paced call ---------- */
-    printf("  Test 7: after a genuine stall+trip, next paced call does not re-trip... ");
-    reset_state();
-    (void)health_watchdog_step(5000);                      /* seed */
-    assert(health_watchdog_step(5000 + 70000) == 1);       /* stall -> trip */
-    assert(health_watchdog_step(5000 + 70000 + 10) == 0);  /* resume paced */
-    printf("PASS\n");
-
-    /* ---------- Scenario 8: HAL_GetTick() 32-bit wrap (~49.7 days) ---------
-       Because we subtract unsigned 32-bit values, wrap is handled correctly as
-       long as the true elapsed time is < 2^32 ms. */
-    printf("  Test 8: tick wrap from 0xFFFFFF00 -> 0x00000064 (200 ms span) does not trip... ");
-    reset_state();
-    (void)health_watchdog_step(0xFFFFFF00u);
-    assert(health_watchdog_step(0x00000064u) == 0);  /* elapsed = 0x164 = 356 ms */
-    printf("PASS\n");
-
-    printf("\n=== Safety fix: ALL TESTS PASSED ===\n\n");
-    return 0;
-}
@@ -1,119 +0,0 @@
-/*******************************************************************************
- * test_gap3_overtemp_emergency_stop.c
- *
- * Safety bug: handleSystemError() did not escalate ERROR_TEMPERATURE_HIGH
- * (or ERROR_WATCHDOG_TIMEOUT) to Emergency_Stop().
- *
- * Before fix:  The critical-error gate was
- *                if (error >= ERROR_RF_PA_OVERCURRENT &&
- *                    error <= ERROR_POWER_SUPPLY) { Emergency_Stop(); }
- *              So overtemp (code 14) and watchdog timeout (code 16) fell
- *              through to attemptErrorRecovery()'s default branch (log and
- *              continue), leaving the 10 W GaN PAs biased at >75 °C.
- *
- * After fix:   The gate also matches ERROR_TEMPERATURE_HIGH and
- *              ERROR_WATCHDOG_TIMEOUT, so thermal and watchdog faults
- *              latch Emergency_Stop() exactly like PA overcurrent.
- *
- * Test strategy:
- *   Replicate the critical-error predicate and assert that every error
- *   enum value which threatens RF/power safety is accepted, and that the
- *   non-critical ones (comm, sensor, memory) are not.
- ******************************************************************************/
-#include <assert.h>
-#include <stdio.h>
-
-/* Mirror of SystemError_t from main.cpp (keep in lockstep). */
-typedef enum {
-    ERROR_NONE = 0,
-    ERROR_AD9523_CLOCK,
-    ERROR_ADF4382_TX_UNLOCK,
-    ERROR_ADF4382_RX_UNLOCK,
-    ERROR_ADAR1000_COMM,
-    ERROR_ADAR1000_TEMP,
-    ERROR_IMU_COMM,
-    ERROR_BMP180_COMM,
-    ERROR_GPS_COMM,
-    ERROR_RF_PA_OVERCURRENT,
-    ERROR_RF_PA_BIAS,
-    ERROR_STEPPER_MOTOR,
-    ERROR_FPGA_COMM,
-    ERROR_POWER_SUPPLY,
-    ERROR_TEMPERATURE_HIGH,
-    ERROR_MEMORY_ALLOC,
-    ERROR_WATCHDOG_TIMEOUT
-} SystemError_t;
-
-/* Extracted post-fix predicate: returns 1 when Emergency_Stop() must fire. */
-static int triggers_emergency_stop(SystemError_t e)
-{
-    return ((e >= ERROR_RF_PA_OVERCURRENT && e <= ERROR_POWER_SUPPLY) ||
-            e == ERROR_TEMPERATURE_HIGH ||
-            e == ERROR_WATCHDOG_TIMEOUT);
-}
-
-int main(void)
-{
-    printf("=== Safety fix: overtemp / watchdog -> Emergency_Stop() ===\n");
-
-    /* --- Errors that MUST latch Emergency_Stop --- */
-    printf("  Test 1: ERROR_RF_PA_OVERCURRENT triggers... ");
-    assert(triggers_emergency_stop(ERROR_RF_PA_OVERCURRENT));
-    printf("PASS\n");
-
-    printf("  Test 2: ERROR_RF_PA_BIAS triggers... ");
-    assert(triggers_emergency_stop(ERROR_RF_PA_BIAS));
-    printf("PASS\n");
-
-    printf("  Test 3: ERROR_STEPPER_MOTOR triggers... ");
-    assert(triggers_emergency_stop(ERROR_STEPPER_MOTOR));
-    printf("PASS\n");
-
-    printf("  Test 4: ERROR_FPGA_COMM triggers... ");
-    assert(triggers_emergency_stop(ERROR_FPGA_COMM));
-    printf("PASS\n");
-
-    printf("  Test 5: ERROR_POWER_SUPPLY triggers... ");
-    assert(triggers_emergency_stop(ERROR_POWER_SUPPLY));
-    printf("PASS\n");
-
-    printf("  Test 6: ERROR_TEMPERATURE_HIGH triggers (regression)... ");
-    assert(triggers_emergency_stop(ERROR_TEMPERATURE_HIGH));
-    printf("PASS\n");
-
-    printf("  Test 7: ERROR_WATCHDOG_TIMEOUT triggers (regression)... ");
-    assert(triggers_emergency_stop(ERROR_WATCHDOG_TIMEOUT));
-    printf("PASS\n");
-
-    /* --- Errors that MUST NOT escalate (recoverable / informational) --- */
-    printf("  Test 8: ERROR_NONE does not trigger... ");
-    assert(!triggers_emergency_stop(ERROR_NONE));
-    printf("PASS\n");
-
-    printf("  Test 9: ERROR_AD9523_CLOCK does not trigger... ");
-    assert(!triggers_emergency_stop(ERROR_AD9523_CLOCK));
-    printf("PASS\n");
-
-    printf("  Test 10: ERROR_ADF4382_TX_UNLOCK does not trigger (recoverable)... ");
-    assert(!triggers_emergency_stop(ERROR_ADF4382_TX_UNLOCK));
-    printf("PASS\n");
-
-    printf("  Test 11: ERROR_ADAR1000_COMM does not trigger... ");
-    assert(!triggers_emergency_stop(ERROR_ADAR1000_COMM));
-    printf("PASS\n");
-
-    printf("  Test 12: ERROR_IMU_COMM does not trigger... ");
-    assert(!triggers_emergency_stop(ERROR_IMU_COMM));
-    printf("PASS\n");
-
-    printf("  Test 13: ERROR_GPS_COMM does not trigger... ");
-    assert(!triggers_emergency_stop(ERROR_GPS_COMM));
-    printf("PASS\n");
-
-    printf("  Test 14: ERROR_MEMORY_ALLOC does not trigger... ");
-    assert(!triggers_emergency_stop(ERROR_MEMORY_ALLOC));
-    printf("PASS\n");
-
-    printf("\n=== Safety fix: ALL TESTS PASSED ===\n\n");
-    return 0;
-}
@@ -1,853 +0,0 @@
-/*******************************************************************************
- * test_um982_gps.c -- Unit tests for UM982 GPS driver
- *
- * Tests NMEA parsing, checksum validation, coordinate parsing, init sequence,
- * and validity tracking. Uses the mock HAL infrastructure for UART.
- *
- * Build: see Makefile target test_um982_gps
- * Run:   ./test_um982_gps
- ******************************************************************************/
-#include "stm32_hal_mock.h"
-#include "../9_1_3_C_Cpp_Code/um982_gps.h"
-#include "../9_1_3_C_Cpp_Code/um982_gps.c"  /* Include .c directly for white-box testing */
-
-#include <stdio.h>
-#include <string.h>
-#include <assert.h>
-#include <math.h>
-
-/* ========================= Test helpers ============================== */
-
-static int tests_passed = 0;
-static int tests_failed = 0;
-
-#define TEST(name) \
-    do { printf("  [TEST] %-55s ", name); } while(0)
-
-#define PASS() \
-    do { printf("PASS\n"); tests_passed++; } while(0)
-
-#define FAIL(msg) \
-    do { printf("FAIL: %s\n", msg); tests_failed++; } while(0)
-
-#define ASSERT_TRUE(expr, msg) \
-    do { if (!(expr)) { FAIL(msg); return; } } while(0)
-
-#define ASSERT_FALSE(expr, msg) \
-    do { if (expr) { FAIL(msg); return; } } while(0)
-
-#define ASSERT_EQ_INT(a, b, msg) \
-    do { if ((a) != (b)) { \
-        char _buf[256]; \
-        snprintf(_buf, sizeof(_buf), "%s (got %d, expected %d)", msg, (int)(a), (int)(b)); \
-        FAIL(_buf); return; \
-    } } while(0)
-
-#define ASSERT_NEAR(a, b, tol, msg) \
-    do { if (fabs((double)(a) - (double)(b)) > (tol)) { \
-        char _buf[256]; \
-        snprintf(_buf, sizeof(_buf), "%s (got %.8f, expected %.8f)", msg, (double)(a), (double)(b)); \
-        FAIL(_buf); return; \
-    } } while(0)
-
-#define ASSERT_NAN(val, msg) \
-    do { if (!isnan(val)) { FAIL(msg); return; } } while(0)
-
-static UM982_GPS_t gps;
-
-static void reset_gps(void)
-{
-    spy_reset();
-    memset(&gps, 0, sizeof(gps));
-    gps.huart = &huart5;
-    gps.heading = NAN;
-    gps.heading_mode = 'V';
-    gps.rmc_status = 'V';
-}
-
-/* ========================= Checksum tests ============================ */
-
-static void test_checksum_valid(void)
-{
-    TEST("checksum: valid GGA");
-    ASSERT_TRUE(um982_verify_checksum(
-        "$GNGGA,001043.00,4404.14036,N,12118.85961,W,1,12,0.98,1113.0,M,-21.3,M*47"),
-        "should be valid");
-    PASS();
-}
-
-static void test_checksum_valid_ths(void)
-{
-    TEST("checksum: valid THS");
-    ASSERT_TRUE(um982_verify_checksum("$GNTHS,341.3344,A*1F"),
-        "should be valid");
-    PASS();
-}
-
-static void test_checksum_invalid(void)
-{
-    TEST("checksum: invalid (wrong value)");
-    ASSERT_FALSE(um982_verify_checksum("$GNTHS,341.3344,A*FF"),
-        "should be invalid");
-    PASS();
-}
-
-static void test_checksum_missing_star(void)
-{
-    TEST("checksum: missing * marker");
-    ASSERT_FALSE(um982_verify_checksum("$GNTHS,341.3344,A"),
-        "should be invalid");
-    PASS();
-}
-
-static void test_checksum_null(void)
-{
-    TEST("checksum: NULL input");
-    ASSERT_FALSE(um982_verify_checksum(NULL), "should be false");
-    PASS();
-}
-
-static void test_checksum_no_dollar(void)
-{
-    TEST("checksum: missing $ prefix");
-    ASSERT_FALSE(um982_verify_checksum("GNTHS,341.3344,A*1F"),
-        "should be invalid without $");
-    PASS();
-}
-
-/* ========================= Coordinate parsing tests ================== */
-
-static void test_coord_latitude_north(void)
-{
-    TEST("coord: latitude 4404.14036 N");
-    double lat = um982_parse_coord("4404.14036", 'N');
-    /* 44 + 04.14036/60 = 44.069006 */
-    ASSERT_NEAR(lat, 44.069006, 0.000001, "latitude");
-    PASS();
-}
-
-static void test_coord_latitude_south(void)
-{
-    TEST("coord: latitude 3358.92500 S (negative)");
-    double lat = um982_parse_coord("3358.92500", 'S');
-    ASSERT_TRUE(lat < 0.0, "should be negative for S");
-    ASSERT_NEAR(lat, -(33.0 + 58.925/60.0), 0.000001, "latitude");
-    PASS();
-}
-
-static void test_coord_longitude_3digit(void)
-{
-    TEST("coord: longitude 12118.85961 W (3-digit degrees)");
-    double lon = um982_parse_coord("12118.85961", 'W');
-    /* 121 + 18.85961/60 = 121.314327 */
-    ASSERT_TRUE(lon < 0.0, "should be negative for W");
-    ASSERT_NEAR(lon, -(121.0 + 18.85961/60.0), 0.000001, "longitude");
-    PASS();
-}
-
-static void test_coord_longitude_east(void)
-{
-    TEST("coord: longitude 11614.19729 E");
-    double lon = um982_parse_coord("11614.19729", 'E');
-    ASSERT_TRUE(lon > 0.0, "should be positive for E");
-    ASSERT_NEAR(lon, 116.0 + 14.19729/60.0, 0.000001, "longitude");
-    PASS();
-}
-
-static void test_coord_empty(void)
-{
-    TEST("coord: empty string returns NAN");
-    ASSERT_NAN(um982_parse_coord("", 'N'), "should be NAN");
-    PASS();
-}
-
-static void test_coord_null(void)
-{
-    TEST("coord: NULL returns NAN");
-    ASSERT_NAN(um982_parse_coord(NULL, 'N'), "should be NAN");
-    PASS();
-}
-
-static void test_coord_no_dot(void)
-{
-    TEST("coord: no decimal point returns NAN");
-    ASSERT_NAN(um982_parse_coord("440414036", 'N'), "should be NAN");
-    PASS();
-}
-
-/* ========================= GGA parsing tests ========================= */
-
-static void test_parse_gga_full(void)
-{
-    TEST("GGA: full sentence with all fields");
-    reset_gps();
-    mock_set_tick(1000);
-
-    um982_parse_sentence(&gps,
-        "$GNGGA,001043.00,4404.14036,N,12118.85961,W,1,12,0.98,1113.0,M,-21.3,M*47");
-
-    ASSERT_NEAR(gps.latitude, 44.069006, 0.0001, "latitude");
-    ASSERT_NEAR(gps.longitude, -(121.0 + 18.85961/60.0), 0.0001, "longitude");
-    ASSERT_EQ_INT(gps.fix_quality, 1, "fix quality");
-    ASSERT_EQ_INT(gps.num_satellites, 12, "num sats");
-    ASSERT_NEAR(gps.hdop, 0.98, 0.01, "hdop");
-    ASSERT_NEAR(gps.altitude, 1113.0, 0.1, "altitude");
-    ASSERT_NEAR(gps.geoid_sep, -21.3, 0.1, "geoid sep");
-    PASS();
-}
-
-static void test_parse_gga_rtk_fixed(void)
-{
-    TEST("GGA: RTK fixed (quality=4)");
-    reset_gps();
-
-    um982_parse_sentence(&gps,
-        "$GNGGA,023634.00,4004.73871635,N,11614.19729418,E,4,28,0.7,61.0988,M,-8.4923,M,,*5D");
-
-    ASSERT_EQ_INT(gps.fix_quality, 4, "RTK fixed");
-    ASSERT_EQ_INT(gps.num_satellites, 28, "num sats");
-    ASSERT_NEAR(gps.latitude, 40.0 + 4.73871635/60.0, 0.0000001, "latitude");
-    ASSERT_NEAR(gps.longitude, 116.0 + 14.19729418/60.0, 0.0000001, "longitude");
-    PASS();
-}
-
-static void test_parse_gga_no_fix(void)
-{
-    TEST("GGA: no fix (quality=0)");
-    reset_gps();
-
-    /* Compute checksum for this sentence */
-    um982_parse_sentence(&gps,
-        "$GNGGA,235959.00,,,,,0,00,99.99,,,,,,*79");
-
-    ASSERT_EQ_INT(gps.fix_quality, 0, "no fix");
-    PASS();
-}
-
-/* ========================= RMC parsing tests ========================= */
-
-static void test_parse_rmc_valid(void)
-{
-    TEST("RMC: valid position and speed");
-    reset_gps();
-    mock_set_tick(2000);
-
-    um982_parse_sentence(&gps,
-        "$GNRMC,001031.00,A,4404.13993,N,12118.86023,W,0.146,,100117,,,A*7B");
-
-    ASSERT_EQ_INT(gps.rmc_status, 'A', "status");
-    ASSERT_NEAR(gps.latitude, 44.0 + 4.13993/60.0, 0.0001, "latitude");
-    ASSERT_NEAR(gps.longitude, -(121.0 + 18.86023/60.0), 0.0001, "longitude");
-    ASSERT_NEAR(gps.speed_knots, 0.146, 0.001, "speed");
-    PASS();
-}
-
-static void test_parse_rmc_void(void)
-{
-    TEST("RMC: void status (no valid fix)");
-    reset_gps();
-    gps.latitude = 12.34;  /* Pre-set to check it doesn't get overwritten */
-
-    um982_parse_sentence(&gps,
-        "$GNRMC,235959.00,V,,,,,,,100117,,,N*64");
-
-    ASSERT_EQ_INT(gps.rmc_status, 'V', "void status");
-    ASSERT_NEAR(gps.latitude, 12.34, 0.001, "lat should not change on void");
-    PASS();
-}
-
-/* ========================= THS parsing tests ========================= */
-
-static void test_parse_ths_autonomous(void)
-{
-    TEST("THS: autonomous heading 341.3344");
-    reset_gps();
-    mock_set_tick(3000);
-
-    um982_parse_sentence(&gps, "$GNTHS,341.3344,A*1F");
-
-    ASSERT_NEAR(gps.heading, 341.3344, 0.001, "heading");
-    ASSERT_EQ_INT(gps.heading_mode, 'A', "mode");
-    PASS();
-}
-
-static void test_parse_ths_not_valid(void)
-{
-    TEST("THS: not valid mode");
-    reset_gps();
-
-    um982_parse_sentence(&gps, "$GNTHS,,V*10");
-
-    ASSERT_NAN(gps.heading, "heading should be NAN when empty");
-    ASSERT_EQ_INT(gps.heading_mode, 'V', "mode V");
-    PASS();
-}
-
-static void test_parse_ths_zero(void)
-{
-    TEST("THS: heading exactly 0.0000");
-    reset_gps();
-
-    um982_parse_sentence(&gps, "$GNTHS,0.0000,A*19");
-
-    ASSERT_NEAR(gps.heading, 0.0, 0.001, "heading zero");
-    ASSERT_EQ_INT(gps.heading_mode, 'A', "mode A");
-    PASS();
-}
-
-static void test_parse_ths_360_boundary(void)
-{
-    TEST("THS: heading near 360");
-    reset_gps();
-
-    um982_parse_sentence(&gps, "$GNTHS,359.9999,D*13");
-
-    ASSERT_NEAR(gps.heading, 359.9999, 0.001, "heading near 360");
-    ASSERT_EQ_INT(gps.heading_mode, 'D', "mode D");
-    PASS();
-}
-
-/* ========================= VTG parsing tests ========================= */
-
-static void test_parse_vtg(void)
-{
-    TEST("VTG: course and speed");
-    reset_gps();
-
-    um982_parse_sentence(&gps,
-        "$GPVTG,220.86,T,,M,2.550,N,4.724,K,A*34");
-
-    ASSERT_NEAR(gps.course_true, 220.86, 0.01, "course");
-    ASSERT_NEAR(gps.speed_knots, 2.550, 0.001, "speed knots");
-    ASSERT_NEAR(gps.speed_kmh, 4.724, 0.001, "speed kmh");
-    PASS();
-}
-
-/* ========================= Talker ID tests =========================== */
-
-static void test_talker_gp(void)
-{
-    TEST("talker: GP prefix parses correctly");
-    reset_gps();
-
-    um982_parse_sentence(&gps, "$GPTHS,123.4567,A*07");
-
-    ASSERT_NEAR(gps.heading, 123.4567, 0.001, "heading with GP");
-    PASS();
-}
-
-static void test_talker_gl(void)
-{
-    TEST("talker: GL prefix parses correctly");
-    reset_gps();
-
-    um982_parse_sentence(&gps, "$GLTHS,123.4567,A*1B");
-
-    ASSERT_NEAR(gps.heading, 123.4567, 0.001, "heading with GL");
-    PASS();
-}
-
-/* ========================= Feed / line assembly tests ================ */
-
-static void test_feed_single_sentence(void)
-{
-    TEST("feed: single complete sentence with CRLF");
-    reset_gps();
-    mock_set_tick(5000);
-
-    const char *data = "$GNTHS,341.3344,A*1F\r\n";
-    um982_feed(&gps, (const uint8_t *)data, (uint16_t)strlen(data));
-
-    ASSERT_NEAR(gps.heading, 341.3344, 0.001, "heading");
-    PASS();
-}
-
-static void test_feed_multiple_sentences(void)
-{
-    TEST("feed: multiple sentences in one chunk");
-    reset_gps();
-    mock_set_tick(5000);
-
-    const char *data =
-        "$GNTHS,100.0000,A*18\r\n"
-        "$GNGGA,001043.00,4404.14036,N,12118.85961,W,1,12,0.98,1113.0,M,-21.3,M*47\r\n";
-    um982_feed(&gps, (const uint8_t *)data, (uint16_t)strlen(data));
-
-    ASSERT_NEAR(gps.heading, 100.0, 0.01, "heading from THS");
-    ASSERT_EQ_INT(gps.fix_quality, 1, "fix from GGA");
-    PASS();
-}
-
-static void test_feed_partial_then_complete(void)
-{
-    TEST("feed: partial bytes then complete");
-    reset_gps();
-    mock_set_tick(5000);
-
-    const char *part1 = "$GNTHS,200.";
-    const char *part2 = "5000,A*1E\r\n";
-    um982_feed(&gps, (const uint8_t *)part1, (uint16_t)strlen(part1));
-    /* Heading should not be set yet */
-    ASSERT_NAN(gps.heading, "should be NAN before complete");
-
-    um982_feed(&gps, (const uint8_t *)part2, (uint16_t)strlen(part2));
-    ASSERT_NEAR(gps.heading, 200.5, 0.01, "heading after complete");
-    PASS();
-}
-
-static void test_feed_bad_checksum_rejected(void)
-{
-    TEST("feed: bad checksum sentence is rejected");
-    reset_gps();
-    mock_set_tick(5000);
-
-    const char *data = "$GNTHS,999.0000,A*FF\r\n";
-    um982_feed(&gps, (const uint8_t *)data, (uint16_t)strlen(data));
-
-    ASSERT_NAN(gps.heading, "heading should remain NAN");
-    PASS();
-}
-
-static void test_feed_versiona_response(void)
-{
-    TEST("feed: VERSIONA response sets flag");
-    reset_gps();
-
-    const char *data = "#VERSIONA,79,GPS,FINE,2326,378237000,15434,0,18,889;\"UM982\"\r\n";
-    um982_feed(&gps, (const uint8_t *)data, (uint16_t)strlen(data));
-
-    ASSERT_TRUE(gps.version_received, "version_received should be true");
-    ASSERT_TRUE(gps.initialized, "VERSIONA should mark communication alive");
-    PASS();
-}
-
-/* ========================= Validity / age tests ====================== */
-
-static void test_heading_valid_within_timeout(void)
-{
-    TEST("validity: heading valid within timeout");
-    reset_gps();
-    mock_set_tick(10000);
-
-    um982_parse_sentence(&gps, "$GNTHS,341.3344,A*1F");
-
-    /* Still at tick 10000 */
-    ASSERT_TRUE(um982_is_heading_valid(&gps), "should be valid");
-    PASS();
-}
-
-static void test_heading_invalid_after_timeout(void)
-{
-    TEST("validity: heading invalid after 2s timeout");
-    reset_gps();
-    mock_set_tick(10000);
-
-    um982_parse_sentence(&gps, "$GNTHS,341.3344,A*1F");
-
-    /* Advance past timeout */
-    mock_set_tick(12500);
-    ASSERT_FALSE(um982_is_heading_valid(&gps), "should be invalid after 2.5s");
-    PASS();
-}
-
-static void test_heading_invalid_mode_v(void)
-{
-    TEST("validity: heading invalid with mode V");
-    reset_gps();
-    mock_set_tick(10000);
-
-    um982_parse_sentence(&gps, "$GNTHS,,V*10");
-
-    ASSERT_FALSE(um982_is_heading_valid(&gps), "mode V is invalid");
-    PASS();
-}
-
-static void test_position_valid(void)
-{
-    TEST("validity: position valid with fix quality 1");
-    reset_gps();
-    mock_set_tick(10000);
-
-    um982_parse_sentence(&gps,
-        "$GNGGA,001043.00,4404.14036,N,12118.85961,W,1,12,0.98,1113.0,M,-21.3,M*47");
-
-    ASSERT_TRUE(um982_is_position_valid(&gps), "should be valid");
-    PASS();
-}
-
-static void test_position_invalid_no_fix(void)
-{
-    TEST("validity: position invalid with no fix");
-    reset_gps();
-    mock_set_tick(10000);
-
-    um982_parse_sentence(&gps,
-        "$GNGGA,235959.00,,,,,0,00,99.99,,,,,,*79");
-
-    ASSERT_FALSE(um982_is_position_valid(&gps), "no fix = invalid");
-    PASS();
-}
-
-static void test_position_age_uses_last_valid_fix(void)
-{
-    TEST("age: position age uses last valid fix, not no-fix GGA");
-    reset_gps();
-
-    mock_set_tick(10000);
-    um982_parse_sentence(&gps,
-        "$GNGGA,001043.00,4404.14036,N,12118.85961,W,1,12,0.98,1113.0,M,-21.3,M*47");
-
-    mock_set_tick(12000);
-    um982_parse_sentence(&gps,
-        "$GNGGA,235959.00,,,,,0,00,99.99,,,,,,*79");
-
-    mock_set_tick(12500);
-    ASSERT_EQ_INT(um982_position_age(&gps), 2500, "age should still be from last valid fix");
-    ASSERT_FALSE(um982_is_position_valid(&gps), "latest no-fix GGA should invalidate position");
-    PASS();
-}
-
-static void test_heading_age(void)
-{
-    TEST("age: heading age computed correctly");
-    reset_gps();
-    mock_set_tick(10000);
-
-    um982_parse_sentence(&gps, "$GNTHS,341.3344,A*1F");
-
-    mock_set_tick(10500);
-    uint32_t age = um982_heading_age(&gps);
-    ASSERT_EQ_INT(age, 500, "age should be 500ms");
-    PASS();
-}
-
-/* ========================= Send command tests ======================== */
-
-static void test_send_command_appends_crlf(void)
-{
-    TEST("send_command: appends \\r\\n");
-    reset_gps();
-
-    um982_send_command(&gps, "GPGGA COM2 1");
-
-    /* Check that TX buffer contains "GPGGA COM2 1\r\n" */
-    const char *expected = "GPGGA COM2 1\r\n";
-    ASSERT_TRUE(mock_uart_tx_len == strlen(expected), "TX length");
-    ASSERT_TRUE(memcmp(mock_uart_tx_buf, expected, strlen(expected)) == 0,
-        "TX content should be 'GPGGA COM2 1\\r\\n'");
-    PASS();
-}
-
-static void test_send_command_null_safety(void)
-{
-    TEST("send_command: NULL gps returns false");
-    ASSERT_FALSE(um982_send_command(NULL, "RESET"), "should return false");
-    PASS();
-}
-
-/* ========================= Init sequence tests ======================= */
-
-static void test_init_sends_correct_commands(void)
-{
-    TEST("init: sends correct command sequence");
-    spy_reset();
-    mock_uart_tx_clear();
-
-    /* Pre-load VERSIONA response so init succeeds */
-    const char *ver_resp = "#VERSIONA,79,GPS,FINE,2326,378237000,15434,0,18,889;\"UM982\"\r\n";
-    mock_uart_rx_load(&huart5, (const uint8_t *)ver_resp, (uint16_t)strlen(ver_resp));
-
-    UM982_GPS_t init_gps;
-    bool ok = um982_init(&init_gps, &huart5, 50.0f, 3.0f);
-
-    ASSERT_TRUE(ok, "init should succeed");
-    ASSERT_TRUE(init_gps.initialized, "should be initialized");
-
-    /* Verify TX buffer contains expected commands */
-    const char *tx = (const char *)mock_uart_tx_buf;
-    ASSERT_TRUE(strstr(tx, "UNLOG\r\n") != NULL, "should send UNLOG");
-    ASSERT_TRUE(strstr(tx, "CONFIG HEADING FIXLENGTH\r\n") != NULL, "should send CONFIG HEADING");
-    ASSERT_TRUE(strstr(tx, "CONFIG HEADING LENGTH 50 3\r\n") != NULL, "should send LENGTH");
-    ASSERT_TRUE(strstr(tx, "GPGGA COM2 1\r\n") != NULL, "should enable GGA");
-    ASSERT_TRUE(strstr(tx, "GPRMC COM2 1\r\n") != NULL, "should enable RMC");
-    ASSERT_TRUE(strstr(tx, "GPTHS COM2 0.2\r\n") != NULL, "should enable THS at 5Hz");
-    ASSERT_TRUE(strstr(tx, "SAVECONFIG\r\n") == NULL, "should NOT save config (NVM wear)");
-    ASSERT_TRUE(strstr(tx, "VERSIONA\r\n") != NULL, "should query version");
-
-    /* Verify command order: UNLOG should come before GPGGA */
-    const char *unlog_pos = strstr(tx, "UNLOG\r\n");
-    const char *gpgga_pos = strstr(tx, "GPGGA COM2 1\r\n");
-    ASSERT_TRUE(unlog_pos < gpgga_pos, "UNLOG should precede GPGGA");
-
-    PASS();
-}
-
-static void test_init_no_baseline(void)
-{
-    TEST("init: baseline=0 skips LENGTH command");
-    spy_reset();
-    mock_uart_tx_clear();
-
-    const char *ver_resp = "#VERSIONA,79,GPS,FINE,2326,378237000,15434,0,18,889;\"UM982\"\r\n";
-    mock_uart_rx_load(&huart5, (const uint8_t *)ver_resp, (uint16_t)strlen(ver_resp));
-
-    UM982_GPS_t init_gps;
-    um982_init(&init_gps, &huart5, 0.0f, 0.0f);
-
-    const char *tx = (const char *)mock_uart_tx_buf;
-    ASSERT_TRUE(strstr(tx, "CONFIG HEADING LENGTH") == NULL, "should NOT send LENGTH");
-    PASS();
-}
-
-static void test_init_fails_no_version(void)
-{
-    TEST("init: fails if no VERSIONA response");
-    spy_reset();
-    mock_uart_tx_clear();
-
-    /* Don't load any RX data — init should timeout */
-    UM982_GPS_t init_gps;
-    bool ok = um982_init(&init_gps, &huart5, 50.0f, 3.0f);
-
-    ASSERT_FALSE(ok, "init should fail without version response");
-    ASSERT_FALSE(init_gps.initialized, "should not be initialized");
-    PASS();
-}
-
-static void test_nmea_traffic_sets_initialized_without_versiona(void)
-{
-    TEST("init state: supported NMEA traffic sets initialized");
-    reset_gps();
-
-    ASSERT_FALSE(gps.initialized, "should start uninitialized");
-    um982_parse_sentence(&gps, "$GNTHS,341.3344,A*1F");
-    ASSERT_TRUE(gps.initialized, "supported NMEA should mark communication alive");
-    PASS();
-}
-
-/* ========================= Edge case tests =========================== */
-
-static void test_empty_fields_handled(void)
-{
-    TEST("edge: GGA with empty lat/lon fields");
-    reset_gps();
-    gps.latitude = 99.99;
-    gps.longitude = 99.99;
-
-    /* GGA with empty position fields (no fix) */
-    um982_parse_sentence(&gps,
-        "$GNGGA,235959.00,,,,,0,00,99.99,,,,,,*79");
-
-    ASSERT_EQ_INT(gps.fix_quality, 0, "no fix");
-    /* Latitude/longitude should not be updated (fields are empty) */
-    ASSERT_NEAR(gps.latitude, 99.99, 0.01, "lat unchanged");
-    ASSERT_NEAR(gps.longitude, 99.99, 0.01, "lon unchanged");
-    PASS();
-}
-
-static void test_sentence_too_short(void)
-{
-    TEST("edge: sentence too short to have formatter");
-    reset_gps();
-    /* Should not crash */
-    um982_parse_sentence(&gps, "$GN");
-    um982_parse_sentence(&gps, "$");
-    um982_parse_sentence(&gps, "");
-    um982_parse_sentence(&gps, NULL);
-    PASS();
-}
-
-static void test_line_overflow(void)
-{
-    TEST("edge: oversized line is dropped");
-    reset_gps();
-
-    /* Create a line longer than UM982_LINE_BUF_SIZE */
-    char big[200];
-    memset(big, 'X', sizeof(big));
-    big[0] = '$';
-    big[198] = '\n';
-    big[199] = '\0';
-
-    um982_feed(&gps, (const uint8_t *)big, 199);
-    /* Should not crash, heading should still be NAN */
-    ASSERT_NAN(gps.heading, "no valid data from overflow");
-    PASS();
-}
-
-static void test_process_via_mock_uart(void)
-{
-    TEST("process: reads from mock UART RX buffer");
-    reset_gps();
-    mock_set_tick(5000);
-
-    /* Load data into mock UART RX */
-    const char *data = "$GNTHS,275.1234,D*18\r\n";
-    mock_uart_rx_load(&huart5, (const uint8_t *)data, (uint16_t)strlen(data));
-
-    /* Call process() which reads from UART */
-    um982_process(&gps);
-
-    ASSERT_NEAR(gps.heading, 275.1234, 0.001, "heading via process()");
-    ASSERT_EQ_INT(gps.heading_mode, 'D', "mode D");
-    PASS();
-}
-
-/* ========================= PR #68 bug regression tests =============== */
-
-/* These tests specifically verify the bugs found in the reverted PR #68 */
-
-static void test_regression_sentence_id_with_gn_prefix(void)
-{
-    TEST("regression: GN-prefixed GGA is correctly identified");
-    reset_gps();
-
-    /* PR #68 bug: strncmp(sentence, "GGA", 3) compared "GNG" vs "GGA" — never matched.
-     * Our fix: skip 2-char talker ID, compare at sentence+3. */
-    um982_parse_sentence(&gps,
-        "$GNGGA,001043.00,4404.14036,N,12118.85961,W,1,12,0.98,1113.0,M,-21.3,M*47");
-
-    ASSERT_EQ_INT(gps.fix_quality, 1, "GGA should parse with GN prefix");
-    ASSERT_NEAR(gps.latitude, 44.069006, 0.001, "latitude should be parsed");
-    PASS();
-}
-
-static void test_regression_longitude_3digit_degrees(void)
-{
-    TEST("regression: 3-digit longitude degrees parsed correctly");
-    reset_gps();
-
-    /* PR #68 bug: hardcoded 2-digit degrees for longitude.
-     * 12118.85961 should be 121° 18.85961' = 121.314327° */
-    um982_parse_sentence(&gps,
-        "$GNGGA,001043.00,4404.14036,N,12118.85961,W,1,12,0.98,1113.0,M,-21.3,M*47");
-
-    ASSERT_NEAR(gps.longitude, -(121.0 + 18.85961/60.0), 0.0001,
-        "longitude 121° should not be parsed as 12°");
-    ASSERT_TRUE(gps.longitude < -100.0, "longitude should be > 100 degrees");
-    PASS();
-}
-
-static void test_regression_hemisphere_no_ptr_corrupt(void)
-{
-    TEST("regression: hemisphere parsing doesn't corrupt field pointer");
-    reset_gps();
-
-    /* PR #68 bug: GGA/RMC hemisphere cases manually advanced ptr,
-     * desynchronizing from field counter. Our parser uses proper tokenizer. */
-    um982_parse_sentence(&gps,
-        "$GNGGA,001043.00,4404.14036,N,12118.85961,W,1,12,0.98,1113.0,M,-21.3,M*47");
-
-    /* After lat/lon, remaining fields should be correct */
-    ASSERT_EQ_INT(gps.num_satellites, 12, "sats after hemisphere");
-    ASSERT_NEAR(gps.hdop, 0.98, 0.01, "hdop after hemisphere");
-    ASSERT_NEAR(gps.altitude, 1113.0, 0.1, "altitude after hemisphere");
-    PASS();
-}
-
-static void test_regression_rmc_also_parsed(void)
-{
-    TEST("regression: RMC sentence is actually parsed (not dead code)");
-    reset_gps();
-
-    /* PR #68 bug: identifySentence never matched GGA/RMC, so position
-     * parsing was dead code. */
-    um982_parse_sentence(&gps,
-        "$GNRMC,001031.00,A,4404.13993,N,12118.86023,W,0.146,,100117,,,A*7B");
-
-    ASSERT_TRUE(gps.latitude > 44.0, "RMC lat should be parsed");
-    ASSERT_TRUE(gps.longitude < -121.0, "RMC lon should be parsed");
-    ASSERT_NEAR(gps.speed_knots, 0.146, 0.001, "RMC speed");
-    PASS();
-}
-
-/* ========================= Main ====================================== */
-
-int main(void)
-{
-    printf("=== UM982 GPS Driver Tests ===\n\n");
-
-    printf("--- Checksum ---\n");
-    test_checksum_valid();
-    test_checksum_valid_ths();
-    test_checksum_invalid();
-    test_checksum_missing_star();
-    test_checksum_null();
-    test_checksum_no_dollar();
-
-    printf("\n--- Coordinate Parsing ---\n");
-    test_coord_latitude_north();
-    test_coord_latitude_south();
-    test_coord_longitude_3digit();
-    test_coord_longitude_east();
-    test_coord_empty();
-    test_coord_null();
-    test_coord_no_dot();
-
-    printf("\n--- GGA Parsing ---\n");
-    test_parse_gga_full();
-    test_parse_gga_rtk_fixed();
-    test_parse_gga_no_fix();
-
-    printf("\n--- RMC Parsing ---\n");
-    test_parse_rmc_valid();
-    test_parse_rmc_void();
-
-    printf("\n--- THS Parsing ---\n");
-    test_parse_ths_autonomous();
-    test_parse_ths_not_valid();
-    test_parse_ths_zero();
-    test_parse_ths_360_boundary();
-
-    printf("\n--- VTG Parsing ---\n");
-    test_parse_vtg();
-
-    printf("\n--- Talker IDs ---\n");
-    test_talker_gp();
-    test_talker_gl();
-
-    printf("\n--- Feed / Line Assembly ---\n");
-    test_feed_single_sentence();
-    test_feed_multiple_sentences();
-    test_feed_partial_then_complete();
-    test_feed_bad_checksum_rejected();
-    test_feed_versiona_response();
-
-    printf("\n--- Validity / Age ---\n");
-    test_heading_valid_within_timeout();
-    test_heading_invalid_after_timeout();
-    test_heading_invalid_mode_v();
-    test_position_valid();
-    test_position_invalid_no_fix();
-    test_position_age_uses_last_valid_fix();
-    test_heading_age();
-
-    printf("\n--- Send Command ---\n");
-    test_send_command_appends_crlf();
-    test_send_command_null_safety();
-
-    printf("\n--- Init Sequence ---\n");
-    test_init_sends_correct_commands();
-    test_init_no_baseline();
-    test_init_fails_no_version();
-    test_nmea_traffic_sets_initialized_without_versiona();
-
-    printf("\n--- Edge Cases ---\n");
-    test_empty_fields_handled();
-    test_sentence_too_short();
-    test_line_overflow();
-    test_process_via_mock_uart();
-
-    printf("\n--- PR #68 Regression ---\n");
-    test_regression_sentence_id_with_gn_prefix();
-    test_regression_longitude_3digit_degrees();
-    test_regression_hemisphere_no_ptr_corrupt();
-    test_regression_rmc_also_parsed();
-
-    printf("\n===============================================\n");
-    printf("  Results: %d passed, %d failed (of %d total)\n",
-           tests_passed, tests_failed, tests_passed + tests_failed);
-    printf("===============================================\n");
-
-    return tests_failed > 0 ? 1 : 0;
-}
@@ -212,11 +212,6 @@ BUFG bufg_feedback (

 // ---- Output BUFG ----
 // Routes the jitter-cleaned 400 MHz CLKOUT0 onto a global clock network.
-// DONT_TOUCH prevents phys_opt_design AggressiveExplore from replicating this
-// BUFG into a cascaded chain (4 BUFGs in series observed in Build 26), which
-// added ~243ps of clock insertion delay and caused -187ps clock skew on the
-// NCO→DSP mixer critical path.
-(* DONT_TOUCH = "TRUE" *)
 BUFG bufg_clk400m (
    .I(clk_mmcm_out0),
    .O(clk_400m_out)
@@ -66,13 +66,13 @@ reg signed [COMB_WIDTH-1:0] comb_delay [0:STAGES-1][0:COMB_DELAY-1];
 // Pipeline valid for comb stages 1-4: delayed by 1 cycle vs comb_pipe to
 // account for CREG+AREG+BREG pipeline inside comb_0_dsp (explicit DSP48E1).
 // Comb[0] result appears 1 cycle after data_valid_comb_pipe.
-(* keep = "true", max_fanout = 16 *) reg data_valid_comb_0_out;
+(* keep = "true", max_fanout = 4 *) reg data_valid_comb_0_out;

 // Enhanced control and monitoring
 reg [1:0] decimation_counter;
-(* keep = "true", max_fanout = 16 *) reg data_valid_delayed;
-(* keep = "true", max_fanout = 16 *) reg data_valid_comb;
-(* keep = "true", max_fanout = 16 *) reg data_valid_comb_pipe;
+(* keep = "true", max_fanout = 4 *) reg data_valid_delayed;
+(* keep = "true", max_fanout = 4 *) reg data_valid_comb;
+(* keep = "true", max_fanout = 4 *) reg data_valid_comb_pipe;
 reg [7:0] output_counter;
 reg [ACC_WIDTH-1:0] max_integrator_value;
 reg overflow_detected;
@@ -32,8 +32,8 @@ the `USB_MODE` parameter in `radar_system_top.v`:

 | USB_MODE | Interface | Bus Width | Speed | Board Target |
 |----------|-----------|-----------|-------|--------------|
-| 0 | FT601 (USB 3.0) | 32-bit | 100 MHz | 200T premium dev board |
-| 1 (default) | FT2232H (USB 2.0) | 8-bit | 60 MHz | 50T production board |
+| 0 (default) | FT601 (USB 3.0) | 32-bit | 100 MHz | 200T premium dev board |
+| 1 | FT2232H (USB 2.0) | 8-bit | 60 MHz | 50T production board |

 ### How USB_MODE Works

@@ -72,8 +72,7 @@ The parameter is set via a **wrapper module** that overrides the default:
  ```

 - **200T dev board**: `radar_system_top` is used directly as the top module.
-  `USB_MODE` defaults to `1` (FT2232H) since production is the primary target.
-  Override with `.USB_MODE(0)` for FT601 builds.
+  `USB_MODE` defaults to `0` (FT601). No wrapper needed.

 ### RTL Files by USB Interface

@@ -159,7 +158,7 @@ The build scripts automatically select the correct top module and constraints:

 You do NOT need to set `USB_MODE` manually. The top module selection handles it:
 - `radar_system_top_50t` forces `USB_MODE=1` internally
- `radar_system_top` defaults to `USB_MODE=1` (FT2232H, production default)
+- `radar_system_top` defaults to `USB_MODE=0`

 ## How to Select Constraints in Vivado

@@ -191,9 +190,9 @@ read_xdc constraints/te0713_te0701_minimal.xdc
 | Target | Top module | USB_MODE | USB Interface | Notes |
 |--------|------------|----------|---------------|-------|
 | 50T Production (FTG256) | `radar_system_top_50t` | 1 | FT2232H (8-bit) | Wrapper sets USB_MODE=1, ties off FT601 |
-| 200T Dev (FBG484) | `radar_system_top` | 0 (override) | FT601 (32-bit) | Build script overrides default USB_MODE=1 |
-| Trenz TE0712/TE0701 | `radar_system_top_te0712_dev` | 0 (override) | FT601 (32-bit) | Minimal bring-up wrapper |
-| Trenz TE0713/TE0701 | `radar_system_top_te0713_dev` | 0 (override) | FT601 (32-bit) | Alternate SoM wrapper |
+| 200T Dev (FBG484) | `radar_system_top` | 0 (default) | FT601 (32-bit) | No wrapper needed |
+| Trenz TE0712/TE0701 | `radar_system_top_te0712_dev` | 0 (default) | FT601 (32-bit) | Minimal bring-up wrapper |
+| Trenz TE0713/TE0701 | `radar_system_top_te0713_dev` | 0 (default) | FT601 (32-bit) | Alternate SoM wrapper |

 ## Trenz Split Status

@@ -83,13 +83,3 @@ set_false_path -through [get_pins rx_inst/adc/mmcm_inst/mmcm_adc_400m/LOCKED]
 # Waiving hold on these 8 paths (adc_d_p[0..7] → IDDR) is standard practice
 # for source-synchronous LVDS ADC interfaces using BUFIO capture.
 set_false_path -hold -from [get_ports {adc_d_p[*]}] -to [get_clocks adc_dco_p]
-
-# --------------------------------------------------------------------------
-# Timing margin for 400 MHz critical paths
-# --------------------------------------------------------------------------
-# Extra setup uncertainty forces Vivado to leave margin for temperature/voltage/
-# aging variation. Reduced from 200 ps to 100 ps after NCO→mixer pipeline
-# register fix eliminated the dominant timing bottleneck (WNS went from +0.002ns
-# to comfortable margin). 100 ps still provides ~4% guardband on the 2.5ns period.
-# This is additive to the existing jitter-based uncertainty (~53 ps).
-set_clock_uncertainty -setup -add 0.100 [get_clocks clk_mmcm_out0]
@@ -70,10 +70,9 @@ set_input_jitter [get_clocks clk_100m] 0.1
 # NOTE: The physical DAC (U3, AD9708) receives its clock directly from the
 #       AD9523 via a separate net (DAC_CLOCK), NOT from the FPGA. The FPGA
 #       uses this clock input for internal DAC data timing only. The RTL port
-#       `dac_clk` is an RTL output that assigns clk_120m directly. It has no
-#       physical pin on the 50T board and is left unconnected here. The port
-#       CANNOT be removed from the RTL because the 200T board uses it with
-#       ODDR clock forwarding (pin H17, see xc7a200t_fbg484.xdc).
+#       `dac_clk` is an output that assigns clk_120m directly — it has no
+#       separate physical pin on this board and should be removed from the
+#       RTL or left unconnected.
 # FIX: Moved from C13 (IO_L12N = N-type) to D13 (IO_L12P = P-type MRCC).
 #      Clock inputs must use the P-type pin of an MRCC pair (PLIO-9 DRC).
 set_property PACKAGE_PIN D13 [get_ports {clk_120m_dac}]
@@ -223,16 +222,8 @@ set_property IOSTANDARD LVCMOS33 [get_ports {stm32_new_*}]
 set_property IOSTANDARD LVCMOS33 [get_ports {stm32_mixers_enable}]
 # reset_n is DIG_4 (PD12) — constrained above in the RESET section

-# DIG_5 = H11, DIG_6 = G12, DIG_7 = H12 — FPGA→STM32 status outputs
-# DIG_5: AGC saturation flag (PD13 on STM32)
-# DIG_6: AGC enable flag (PD14) — mirrors FPGA host_agc_enable to STM32
-# DIG_7: reserved (PD15)
-set_property PACKAGE_PIN H11 [get_ports {gpio_dig5}]
-set_property PACKAGE_PIN G12 [get_ports {gpio_dig6}]
-set_property PACKAGE_PIN H12 [get_ports {gpio_dig7}]
-set_property IOSTANDARD LVCMOS33 [get_ports {gpio_dig*}]
-set_property DRIVE 8 [get_ports {gpio_dig*}]
-set_property SLEW SLOW [get_ports {gpio_dig*}]
+# DIG_5 = H11, DIG_6 = G12, DIG_7 = H12 — available for FPGA→STM32 status
+# Currently unused in RTL. Could be connected to status outputs if needed.

 # ============================================================================
 # ADC INTERFACE (LVDS — Bank 14, VCCO=3.3V)
@@ -333,44 +324,6 @@ set_property DRIVE 8 [get_ports {ft_data[*]}]

 # ft_clkout constrained above in CLOCK CONSTRAINTS section (C4, 60 MHz)

-# --------------------------------------------------------------------------
-# FT2232H Source-Synchronous Timing Constraints
-# --------------------------------------------------------------------------
-# FT2232H 245 Synchronous FIFO mode timing (60 MHz, period = 16.667 ns):
-#
-# FPGA Read Path (FT2232H drives data, FPGA samples):
-#   - Data valid before CLKOUT rising edge: t_vr(max) = 7.0 ns
-#   - Data hold after CLKOUT rising edge:   t_hr(min) = 0.0 ns
-#   - Input delay max = period - t_vr = 16.667 - 7.0 = 9.667 ns
-#   - Input delay min = t_hr = 0.0 ns
-#
-# FPGA Write Path (FPGA drives data, FT2232H samples):
-#   - Data setup before next CLKOUT rising: t_su = 5.0 ns
-#   - Data hold after CLKOUT rising:        t_hd = 0.0 ns
-#   - Output delay max = period - t_su = 16.667 - 5.0 = 11.667 ns
-#   - Output delay min = t_hd = 0.0 ns
-# --------------------------------------------------------------------------
-
-# Input delays: FT2232H → FPGA (data bus and status signals)
-set_input_delay -clock [get_clocks ft_clkout] -max 9.667 [get_ports {ft_data[*]}]
-set_input_delay -clock [get_clocks ft_clkout] -min 0.0   [get_ports {ft_data[*]}]
-set_input_delay -clock [get_clocks ft_clkout] -max 9.667 [get_ports {ft_rxf_n}]
-set_input_delay -clock [get_clocks ft_clkout] -min 0.0   [get_ports {ft_rxf_n}]
-set_input_delay -clock [get_clocks ft_clkout] -max 9.667 [get_ports {ft_txe_n}]
-set_input_delay -clock [get_clocks ft_clkout] -min 0.0   [get_ports {ft_txe_n}]
-
-# Output delays: FPGA → FT2232H (control strobes and data bus when writing)
-set_output_delay -clock [get_clocks ft_clkout] -max 11.667 [get_ports {ft_data[*]}]
-set_output_delay -clock [get_clocks ft_clkout] -min 0.0    [get_ports {ft_data[*]}]
-set_output_delay -clock [get_clocks ft_clkout] -max 11.667 [get_ports {ft_rd_n}]
-set_output_delay -clock [get_clocks ft_clkout] -min 0.0    [get_ports {ft_rd_n}]
-set_output_delay -clock [get_clocks ft_clkout] -max 11.667 [get_ports {ft_wr_n}]
-set_output_delay -clock [get_clocks ft_clkout] -min 0.0    [get_ports {ft_wr_n}]
-set_output_delay -clock [get_clocks ft_clkout] -max 11.667 [get_ports {ft_oe_n}]
-set_output_delay -clock [get_clocks ft_clkout] -min 0.0    [get_ports {ft_oe_n}]
-set_output_delay -clock [get_clocks ft_clkout] -max 11.667 [get_ports {ft_siwu}]
-set_output_delay -clock [get_clocks ft_clkout] -min 0.0    [get_ports {ft_siwu}]
-
 # ============================================================================
 # STATUS / DEBUG OUTPUTS — NO PHYSICAL CONNECTIONS
 # ============================================================================
@@ -457,10 +410,10 @@ set_property BITSTREAM.CONFIG.UNUSEDPIN Pullup [current_design]
 # 4. JTAG: FPGA_TCK (L7), FPGA_TDI (N7), FPGA_TDO (N8), FPGA_TMS (M7).
 #    Dedicated pins — no XDC constraints needed.
 #
-# 5. dac_clk port: Not connected on the 50T board (DAC clocked directly from
-#    AD9523). The RTL port exists for 200T board compatibility, where the FPGA
-#    forwards the DAC clock via ODDR to pin H17 with generated clock and
-#    timing constraints (see xc7a200t_fbg484.xdc). Do NOT remove from RTL.
+# 5. dac_clk port: The RTL top module declares `dac_clk` as an output, but
+#    the physical board wires the DAC clock (AD9708 CLOCK pin) directly from
+#    the AD9523, not from the FPGA. This port should be removed from the RTL
+#    or left unconnected. It currently just assigns clk_120m_dac passthrough.
 #
 # ============================================================================
 # END OF CONSTRAINTS
@@ -102,19 +102,14 @@ wire signed [17:0] debug_mixed_q_trunc;
 reg [7:0] signal_power_i, signal_power_q;

 // Internal mixing signals
-// Pipeline: NCO fabric reg (1) + DSP48E1 AREG/BREG (1) + MREG (1) + PREG (1) + retiming (1) = 5 cycles
-// The NCO fabric pipeline register was added to break the long NCO→DSP B-port route
-// (1.505ns routing in Build 26, WNS=+0.002ns). With BREG=1 still active inside the DSP,
-// total latency increases by 1 cycle (2.5ns at 400MHz — negligible for radar).
+// DSP48E1 with AREG=1, BREG=1, MREG=1, PREG=1 handles all internal pipelining
+// Latency: 4 cycles (1 for AREG/BREG, 1 for MREG, 1 for PREG, 1 for post-DSP retiming)
 wire signed [MIXER_WIDTH-1:0] adc_signed_w;
 reg signed [MIXER_WIDTH + NCO_WIDTH -1:0] mixed_i, mixed_q;
 reg mixed_valid;
 reg mixer_overflow_i, mixer_overflow_q;
-// Pipeline valid tracking: 5-stage shift register (1 NCO pipe + 3 DSP48E1 + 1 retiming)
-reg [4:0] dsp_valid_pipe;
-// NCO→DSP pipeline registers — breaks the long NCO sin/cos → DSP48E1 B-port route
-// DONT_TOUCH prevents Vivado from absorbing these into the DSP or optimizing away
-(* DONT_TOUCH = "TRUE" *) reg signed [15:0] cos_nco_pipe, sin_nco_pipe;
+// Pipeline valid tracking: 4-stage shift register (3 for DSP48E1 + 1 for post-DSP retiming)
+reg [3:0] dsp_valid_pipe;
 // Post-DSP retiming registers — breaks DSP48E1 CLK→P to fabric timing path
 // This extra pipeline stage absorbs the 1.866ns DSP output prop delay + routing,
 // ensuring WNS > 0 at 400 MHz regardless of placement seed
@@ -215,11 +210,11 @@ nco_400m_enhanced nco_core (
 //
 // Architecture:
 //   ADC data → sign-extend to 18b → DSP48E1 A-port (AREG=1 pipelines it)
-//   NCO cos/sin → fabric pipeline reg → DSP48E1 B-port (BREG=1 pipelines it)
+//   NCO cos/sin → sign-extend to 18b → DSP48E1 B-port (BREG=1 pipelines it)
 //   Multiply result captured by MREG=1, then output registered by PREG=1
 //   force_saturation override applied AFTER DSP48E1 output (not on input path)
 //
-// Latency: 4 clock cycles (1 NCO pipe + 1 AREG/BREG + 1 MREG + 1 PREG) + 1 retiming = 5 total
+// Latency: 3 clock cycles (AREG/BREG + MREG + PREG)
 // PREG=1 absorbs DSP48E1 CLK→P delay internally, preventing fabric timing violations
 // In simulation (Icarus), uses behavioral equivalent since DSP48E1 is Xilinx-only
 // ============================================================================
@@ -228,35 +223,24 @@ nco_400m_enhanced nco_core (
 assign adc_signed_w = {1'b0, adc_data, {(MIXER_WIDTH-ADC_WIDTH-1){1'b0}}} - 
                      {1'b0, {ADC_WIDTH{1'b1}}, {(MIXER_WIDTH-ADC_WIDTH-1){1'b0}}} / 2;

-// Valid pipeline: 5-stage shift register (1 NCO pipe + 3 DSP48E1 AREG+MREG+PREG + 1 retiming)
+// Valid pipeline: 4-stage shift register (3 for DSP48E1 AREG+MREG+PREG + 1 for retiming)
 always @(posedge clk_400m or negedge reset_n_400m) begin
    if (!reset_n_400m) begin
-        dsp_valid_pipe <= 5'b00000;
+        dsp_valid_pipe <= 4'b0000;
    end else begin
-        dsp_valid_pipe <= {dsp_valid_pipe[3:0], (nco_ready && adc_data_valid_i && adc_data_valid_q)};
+        dsp_valid_pipe <= {dsp_valid_pipe[2:0], (nco_ready && adc_data_valid_i && adc_data_valid_q)};
    end
 end

 `ifdef SIMULATION
 // ---- Behavioral model for Icarus Verilog simulation ----
-// Mimics NCO pipeline + DSP48E1 with AREG=1, BREG=1, MREG=1, PREG=1 (4-cycle DSP + 1 NCO pipe)
+// Mimics DSP48E1 with AREG=1, BREG=1, MREG=1, PREG=1 (3-cycle latency)
 reg signed [MIXER_WIDTH-1:0] adc_signed_reg;     // Models AREG
 reg signed [15:0] cos_pipe_reg, sin_pipe_reg;     // Models BREG
 reg signed [MIXER_WIDTH+NCO_WIDTH-1:0] mult_i_internal, mult_q_internal;  // Models MREG
 reg signed [MIXER_WIDTH+NCO_WIDTH-1:0] mult_i_reg, mult_q_reg;            // Models PREG

-// Stage 0: NCO pipeline — breaks long NCO→DSP route (matches synthesis fabric registers)
-always @(posedge clk_400m or negedge reset_n_400m) begin
-    if (!reset_n_400m) begin
-        cos_nco_pipe <= 0;
-        sin_nco_pipe <= 0;
-    end else begin
-        cos_nco_pipe <= cos_out;
-        sin_nco_pipe <= sin_out;
-    end
-end
-
-// Stage 1: AREG/BREG equivalent (uses pipelined NCO outputs)
+// Stage 1: AREG/BREG equivalent
 always @(posedge clk_400m or negedge reset_n_400m) begin
    if (!reset_n_400m) begin
        adc_signed_reg <= 0;
@@ -264,8 +248,8 @@ always @(posedge clk_400m or negedge reset_n_400m) begin
        sin_pipe_reg <= 0;
    end else begin
        adc_signed_reg <= adc_signed_w;
-        cos_pipe_reg <= cos_nco_pipe;
-        sin_pipe_reg <= sin_nco_pipe;
+        cos_pipe_reg <= cos_out;
+        sin_pipe_reg <= sin_out;
    end
 end

@@ -307,20 +291,6 @@ end
 // This guarantees AREG/BREG/MREG are used, achieving timing closure at 400 MHz
 wire [47:0] dsp_p_i, dsp_p_q;

-// NCO pipeline stage — breaks the long NCO sin/cos → DSP48E1 B-port route
-// (1.505ns routing observed in Build 26). These fabric registers are placed
-// near the DSP by the placer, splitting the route into two shorter segments.
-// DONT_TOUCH on the reg declaration (above) prevents absorption/retiming.
-always @(posedge clk_400m or negedge reset_n_400m) begin
-    if (!reset_n_400m) begin
-        cos_nco_pipe <= 0;
-        sin_nco_pipe <= 0;
-    end else begin
-        cos_nco_pipe <= cos_out;
-        sin_nco_pipe <= sin_out;
-    end
-end
-
 // DSP48E1 for I-channel mixer (adc_signed * cos_out)
 DSP48E1 #(
    // Feature control attributes
@@ -380,7 +350,7 @@ DSP48E1 #(
    .CEINMODE(1'b0),
    // Data ports
    .A({{12{adc_signed_w[MIXER_WIDTH-1]}}, adc_signed_w}),   // Sign-extend 18b to 30b
-    .B({{2{cos_nco_pipe[15]}}, cos_nco_pipe}),                // Sign-extend 16b to 18b (pipelined)
+    .B({{2{cos_out[15]}}, cos_out}),                          // Sign-extend 16b to 18b
    .C(48'b0),
    .D(25'b0),
    .CARRYIN(1'b0),
@@ -462,7 +432,7 @@ DSP48E1 #(
    .CED(1'b0),
    .CEINMODE(1'b0),
    .A({{12{adc_signed_w[MIXER_WIDTH-1]}}, adc_signed_w}),
-    .B({{2{sin_nco_pipe[15]}}, sin_nco_pipe}),
+    .B({{2{sin_out[15]}}, sin_out}),
    .C(48'b0),
    .D(25'b0),
    .CARRYIN(1'b0),
@@ -522,7 +492,7 @@ always @(posedge clk_400m or negedge reset_n_400m) begin
        mixer_overflow_q <= 0;
        saturation_count <= 0;
        overflow_detected <= 0;
-    end else if (dsp_valid_pipe[4]) begin
+    end else if (dsp_valid_pipe[3]) begin
        // Force saturation for testing (applied after DSP output, not on input path)
        if (force_saturation_sync) begin
            mixed_i <= 34'h1FFFFFFFF;
@@ -296,7 +296,7 @@ always @(posedge clk or negedge reset_n) begin
                    state           <= ST_DONE;
                end
            end
-            // Timeout: if no ADC data after 1000 cycles (10 us @ 100 MHz), FAIL
+            // Timeout: if no ADC data after 10000 cycles, FAIL
            step_cnt <= step_cnt + 1;
            if (step_cnt >= 10'd1000 && adc_cap_cnt == 0) begin
                result_flags[4] <= 1'b0;
@@ -11,10 +11,8 @@ module radar_receiver_final (
    input wire adc_dco_n,            // Data Clock Output N (400MHz LVDS)
 	 output wire adc_pwdn,
    
-    // Chirp counter from transmitter (for matched filter indexing)
+    // Chirp counter from transmitter (for frame sync and matched filter)
    input wire [5:0] chirp_counter,
-    // Frame-start pulse from transmitter (CDC-synchronized, 1 clk_100m cycle)
-    input wire tx_frame_start,
    
    output wire [31:0] doppler_output,
    output wire doppler_valid,
@@ -44,13 +42,6 @@ module radar_receiver_final (
    // [2:0]=shift amount: 0..7 bits. Default 0 = pass-through.
    input wire [3:0] host_gain_shift,

-    // AGC configuration (opcodes 0x28-0x2C, active only when agc_enable=1)
-    input wire        host_agc_enable,      // 0x28: 0=manual, 1=auto AGC
-    input wire [7:0]  host_agc_target,      // 0x29: target peak magnitude
-    input wire [3:0]  host_agc_attack,      // 0x2A: gain-down step on clipping
-    input wire [3:0]  host_agc_decay,       // 0x2B: gain-up step when weak
-    input wire [3:0]  host_agc_holdoff,     // 0x2C: frames before gain-up
-
    // STM32 toggle signals for mode 00 (STM32-driven) pass-through.
    // These are CDC-synchronized in radar_system_top.v / radar_transmitter.v
    // before reaching this module. In mode 00, the RX mode controller uses
@@ -69,12 +60,7 @@ module radar_receiver_final (
    // ADC raw data tap (clk_100m domain, post-DDC, for self-test / debug)
    output wire [15:0] dbg_adc_i,            // DDC output I (16-bit signed, 100 MHz)
    output wire [15:0] dbg_adc_q,            // DDC output Q (16-bit signed, 100 MHz)
-    output wire        dbg_adc_valid,        // DDC output valid (100 MHz)
-
-    // AGC status outputs (for status readback / STM32 outer loop)
-    output wire [7:0]  agc_saturation_count, // Per-frame clipped sample count
-    output wire [7:0]  agc_peak_magnitude,   // Per-frame peak (upper 8 bits)
-    output wire [3:0]  agc_current_gain      // Effective gain_shift encoding
+    output wire        dbg_adc_valid         // DDC output valid (100 MHz)
 );

 // ========== INTERNAL SIGNALS ==========
@@ -100,9 +86,7 @@ wire adc_valid_sync;
 // Gain-controlled signals (between DDC output and matched filter)
 wire signed [15:0] gc_i, gc_q;
 wire gc_valid;
-wire [7:0] gc_saturation_count;  // Diagnostic: per-frame clipped sample counter
-wire [7:0] gc_peak_magnitude;    // Diagnostic: per-frame peak magnitude
-wire [3:0] gc_current_gain;      // Diagnostic: effective gain_shift
+wire [7:0] gc_saturation_count;  // Diagnostic: clipped sample counter

 // Reference signals for the processing chain
 wire [15:0] long_chirp_real, long_chirp_imag;
@@ -176,7 +160,7 @@ wire clk_400m;
 // the buffered 400MHz DCO clock via adc_dco_bufg, avoiding duplicate
 // IBUFDS instantiations on the same LVDS clock pair.

-// 1. ADC + CDC + Digital Gain
+// 1. ADC + CDC + AGC

 // CMOS Output Interface (400MHz Domain)
 wire [7:0] adc_data_cmos;  // 8-bit ADC data (CMOS, from ad9484_interface_400m)
@@ -238,10 +222,9 @@ ddc_input_interface ddc_if (
    .data_sync_error()
 );

-// 2b. Digital Gain Control with AGC
+// 2b. Digital Gain Control (Fix 3)
 // Host-configurable power-of-2 shift between DDC output and matched filter.
-// Default gain_shift=0, agc_enable=0 → pass-through (no behavioral change).
-// When agc_enable=1: auto-adjusts gain per frame based on peak/saturation.
+// Default gain_shift=0 → pass-through (no behavioral change from baseline).
 rx_gain_control gain_ctrl (
    .clk(clk),
    .reset_n(reset_n),
@@ -249,21 +232,10 @@ rx_gain_control gain_ctrl (
    .data_q_in(adc_q_scaled),
    .valid_in(adc_valid_sync),
    .gain_shift(host_gain_shift),
-    // AGC configuration
-    .agc_enable(host_agc_enable),
-    .agc_target(host_agc_target),
-    .agc_attack(host_agc_attack),
-    .agc_decay(host_agc_decay),
-    .agc_holdoff(host_agc_holdoff),
-    // Frame boundary from Doppler processor
-    .frame_boundary(doppler_frame_done),
-    // Outputs
    .data_i_out(gc_i),
    .data_q_out(gc_q),
    .valid_out(gc_valid),
-    .saturation_count(gc_saturation_count),
-    .peak_magnitude(gc_peak_magnitude),
-    .current_gain(gc_current_gain)
+    .saturation_count(gc_saturation_count)
 );

 // 3. Dual Chirp Memory Loader
@@ -394,31 +366,32 @@ mti_canceller #(
    .mti_first_chirp(mti_first_chirp)
 );

-// ========== FRAME SYNC FROM TRANSMITTER ==========
-// [FPGA-001 FIXED] Use the authoritative new_chirp_frame signal from the
-// transmitter (via plfm_chirp_controller_enhanced), CDC-synchronized to
-// clk_100m in radar_system_top.  Previous code tried to derive frame
-// boundaries from chirp_counter == 0, but that counter comes from the
-// transmitter path (plfm_chirp_controller_enhanced) which does NOT wrap
-// at chirps_per_elev — it overflows to N and only wraps at 6-bit rollover
-// (64).  This caused frame pulses at half the expected rate for N=32.
-reg tx_frame_start_prev;
+// ========== FRAME SYNC USING chirp_counter ==========
+reg [5:0] chirp_counter_prev;
 reg new_frame_pulse;

 always @(posedge clk or negedge reset_n) begin
    if (!reset_n) begin
-        tx_frame_start_prev <= 1'b0;
+        chirp_counter_prev <= 6'd0;
        new_frame_pulse <= 1'b0;
    end else begin
+        // Default: no pulse
        new_frame_pulse <= 1'b0;
        
-        // Edge detect: tx_frame_start is a toggle-CDC derived pulse that
-        // may be 1 clock wide.  Capture rising edge for clean 1-cycle pulse.
-        if (tx_frame_start && !tx_frame_start_prev) begin
-            new_frame_pulse <= 1'b1;
+        // Dynamic frame detection using host_chirps_per_elev.
+        // Detect frame boundary when chirp_counter changes AND is a
+        // multiple of host_chirps_per_elev (0, N, 2N, 3N, ...).
+        // Uses a modulo counter that resets at host_chirps_per_elev.
+        if (chirp_counter != chirp_counter_prev) begin
+            if (chirp_counter == 6'd0 ||
+                chirp_counter == host_chirps_per_elev ||
+                chirp_counter == {host_chirps_per_elev, 1'b0}) begin
+                new_frame_pulse <= 1'b1;
+            end
        end
        
-        tx_frame_start_prev <= tx_frame_start;
+        // Store previous value
+        chirp_counter_prev <= chirp_counter;
    end
 end

@@ -484,6 +457,14 @@ always @(posedge clk or negedge reset_n) begin
            `endif
            chirps_in_current_frame <= 0;
        end
+        
+        // Monitor chirp counter pattern
+        if (chirp_counter != chirp_counter_prev) begin
+            `ifdef SIMULATION
+            $display("[TOP] chirp_counter: %0d ? %0d", 
+                     chirp_counter_prev, chirp_counter);
+            `endif
+        end
    end
 end

@@ -493,9 +474,4 @@ assign dbg_adc_i     = adc_i_scaled;
 assign dbg_adc_q     = adc_q_scaled;
 assign dbg_adc_valid = adc_valid_sync;

-// ========== AGC STATUS OUTPUTS ==========
-assign agc_saturation_count = gc_saturation_count;
-assign agc_peak_magnitude   = gc_peak_magnitude;
-assign agc_current_gain     = gc_current_gain;
-
 endmodule
@@ -125,13 +125,7 @@ module radar_system_top (
    output wire [5:0] dbg_range_bin,
    
    // System status
-    output wire [3:0] system_status,
-
-    // FPGA→STM32 GPIO outputs (DIG_5..DIG_7 on 50T board)
-    // Used by STM32 outer AGC loop to read saturation state without USB polling.
-    output wire gpio_dig5,          // DIG_5 (H11→PD13): AGC saturation flag (1=clipping detected)
-    output wire gpio_dig6,          // DIG_6 (G12→PD14): AGC enable flag (mirrors host_agc_enable)
-    output wire gpio_dig7           // DIG_7 (H12→PD15): reserved (tied low)
+    output wire [3:0] system_status
 );

 // ============================================================================
@@ -142,7 +136,7 @@ module radar_system_top (
 parameter USE_LONG_CHIRP = 1'b1;          // Default to long chirp
 parameter DOPPLER_ENABLE = 1'b1;           // Enable Doppler processing
 parameter USB_ENABLE = 1'b1;               // Enable USB data transfer
-parameter USB_MODE = 1;                    // 0=FT601 (32-bit, 200T), 1=FT2232H (8-bit, 50T production default)
+parameter USB_MODE = 0;                    // 0=FT601 (32-bit, 200T), 1=FT2232H (8-bit, 50T)

 // ============================================================================
 // INTERNAL SIGNALS
@@ -193,11 +187,6 @@ wire [15:0] rx_dbg_adc_i;
 wire [15:0] rx_dbg_adc_q;
 wire        rx_dbg_adc_valid;

-// AGC status from receiver (for status readback and GPIO)
-wire [7:0]  rx_agc_saturation_count;
-wire [7:0]  rx_agc_peak_magnitude;
-wire [3:0]  rx_agc_current_gain;
-
 // Data packing for USB
 wire [31:0] usb_range_profile;
 wire usb_range_valid;
@@ -270,13 +259,6 @@ reg        host_cfar_enable;      // Opcode 0x25: 1=CFAR, 0=simple threshold
 reg        host_mti_enable;       // Opcode 0x26: 1=MTI active, 0=pass-through
 reg [2:0]  host_dc_notch_width;   // Opcode 0x27: DC notch ±width bins (0=off, 1..7)

-// AGC configuration registers (host-configurable via USB, opcodes 0x28-0x2C)
-reg        host_agc_enable;       // Opcode 0x28: 0=manual gain, 1=auto AGC
-reg [7:0]  host_agc_target;       // Opcode 0x29: target peak magnitude (default 200)
-reg [3:0]  host_agc_attack;       // Opcode 0x2A: gain-down step on clipping (default 1)
-reg [3:0]  host_agc_decay;        // Opcode 0x2B: gain-up step when weak (default 1)
-reg [3:0]  host_agc_holdoff;      // Opcode 0x2C: frames to wait before gain-up (default 4)
-
 // Board bring-up self-test registers (opcode 0x30 trigger, 0x31 readback)
 reg        host_self_test_trigger;  // Opcode 0x30: self-clearing pulse
 wire       self_test_busy;
@@ -505,8 +487,6 @@ radar_receiver_final rx_inst (
    
    // Chirp counter from transmitter (CDC-synchronized from 120 MHz domain)
    .chirp_counter(tx_current_chirp_sync),
-    // Frame-start pulse from transmitter (CDC-synchronized toggle→pulse)
-    .tx_frame_start(tx_new_chirp_frame_sync),
    
    // ADC Physical Interface
    .adc_d_p(adc_d_p),
@@ -538,12 +518,6 @@ radar_receiver_final rx_inst (
    .host_chirps_per_elev(host_chirps_per_elev),
    // Fix 3: digital gain control
    .host_gain_shift(host_gain_shift),
-    // AGC configuration (opcodes 0x28-0x2C)
-    .host_agc_enable(host_agc_enable),
-    .host_agc_target(host_agc_target),
-    .host_agc_attack(host_agc_attack),
-    .host_agc_decay(host_agc_decay),
-    .host_agc_holdoff(host_agc_holdoff),
    // STM32 toggle signals for RX mode controller (mode 00 pass-through).
    // These are the raw GPIO inputs — the RX mode controller's edge detectors
    // (inside radar_mode_controller) handle debouncing/edge detection.
@@ -558,11 +532,7 @@ radar_receiver_final rx_inst (
    // ADC debug tap (for self-test / bring-up)
    .dbg_adc_i(rx_dbg_adc_i),
    .dbg_adc_q(rx_dbg_adc_q),
-    .dbg_adc_valid(rx_dbg_adc_valid),
-    // AGC status outputs
-    .agc_saturation_count(rx_agc_saturation_count),
-    .agc_peak_magnitude(rx_agc_peak_magnitude),
-    .agc_current_gain(rx_agc_current_gain)
+    .dbg_adc_valid(rx_dbg_adc_valid)
 );

 // ============================================================================
@@ -774,13 +744,7 @@ if (USB_MODE == 0) begin : gen_ft601
        // Self-test status readback
        .status_self_test_flags(self_test_flags_latched),
        .status_self_test_detail(self_test_detail_latched),
-        .status_self_test_busy(self_test_busy),
-
-        // AGC status readback
-        .status_agc_current_gain(rx_agc_current_gain),
-        .status_agc_peak_magnitude(rx_agc_peak_magnitude),
-        .status_agc_saturation_count(rx_agc_saturation_count),
-        .status_agc_enable(host_agc_enable)
+        .status_self_test_busy(self_test_busy)
    );

    // FT2232H ports unused in FT601 mode — tie off
@@ -841,13 +805,7 @@ end else begin : gen_ft2232h
        // Self-test status readback
        .status_self_test_flags(self_test_flags_latched),
        .status_self_test_detail(self_test_detail_latched),
-        .status_self_test_busy(self_test_busy),
-
-        // AGC status readback
-        .status_agc_current_gain(rx_agc_current_gain),
-        .status_agc_peak_magnitude(rx_agc_peak_magnitude),
-        .status_agc_saturation_count(rx_agc_saturation_count),
-        .status_agc_enable(host_agc_enable)
+        .status_self_test_busy(self_test_busy)
    );

    // FT601 ports unused in FT2232H mode — tie off
@@ -934,12 +892,6 @@ always @(posedge clk_100m_buf or negedge sys_reset_n) begin
        // Ground clutter removal defaults (disabled — backward-compatible)
        host_mti_enable         <= 1'b0;      // MTI off
        host_dc_notch_width     <= 3'd0;      // DC notch off
-        // AGC defaults (disabled — backward-compatible with manual gain)
-        host_agc_enable         <= 1'b0;      // AGC off (manual gain)
-        host_agc_target         <= 8'd200;    // Target peak magnitude
-        host_agc_attack         <= 4'd1;      // 1-step gain-down on clipping
-        host_agc_decay          <= 4'd1;      // 1-step gain-up when weak
-        host_agc_holdoff        <= 4'd4;      // 4 frames before gain-up
        // Self-test defaults
        host_self_test_trigger  <= 1'b0;      // Self-test idle
    end else begin
@@ -984,12 +936,6 @@ always @(posedge clk_100m_buf or negedge sys_reset_n) begin
                // Ground clutter removal opcodes
                8'h26: host_mti_enable         <= usb_cmd_value[0];
                8'h27: host_dc_notch_width     <= usb_cmd_value[2:0];
-                // AGC configuration opcodes
-                8'h28: host_agc_enable         <= usb_cmd_value[0];
-                8'h29: host_agc_target         <= usb_cmd_value[7:0];
-                8'h2A: host_agc_attack         <= usb_cmd_value[3:0];
-                8'h2B: host_agc_decay          <= usb_cmd_value[3:0];
-                8'h2C: host_agc_holdoff        <= usb_cmd_value[3:0];
                // Board bring-up self-test opcodes
                8'h30: host_self_test_trigger  <= 1'b1;  // Trigger self-test
                8'h31: host_status_request     <= 1'b1;  // Self-test readback (status alias)
@@ -1032,18 +978,6 @@ end

 assign system_status = status_reg;

-// ============================================================================
-// FPGA→STM32 GPIO OUTPUTS (DIG_5, DIG_6, DIG_7)
-// ============================================================================
-// DIG_5: AGC saturation flag — high when per-frame saturation_count > 0.
-//        STM32 reads PD13 to detect clipping and adjust ADAR1000 VGA gain.
-// DIG_6: AGC enable flag — mirrors host_agc_enable so STM32 outer-loop AGC
-//        tracks the FPGA register as single source of truth.
-// DIG_7: Reserved (tied low for future use).
-assign gpio_dig5 = (rx_agc_saturation_count != 8'd0);
-assign gpio_dig6 = host_agc_enable;
-assign gpio_dig7 = 1'b0;
-
 // ============================================================================
 // DEBUG AND VERIFICATION
 // ============================================================================
@@ -76,12 +76,7 @@ module radar_system_top_50t (
    output wire ft_rd_n,              // Read strobe (active low)
    output wire ft_wr_n,              // Write strobe (active low)
    output wire ft_oe_n,              // Output enable / bus direction
-    output wire ft_siwu,              // Send Immediate / WakeUp
-
-    // ===== FPGA→STM32 GPIO (Bank 15: 3.3V) =====
-    output wire gpio_dig5,            // DIG_5 (H11→PD13): AGC saturation flag
-    output wire gpio_dig6,            // DIG_6 (G12→PD14): reserved
-    output wire gpio_dig7             // DIG_7 (H12→PD15): reserved
+    output wire ft_siwu               // Send Immediate / WakeUp
 );

    // ===== Tie-off wires for unconstrained FT601 inputs (inactive with USB_MODE=1) =====
@@ -212,12 +207,7 @@ module radar_system_top_50t (
        .dbg_doppler_valid      (dbg_doppler_valid_nc),
        .dbg_doppler_bin        (dbg_doppler_bin_nc),
        .dbg_range_bin          (dbg_range_bin_nc),
-        .system_status          (system_status_nc),
-
-        // ----- FPGA→STM32 GPIO (DIG_5..DIG_7) -----
-        .gpio_dig5              (gpio_dig5),
-        .gpio_dig6              (gpio_dig6),
-        .gpio_dig7              (gpio_dig7)
+        .system_status          (system_status_nc)
    );

 endmodule
@@ -138,12 +138,7 @@ usb_data_interface usb_inst (
    .status_range_mode(2'b01),
    .status_self_test_flags(5'b11111),
    .status_self_test_detail(8'hA5),
-    .status_self_test_busy(1'b0),
-    // AGC status: tie off with benign defaults (no AGC on dev board)
-    .status_agc_current_gain(4'd0),
-    .status_agc_peak_magnitude(8'd0),
-    .status_agc_saturation_count(8'd0),
-    .status_agc_enable(1'b0)
+    .status_self_test_busy(1'b0)
 );

 endmodule
@@ -70,7 +70,6 @@ PROD_RTL=(
    xfft_16.v
    fft_engine.v
    usb_data_interface.v
-    usb_data_interface_ft2232h.v
    edge_detector.v
    radar_mode_controller.v
    rx_gain_control.v
@@ -87,33 +86,6 @@ EXTRA_RTL=(
    frequency_matched_filter.v
 )

-# ---------------------------------------------------------------------------
-# Shared RTL file lists for integration / system tests
-# Centralised here so a new module only needs adding once.
-# ---------------------------------------------------------------------------
-
-# Receiver chain (used by golden generate/compare tests)
-RECEIVER_RTL=(
-    radar_receiver_final.v
-    radar_mode_controller.v
-    tb/ad9484_interface_400m_stub.v
-    ddc_400m.v nco_400m_enhanced.v cic_decimator_4x_enhanced.v
-    cdc_modules.v fir_lowpass.v ddc_input_interface.v
-    chirp_memory_loader_param.v latency_buffer.v
-    matched_filter_multi_segment.v matched_filter_processing_chain.v
-    range_bin_decimator.v doppler_processor.v xfft_16.v fft_engine.v
-    rx_gain_control.v mti_canceller.v
-)
-
-# Full system top (receiver chain + TX + USB + detection + self-test)
-SYSTEM_RTL=(
-    radar_system_top.v
-    radar_transmitter.v dac_interface_single.v plfm_chirp_controller.v
-    "${RECEIVER_RTL[@]}"
-    usb_data_interface.v usb_data_interface_ft2232h.v edge_detector.v
-    cfar_ca.v fpga_self_test.v
-)
-
 # ---- Layer A: iverilog -Wall compilation ----
 run_lint_iverilog() {
    local label="$1"
@@ -247,9 +219,26 @@ run_lint_static() {
        fi
    done

-    # CHECK 5 ($readmemh in synth code) and CHECK 6 (unused includes)
-    # require multi-line ifdef tracking / cross-file analysis. Not feasible
-    # with line-by-line regex. Omitted — use Vivado lint instead.
+    # --- Single-line regex checks across all production RTL ---
+    for f in "$@"; do
+        [[ -f "$f" ]] || continue
+        case "$f" in tb/*) continue ;; esac
+
+        local linenum=0
+        while IFS= read -r line; do
+            linenum=$((linenum + 1))
+
+            # CHECK 5: $readmemh / $readmemb in synthesizable code
+            # (Only valid in simulation blocks — flag if outside `ifdef SIMULATION)
+            # This is hard to check line-by-line without tracking ifdefs.
+            # Skip for v1.
+
+            # CHECK 6: Unused `include files (informational only)
+            # Skip for v1.
+
+            :  # placeholder — prevents empty loop body
+        done < "$f"
+    done

    if [[ "$err_count" -gt 0 ]]; then
        echo -e "${RED}FAIL${NC} ($err_count errors, $warn_count warnings)"
@@ -431,36 +420,57 @@ if [[ "$QUICK" -eq 0 ]]; then
    run_test "Receiver (golden generate)" \
        tb/tb_rx_golden_reg.vvp \
        -DGOLDEN_GENERATE \
-        tb/tb_radar_receiver_final.v "${RECEIVER_RTL[@]}"
+        tb/tb_radar_receiver_final.v radar_receiver_final.v \
+        radar_mode_controller.v tb/ad9484_interface_400m_stub.v \
+        ddc_400m.v nco_400m_enhanced.v cic_decimator_4x_enhanced.v \
+        cdc_modules.v fir_lowpass.v ddc_input_interface.v \
+        chirp_memory_loader_param.v latency_buffer.v \
+        matched_filter_multi_segment.v matched_filter_processing_chain.v \
+        range_bin_decimator.v doppler_processor.v xfft_16.v fft_engine.v \
+        rx_gain_control.v mti_canceller.v

    # Golden compare
    run_test "Receiver (golden compare)" \
        tb/tb_rx_compare_reg.vvp \
-        tb/tb_radar_receiver_final.v "${RECEIVER_RTL[@]}"
+        tb/tb_radar_receiver_final.v radar_receiver_final.v \
+        radar_mode_controller.v tb/ad9484_interface_400m_stub.v \
+        ddc_400m.v nco_400m_enhanced.v cic_decimator_4x_enhanced.v \
+        cdc_modules.v fir_lowpass.v ddc_input_interface.v \
+        chirp_memory_loader_param.v latency_buffer.v \
+        matched_filter_multi_segment.v matched_filter_processing_chain.v \
+        range_bin_decimator.v doppler_processor.v xfft_16.v fft_engine.v \
+        rx_gain_control.v mti_canceller.v

    # Full system top (monitoring-only, legacy)
    run_test "System Top (radar_system_tb)" \
        tb/tb_system_reg.vvp \
-        tb/radar_system_tb.v "${SYSTEM_RTL[@]}"
+        tb/radar_system_tb.v radar_system_top.v \
+        radar_transmitter.v dac_interface_single.v plfm_chirp_controller.v \
+        radar_receiver_final.v tb/ad9484_interface_400m_stub.v \
+        ddc_400m.v nco_400m_enhanced.v cic_decimator_4x_enhanced.v \
+        cdc_modules.v fir_lowpass.v ddc_input_interface.v \
+        chirp_memory_loader_param.v latency_buffer.v \
+        matched_filter_multi_segment.v matched_filter_processing_chain.v \
+        range_bin_decimator.v doppler_processor.v xfft_16.v fft_engine.v \
+        usb_data_interface.v edge_detector.v radar_mode_controller.v \
+        rx_gain_control.v cfar_ca.v mti_canceller.v fpga_self_test.v

    # E2E integration (46 strict checks: TX, RX, USB R/W, CDC, safety, reset)
    run_test "System E2E (tb_system_e2e)" \
        tb/tb_system_e2e_reg.vvp \
-        tb/tb_system_e2e.v "${SYSTEM_RTL[@]}"
-
-    # USB_MODE=1 (FT2232H production) variants of system tests
-    run_test "System Top USB_MODE=1 (FT2232H)" \
-        tb/tb_system_ft2232h_reg.vvp \
-        -DUSB_MODE_1 \
-        tb/radar_system_tb.v "${SYSTEM_RTL[@]}"
-
-    run_test "System E2E USB_MODE=1 (FT2232H)" \
-        tb/tb_system_e2e_ft2232h_reg.vvp \
-        -DUSB_MODE_1 \
-        tb/tb_system_e2e.v "${SYSTEM_RTL[@]}"
+        tb/tb_system_e2e.v radar_system_top.v \
+        radar_transmitter.v dac_interface_single.v plfm_chirp_controller.v \
+        radar_receiver_final.v tb/ad9484_interface_400m_stub.v \
+        ddc_400m.v nco_400m_enhanced.v cic_decimator_4x_enhanced.v \
+        cdc_modules.v fir_lowpass.v ddc_input_interface.v \
+        chirp_memory_loader_param.v latency_buffer.v \
+        matched_filter_multi_segment.v matched_filter_processing_chain.v \
+        range_bin_decimator.v doppler_processor.v xfft_16.v fft_engine.v \
+        usb_data_interface.v edge_detector.v radar_mode_controller.v \
+        rx_gain_control.v cfar_ca.v mti_canceller.v fpga_self_test.v
 else
    echo "  (skipped receiver golden + system top + E2E — use without --quick)"
-    SKIP=$((SKIP + 6))
+    SKIP=$((SKIP + 4))
 fi

 echo ""
@@ -3,32 +3,19 @@
 /**
 * rx_gain_control.v
 *
- * Digital gain control with optional per-frame automatic gain control (AGC)
- * for the receive path. Placed between DDC output and matched filter input.
+ * Host-configurable digital gain control for the receive path.
+ * Placed between DDC output (ddc_input_interface) and matched filter input.
 *
- * Manual mode (agc_enable=0):
- *   - Uses host_gain_shift directly (backward-compatible, no behavioral change)
+ * Features:
+ *   - Bidirectional power-of-2 gain shift (arithmetic shift)
 *   - gain_shift[3]   = direction: 0 = left shift (amplify), 1 = right shift (attenuate)
 *   - gain_shift[2:0] = amount: 0..7 bits
- *   - Symmetric saturation to ±32767 on overflow
+ *   - Symmetric saturation to ±32767 on overflow (left shift only)
+ *   - Saturation counter: 8-bit, counts samples that clipped (wraps at 255)
+ *   - 1-cycle latency, valid-in/valid-out pipeline
+ *   - Zero-overhead pass-through when gain_shift == 0
 *
- * AGC mode (agc_enable=1):
- *   - Per-frame automatic gain adjustment based on peak/saturation metrics
- *   - Internal signed gain: -7 (max attenuation) to +7 (max amplification)
- *   - On frame_boundary:
- *       * If saturation detected: gain -= agc_attack (fast, immediate)
- *       * Else if peak < target after holdoff frames: gain += agc_decay (slow)
- *       * Else: hold current gain
- *   - host_gain_shift serves as initial gain when AGC first enabled
- *
- * Status outputs (for readback via status_words):
- *   - current_gain[3:0]: effective gain_shift encoding (manual or AGC)
- *   - peak_magnitude[7:0]: per-frame peak |sample| (upper 8 bits of 15-bit value)
- *   - saturation_count[7:0]: per-frame clipped sample count (capped at 255)
- *
- * Timing: 1-cycle data latency, valid-in/valid-out pipeline.
- *
- * Insertion point in radar_receiver_final.v:
+ * Intended insertion point in radar_receiver_final.v:
 *   ddc_input_interface → rx_gain_control → matched_filter_multi_segment
 */

@@ -41,75 +28,27 @@ module rx_gain_control (
    input  wire signed [15:0] data_q_in,
    input  wire               valid_in,

-    // Host gain configuration (from USB command opcode 0x16)
-    // [3]=direction: 0=amplify (left shift), 1=attenuate (right shift)
-    // [2:0]=shift amount: 0..7 bits. Default 0x00 = pass-through.
-    // In AGC mode: serves as initial gain on AGC enable transition.
+    // Gain configuration (from host via USB command)
+    // [3]   = direction: 0=amplify (left shift), 1=attenuate (right shift)
+    // [2:0] = shift amount: 0..7 bits
    input  wire [3:0]  gain_shift,

-    // AGC configuration inputs (from host via USB, opcodes 0x28-0x2C)
-    input  wire        agc_enable,     // 0x28: 0=manual gain, 1=auto AGC
-    input  wire [7:0]  agc_target,     // 0x29: target peak magnitude (unsigned, default 200)
-    input  wire [3:0]  agc_attack,     // 0x2A: attenuation step on clipping (default 1)
-    input  wire [3:0]  agc_decay,      // 0x2B: amplification step when weak (default 1)
-    input  wire [3:0]  agc_holdoff,    // 0x2C: frames to wait before gain-up (default 4)
-
-    // Frame boundary pulse (1 clk cycle, from Doppler frame_complete)
-    input  wire        frame_boundary,
-
    // Data output (to matched filter)
    output reg  signed [15:0] data_i_out,
    output reg  signed [15:0] data_q_out,
    output reg                valid_out,

-    // Diagnostics / status readback
-    output reg  [7:0]  saturation_count,  // Per-frame clipped sample count (capped at 255)
-    output reg  [7:0]  peak_magnitude,    // Per-frame peak |sample| (upper 8 bits of 15-bit)
-    output reg  [3:0]  current_gain       // Current effective gain_shift (for status readback)
+    // Diagnostics
+    output reg  [7:0]  saturation_count  // Number of clipped samples (wraps at 255)
 );

-// =========================================================================
-// INTERNAL AGC STATE
-// =========================================================================
+// Decompose gain_shift
+wire       shift_right = gain_shift[3];
+wire [2:0] shift_amt   = gain_shift[2:0];

-// Signed internal gain: -7 (max attenuation) to +7 (max amplification)
-// Stored as 4-bit signed (range -8..+7, clamped to -7..+7)
-reg signed [3:0] agc_gain;
-
-// Holdoff counter: counts frames without saturation before allowing gain-up
-reg [3:0] holdoff_counter;
-
-// Per-frame accumulators (running, reset on frame_boundary)
-reg [7:0]  frame_sat_count;    // Clipped samples this frame
-reg [14:0] frame_peak;         // Peak |sample| this frame (15-bit unsigned)
-
-// Previous AGC enable state (for detecting 0→1 transition)
-reg agc_enable_prev;
-
-// Combinational helpers for inclusive frame-boundary snapshot
-// (used when valid_in and frame_boundary coincide)
-reg wire_frame_sat_incr;
-reg wire_frame_peak_update;
-
-// =========================================================================
-// EFFECTIVE GAIN SELECTION
-// =========================================================================
-
-// Convert between signed internal gain and the gain_shift[3:0] encoding.
-//   gain_shift[3]=0, [2:0]=N → amplify by N bits (internal gain = +N)
-//   gain_shift[3]=1, [2:0]=N → attenuate by N bits (internal gain = -N)
-
-// Effective gain_shift used for the actual shift operation
-wire [3:0] effective_gain;
-assign effective_gain = agc_enable ? current_gain : gain_shift;
-
-// Decompose effective gain for shift logic
-wire       shift_right = effective_gain[3];
-wire [2:0] shift_amt   = effective_gain[2:0];
-
-// =========================================================================
-// COMBINATIONAL SHIFT + SATURATION
-// =========================================================================
+// -------------------------------------------------------------------------
+// Combinational shift + saturation
+// -------------------------------------------------------------------------
 // Use wider intermediates to detect overflow on left shift.
 // 24 bits is enough: 16 + 7 shift = 23 significant bits max.

@@ -130,153 +69,26 @@ wire signed [15:0] sat_i = overflow_i ? (shifted_i[23] ? -16'sd32768 : 16'sd3276
 wire signed [15:0] sat_q = overflow_q ? (shifted_q[23] ? -16'sd32768 : 16'sd32767)
                                      : shifted_q[15:0];

-// =========================================================================
-// PEAK MAGNITUDE TRACKING (combinational)
-// =========================================================================
-// Absolute value of signed 16-bit: flip sign bit if negative.
-// Result is 15-bit unsigned [0, 32767]. (We ignore -32768 → 32767 edge case.)
-wire [14:0] abs_i = data_i_in[15] ? (~data_i_in[14:0] + 15'd1) : data_i_in[14:0];
-wire [14:0] abs_q = data_q_in[15] ? (~data_q_in[14:0] + 15'd1) : data_q_in[14:0];
-wire [14:0] max_iq = (abs_i > abs_q) ? abs_i : abs_q;
-
-// =========================================================================
-// SIGNED GAIN ↔ GAIN_SHIFT ENCODING CONVERSION
-// =========================================================================
-// Convert signed agc_gain to gain_shift[3:0] encoding
-function [3:0] signed_to_encoding;
-    input signed [3:0] g;
-    begin
-        if (g >= 0)
-            signed_to_encoding = {1'b0, g[2:0]};       // amplify
-        else
-            signed_to_encoding = {1'b1, (~g[2:0]) + 3'd1}; // attenuate: -g
-    end
-endfunction
-
-// Convert gain_shift[3:0] encoding to signed gain
-function signed [3:0] encoding_to_signed;
-    input [3:0] enc;
-    begin
-        if (enc[3] == 1'b0)
-            encoding_to_signed = {1'b0, enc[2:0]};     // +0..+7
-        else
-            encoding_to_signed = -$signed({1'b0, enc[2:0]}); // -1..-7
-    end
-endfunction
-
-// =========================================================================
-// CLAMPING HELPER
-// =========================================================================
-// Clamp a wider signed value to [-7, +7]
-function signed [3:0] clamp_gain;
-    input signed [4:0] val;  // 5-bit to handle overflow from add
-    begin
-        if (val > 5'sd7)
-            clamp_gain = 4'sd7;
-        else if (val < -5'sd7)
-            clamp_gain = -4'sd7;
-        else
-            clamp_gain = val[3:0];
-    end
-endfunction
-
-// =========================================================================
-// REGISTERED OUTPUT + AGC STATE MACHINE
-// =========================================================================
+// -------------------------------------------------------------------------
+// Registered output stage (1-cycle latency)
+// -------------------------------------------------------------------------
 always @(posedge clk or negedge reset_n) begin
    if (!reset_n) begin
-        // Data path
        data_i_out       <= 16'sd0;
        data_q_out       <= 16'sd0;
        valid_out        <= 1'b0;
-        // Status outputs
        saturation_count <= 8'd0;
-        peak_magnitude   <= 8'd0;
-        current_gain     <= 4'd0;
-        // AGC internal state
-        agc_gain         <= 4'sd0;
-        holdoff_counter  <= 4'd0;
-        frame_sat_count  <= 8'd0;
-        frame_peak       <= 15'd0;
-        agc_enable_prev  <= 1'b0;
    end else begin
-        // Track AGC enable transitions
-        agc_enable_prev <= agc_enable;
-
-        // Compute inclusive metrics: if valid_in fires this cycle,
-        // include current sample in the snapshot taken at frame_boundary.
-        // This avoids losing the last sample when valid_in and
-        // frame_boundary coincide (NBA last-write-wins would otherwise
-        // snapshot stale values then reset, dropping the sample entirely).
-        wire_frame_sat_incr = (valid_in && (overflow_i || overflow_q)
-                               && (frame_sat_count != 8'hFF));
-        wire_frame_peak_update = (valid_in && (max_iq > frame_peak));
-
-        // ---- Data pipeline (1-cycle latency) ----
        valid_out <= valid_in;
+
        if (valid_in) begin
            data_i_out <= sat_i;
            data_q_out <= sat_q;

-            // Per-frame saturation counting
-            if ((overflow_i || overflow_q) && (frame_sat_count != 8'hFF))
-                frame_sat_count <= frame_sat_count + 8'd1;
-
-            // Per-frame peak tracking (pre-gain, measures input signal level)
-            if (max_iq > frame_peak)
-                frame_peak <= max_iq;
+            // Count clipped samples (either channel clipping counts as 1)
+            if ((overflow_i || overflow_q) && (saturation_count != 8'hFF))
+                saturation_count <= saturation_count + 8'd1;
        end
-
-        // ---- Frame boundary: AGC update + metric snapshot ----
-        if (frame_boundary) begin
-            // Snapshot per-frame metrics INCLUDING current sample if valid_in
-            saturation_count <= wire_frame_sat_incr
-                                ? (frame_sat_count + 8'd1)
-                                : frame_sat_count;
-            peak_magnitude   <= wire_frame_peak_update
-                                ? max_iq[14:7]
-                                : frame_peak[14:7];
-
-            // Reset per-frame accumulators for next frame
-            frame_sat_count <= 8'd0;
-            frame_peak      <= 15'd0;
-
-            if (agc_enable) begin
-                // AGC auto-adjustment at frame boundary
-                // Use inclusive counts/peaks (accounting for simultaneous valid_in)
-                if (wire_frame_sat_incr || frame_sat_count > 8'd0) begin
-                    // Clipping detected: reduce gain immediately (attack)
-                    agc_gain <= clamp_gain($signed({agc_gain[3], agc_gain}) -
-                                           $signed({1'b0, agc_attack}));
-                    holdoff_counter <= agc_holdoff;  // Reset holdoff
-                end else if ((wire_frame_peak_update ? max_iq[14:7] : frame_peak[14:7])
-                             < agc_target) begin
-                    // Signal too weak: increase gain after holdoff expires
-                    if (holdoff_counter == 4'd0) begin
-                        agc_gain <= clamp_gain($signed({agc_gain[3], agc_gain}) +
-                                               $signed({1'b0, agc_decay}));
-                    end else begin
-                        holdoff_counter <= holdoff_counter - 4'd1;
-                    end
-                end else begin
-                    // Signal in good range, no saturation: hold gain
-                    // Reset holdoff so next weak frame has to wait again
-                    holdoff_counter <= agc_holdoff;
-                end
-            end
-        end
-
-        // ---- AGC enable transition: initialize from host gain ----
-        if (agc_enable && !agc_enable_prev) begin
-            agc_gain        <= encoding_to_signed(gain_shift);
-            holdoff_counter <= agc_holdoff;
-        end
-
-        // ---- Update current_gain output ----
-        if (agc_enable)
-            current_gain <= signed_to_encoding(agc_gain);
-        else
-            current_gain <= gain_shift;
    end
 end

@@ -108,9 +108,6 @@ add_files -fileset constrs_1 -norecurse [file join $project_root "constraints" "

 set_property top $top_module [current_fileset]
 set_property verilog_define {FFT_XPM_BRAM} [current_fileset]
-# Override USB_MODE to 0 (FT601) for 200T premium board.
-# The RTL default is USB_MODE=1 (FT2232H, production 50T).
-set_property generic {USB_MODE=0} [current_fileset]

 # ==============================================================================
 # 2. Synthesis
@@ -120,10 +120,9 @@ set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets {ft_clkout_IBUF}]

 # ---- Run implementation steps ----
 opt_design -directive Explore
-place_design -directive ExtraNetDelay_high
-phys_opt_design -directive AggressiveExplore
-route_design -directive AggressiveExplore
+place_design -directive Explore
 phys_opt_design -directive AggressiveExplore
+route_design -directive Explore
 phys_opt_design -directive AggressiveExplore

 set impl_elapsed [expr {[clock seconds] - $impl_start}]
@@ -1,449 +0,0 @@
-#!/usr/bin/env python3
-"""
-Co-simulation Comparison: RTL vs Python Model for AERIS-10 DDC Chain.
-
-Reads the ADC hex test vectors, runs them through the bit-accurate Python
-model (fpga_model.py), then compares the output against the RTL simulation
-CSV (from tb_ddc_cosim.v).
-
-Key considerations:
-  - The RTL DDC has LFSR phase dithering on the NCO FTW, so exact bit-match
-    is not expected. We use statistical metrics (correlation, RMS error).
-  - The CDC (gray-coded 400→100 MHz crossing) may introduce non-deterministic
-    latency offsets. We auto-align using cross-correlation.
-  - The comparison reports pass/fail based on configurable thresholds.
-
-Usage:
-    python3 compare.py [scenario]
-
-    scenario: dc, single_target, multi_target, noise_only, sine_1mhz
-              (default: dc)
-
-Author: Phase 0.5 co-simulation suite for PLFM_RADAR
-"""
-
-import math
-import os
-import sys
-
-# Add this directory to path for imports
-sys.path.insert(0, os.path.dirname(os.path.abspath(__file__)))
-
-from fpga_model import SignalChain
-
-
-# =============================================================================
-# Configuration
-# =============================================================================
-
-# Thresholds for pass/fail
-# These are generous because of LFSR dithering and CDC latency jitter
-MAX_RMS_ERROR_LSB = 50.0     # Max RMS error in 18-bit LSBs
-MIN_CORRELATION = 0.90        # Min Pearson correlation coefficient
-MAX_LATENCY_DRIFT = 15        # Max latency offset between RTL and model (samples)
-MAX_COUNT_DIFF = 20           # Max output count difference (LFSR dithering affects CIC timing)
-
-# Scenarios
-SCENARIOS = {
-    'dc': {
-        'adc_hex': 'adc_dc.hex',
-        'rtl_csv': 'rtl_bb_dc.csv',
-        'description': 'DC input (ADC=128)',
-        # DC input: expect small outputs, but LFSR dithering adds ~+128 LSB
-        # average bias to NCO FTW which accumulates through CIC integrators
-        # as a small DC offset (~15-20 LSB in baseband). This is expected.
-        'max_rms': 25.0,        # Relaxed to account for LFSR dithering bias
-        'min_corr': -1.0,       # Correlation not meaningful for near-zero
-    },
-    'single_target': {
-        'adc_hex': 'adc_single_target.hex',
-        'rtl_csv': 'rtl_bb_single_target.csv',
-        'description': 'Single target at 500m',
-        'max_rms': MAX_RMS_ERROR_LSB,
-        'min_corr': -1.0,       # Correlation not meaningful with LFSR dithering
-    },
-    'multi_target': {
-        'adc_hex': 'adc_multi_target.hex',
-        'rtl_csv': 'rtl_bb_multi_target.csv',
-        'description': 'Multi-target (5 targets)',
-        'max_rms': MAX_RMS_ERROR_LSB,
-        'min_corr': -1.0,       # Correlation not meaningful with LFSR dithering
-    },
-    'noise_only': {
-        'adc_hex': 'adc_noise_only.hex',
-        'rtl_csv': 'rtl_bb_noise_only.csv',
-        'description': 'Noise only',
-        'max_rms': MAX_RMS_ERROR_LSB,
-        'min_corr': -1.0,       # Correlation not meaningful with LFSR dithering
-    },
-    'sine_1mhz': {
-        'adc_hex': 'adc_sine_1mhz.hex',
-        'rtl_csv': 'rtl_bb_sine_1mhz.csv',
-        'description': '1 MHz sine wave',
-        'max_rms': MAX_RMS_ERROR_LSB,
-        'min_corr': -1.0,       # Correlation not meaningful with LFSR dithering
-    },
-}
-
-
-# =============================================================================
-# Helper functions
-# =============================================================================
-
-def load_adc_hex(filepath):
-    """Load 8-bit unsigned ADC samples from hex file."""
-    samples = []
-    with open(filepath) as f:
-        for line in f:
-            line = line.strip()
-            if not line or line.startswith('//'):
-                continue
-            samples.append(int(line, 16))
-    return samples
-
-
-def load_rtl_csv(filepath):
-    """Load RTL baseband output CSV (sample_idx, baseband_i, baseband_q)."""
-    bb_i = []
-    bb_q = []
-    with open(filepath) as f:
-        f.readline()  # Skip header
-        for line in f:
-            line = line.strip()
-            if not line:
-                continue
-            parts = line.split(',')
-            bb_i.append(int(parts[1]))
-            bb_q.append(int(parts[2]))
-    return bb_i, bb_q
-
-
-def run_python_model(adc_samples):
-    """Run ADC samples through the Python DDC model.
-
-    Returns the 18-bit FIR outputs (not the 16-bit DDC interface outputs),
-    because the RTL testbench captures the FIR output directly
-    (baseband_i_reg <= fir_i_out in ddc_400m.v).
-    """
-
-    chain = SignalChain()
-    result = chain.process_adc_block(adc_samples)
-
-    # Use fir_i_raw / fir_q_raw (18-bit) to match RTL's baseband output
-    # which is the FIR output before DDC interface 18->16 rounding
-    bb_i = result['fir_i_raw']
-    bb_q = result['fir_q_raw']
-
-    return bb_i, bb_q
-
-
-def compute_rms_error(a, b):
-    """Compute RMS error between two equal-length lists."""
-    if len(a) != len(b):
-        raise ValueError(f"Length mismatch: {len(a)} vs {len(b)}")
-    if len(a) == 0:
-        return 0.0
-    sum_sq = sum((x - y) ** 2 for x, y in zip(a, b, strict=False))
-    return math.sqrt(sum_sq / len(a))
-
-
-def compute_max_abs_error(a, b):
-    """Compute maximum absolute error between two equal-length lists."""
-    if len(a) != len(b) or len(a) == 0:
-        return 0
-    return max(abs(x - y) for x, y in zip(a, b, strict=False))
-
-
-def compute_correlation(a, b):
-    """Compute Pearson correlation coefficient."""
-    n = len(a)
-    if n < 2:
-        return 0.0
-
-    mean_a = sum(a) / n
-    mean_b = sum(b) / n
-
-    cov = sum((a[i] - mean_a) * (b[i] - mean_b) for i in range(n))
-    std_a_sq = sum((x - mean_a) ** 2 for x in a)
-    std_b_sq = sum((x - mean_b) ** 2 for x in b)
-
-    if std_a_sq < 1e-10 or std_b_sq < 1e-10:
-        # Near-zero variance (e.g., DC input)
-        return 1.0 if abs(mean_a - mean_b) < 1.0 else 0.0
-
-    return cov / math.sqrt(std_a_sq * std_b_sq)
-
-
-def cross_correlate_lag(a, b, max_lag=20):
-    """
-    Find the lag that maximizes cross-correlation between a and b.
-    Returns (best_lag, best_correlation) where positive lag means b is delayed.
-    """
-    n = min(len(a), len(b))
-    if n < 10:
-        return 0, 0.0
-
-    best_lag = 0
-    best_corr = -2.0
-
-    for lag in range(-max_lag, max_lag + 1):
-        # Align: a[start_a:end_a] vs b[start_b:end_b]
-        if lag >= 0:
-            start_a = lag
-            start_b = 0
-        else:
-            start_a = 0
-            start_b = -lag
-
-        end = min(len(a) - start_a, len(b) - start_b)
-        if end < 10:
-            continue
-
-        seg_a = a[start_a:start_a + end]
-        seg_b = b[start_b:start_b + end]
-
-        corr = compute_correlation(seg_a, seg_b)
-        if corr > best_corr:
-            best_corr = corr
-            best_lag = lag
-
-    return best_lag, best_corr
-
-
-def compute_signal_stats(samples):
-    """Compute basic statistics of a signal."""
-    if not samples:
-        return {'mean': 0, 'rms': 0, 'min': 0, 'max': 0, 'count': 0}
-    n = len(samples)
-    mean = sum(samples) / n
-    rms = math.sqrt(sum(x * x for x in samples) / n)
-    return {
-        'mean': mean,
-        'rms': rms,
-        'min': min(samples),
-        'max': max(samples),
-        'count': n,
-    }
-
-
-# =============================================================================
-# Main comparison
-# =============================================================================
-
-def compare_scenario(scenario_name):
-    """Run comparison for one scenario. Returns True if passed."""
-    if scenario_name not in SCENARIOS:
-        return False
-
-    cfg = SCENARIOS[scenario_name]
-    base_dir = os.path.dirname(os.path.abspath(__file__))
-
-
-    # ---- Load ADC data ----
-    adc_path = os.path.join(base_dir, cfg['adc_hex'])
-    if not os.path.exists(adc_path):
-        return False
-    adc_samples = load_adc_hex(adc_path)
-
-    # ---- Load RTL output ----
-    rtl_path = os.path.join(base_dir, cfg['rtl_csv'])
-    if not os.path.exists(rtl_path):
-        return False
-    rtl_i, rtl_q = load_rtl_csv(rtl_path)
-
-    # ---- Run Python model ----
-    py_i, py_q = run_python_model(adc_samples)
-
-    # ---- Length comparison ----
-    len_diff = abs(len(rtl_i) - len(py_i))
-
-    # ---- Signal statistics ----
-    rtl_i_stats = compute_signal_stats(rtl_i)
-    rtl_q_stats = compute_signal_stats(rtl_q)
-    py_i_stats = compute_signal_stats(py_i)
-    py_q_stats = compute_signal_stats(py_q)
-
-
-    # ---- Trim to common length ----
-    common_len = min(len(rtl_i), len(py_i))
-    if common_len < 10:
-        return False
-
-    rtl_i_trim = rtl_i[:common_len]
-    rtl_q_trim = rtl_q[:common_len]
-    py_i_trim = py_i[:common_len]
-    py_q_trim = py_q[:common_len]
-
-    # ---- Cross-correlation to find latency offset ----
-    lag_i, _corr_i = cross_correlate_lag(rtl_i_trim, py_i_trim,
-                                        max_lag=MAX_LATENCY_DRIFT)
-    lag_q, _corr_q = cross_correlate_lag(rtl_q_trim, py_q_trim,
-                                        max_lag=MAX_LATENCY_DRIFT)
-
-    # ---- Apply latency correction ----
-    best_lag = lag_i  # Use I-channel lag (should be same as Q)
-    if abs(lag_i - lag_q) > 1:
-        # Use the average
-        best_lag = (lag_i + lag_q) // 2
-
-    if best_lag > 0:
-        # RTL is delayed relative to Python
-        aligned_rtl_i = rtl_i_trim[best_lag:]
-        aligned_rtl_q = rtl_q_trim[best_lag:]
-        aligned_py_i = py_i_trim[:len(aligned_rtl_i)]
-        aligned_py_q = py_q_trim[:len(aligned_rtl_q)]
-    elif best_lag < 0:
-        # Python is delayed relative to RTL
-        aligned_py_i = py_i_trim[-best_lag:]
-        aligned_py_q = py_q_trim[-best_lag:]
-        aligned_rtl_i = rtl_i_trim[:len(aligned_py_i)]
-        aligned_rtl_q = rtl_q_trim[:len(aligned_py_q)]
-    else:
-        aligned_rtl_i = rtl_i_trim
-        aligned_rtl_q = rtl_q_trim
-        aligned_py_i = py_i_trim
-        aligned_py_q = py_q_trim
-
-    aligned_len = min(len(aligned_rtl_i), len(aligned_py_i))
-    aligned_rtl_i = aligned_rtl_i[:aligned_len]
-    aligned_rtl_q = aligned_rtl_q[:aligned_len]
-    aligned_py_i = aligned_py_i[:aligned_len]
-    aligned_py_q = aligned_py_q[:aligned_len]
-
-
-    # ---- Error metrics (after alignment) ----
-    rms_i = compute_rms_error(aligned_rtl_i, aligned_py_i)
-    rms_q = compute_rms_error(aligned_rtl_q, aligned_py_q)
-    compute_max_abs_error(aligned_rtl_i, aligned_py_i)
-    compute_max_abs_error(aligned_rtl_q, aligned_py_q)
-    corr_i_aligned = compute_correlation(aligned_rtl_i, aligned_py_i)
-    corr_q_aligned = compute_correlation(aligned_rtl_q, aligned_py_q)
-
-
-    # ---- First/last sample comparison ----
-    for k in range(min(10, aligned_len)):
-        ei = aligned_rtl_i[k] - aligned_py_i[k]
-        eq = aligned_rtl_q[k] - aligned_py_q[k]
-
-    # ---- Write detailed comparison CSV ----
-    compare_csv_path = os.path.join(base_dir, f"compare_{scenario_name}.csv")
-    with open(compare_csv_path, 'w') as f:
-        f.write("idx,rtl_i,py_i,err_i,rtl_q,py_q,err_q\n")
-        for k in range(aligned_len):
-            ei = aligned_rtl_i[k] - aligned_py_i[k]
-            eq = aligned_rtl_q[k] - aligned_py_q[k]
-            f.write(f"{k},{aligned_rtl_i[k]},{aligned_py_i[k]},{ei},"
-                    f"{aligned_rtl_q[k]},{aligned_py_q[k]},{eq}\n")
-
-    # ---- Pass/Fail ----
-    max_rms = cfg.get('max_rms', MAX_RMS_ERROR_LSB)
-    min_corr = cfg.get('min_corr', MIN_CORRELATION)
-
-    results = []
-
-    # Check 1: Output count sanity
-    count_ok = len_diff <= MAX_COUNT_DIFF
-    results.append(('Output count match', count_ok,
-                     f"diff={len_diff} <= {MAX_COUNT_DIFF}"))
-
-    # Check 2: RMS amplitude ratio (RTL vs Python should have same power)
-    # The LFSR dithering randomizes sample phases but preserves overall
-    # signal power, so RMS amplitudes should match within ~10%.
-    rtl_rms = max(rtl_i_stats['rms'], rtl_q_stats['rms'])
-    py_rms = max(py_i_stats['rms'], py_q_stats['rms'])
-    if py_rms > 1.0 and rtl_rms > 1.0:
-        rms_ratio = max(rtl_rms, py_rms) / min(rtl_rms, py_rms)
-        rms_ratio_ok = rms_ratio <= 1.20  # Within 20%
-        results.append(('RMS amplitude ratio', rms_ratio_ok,
-                         f"ratio={rms_ratio:.3f} <= 1.20"))
-    else:
-        # Near-zero signals (DC input): check absolute RMS error
-        rms_ok = max(rms_i, rms_q) <= max_rms
-        results.append(('RMS error (low signal)', rms_ok,
-                         f"max(I={rms_i:.2f}, Q={rms_q:.2f}) <= {max_rms:.1f}"))
-
-    # Check 3: Mean DC offset match
-    # Both should have similar DC bias. For large signals (where LFSR dithering
-    # causes the NCO to walk in phase), allow the mean to differ proportionally
-    # to the signal RMS. Use max(30 LSB, 3% of signal RMS).
-    mean_err_i = abs(rtl_i_stats['mean'] - py_i_stats['mean'])
-    mean_err_q = abs(rtl_q_stats['mean'] - py_q_stats['mean'])
-    max_mean_err = max(mean_err_i, mean_err_q)
-    signal_rms = max(rtl_rms, py_rms)
-    mean_threshold = max(30.0, signal_rms * 0.03)  # 3% of signal RMS or 30 LSB
-    mean_ok = max_mean_err <= mean_threshold
-    results.append(('Mean DC offset match', mean_ok,
-                     f"max_diff={max_mean_err:.1f} <= {mean_threshold:.1f}"))
-
-    # Check 4: Correlation (skip for near-zero signals or dithered scenarios)
-    if min_corr > -0.5:
-        corr_ok = min(corr_i_aligned, corr_q_aligned) >= min_corr
-        results.append(('Correlation', corr_ok,
-                         f"min(I={corr_i_aligned:.4f}, Q={corr_q_aligned:.4f}) >= {min_corr:.2f}"))
-
-    # Check 5: Dynamic range match
-    # Peak amplitudes should be in the same ballpark
-    rtl_peak = max(abs(rtl_i_stats['min']), abs(rtl_i_stats['max']),
-                   abs(rtl_q_stats['min']), abs(rtl_q_stats['max']))
-    py_peak = max(abs(py_i_stats['min']), abs(py_i_stats['max']),
-                  abs(py_q_stats['min']), abs(py_q_stats['max']))
-    if py_peak > 10 and rtl_peak > 10:
-        peak_ratio = max(rtl_peak, py_peak) / min(rtl_peak, py_peak)
-        peak_ok = peak_ratio <= 1.50  # Within 50%
-        results.append(('Peak amplitude ratio', peak_ok,
-                         f"ratio={peak_ratio:.3f} <= 1.50"))
-
-    # Check 6: Latency offset
-    lag_ok = abs(best_lag) <= MAX_LATENCY_DRIFT
-    results.append(('Latency offset', lag_ok,
-                     f"|{best_lag}| <= {MAX_LATENCY_DRIFT}"))
-
-    # ---- Report ----
-    all_pass = True
-    for _name, ok, _detail in results:
-        if not ok:
-            all_pass = False
-
-    if all_pass:
-        pass
-    else:
-        pass
-
-    return all_pass
-
-
-def main():
-    """Run comparison for specified scenario(s)."""
-    if len(sys.argv) > 1:
-        scenario = sys.argv[1]
-        if scenario == 'all':
-            # Run all scenarios that have RTL CSV files
-            base_dir = os.path.dirname(os.path.abspath(__file__))
-            overall_pass = True
-            run_count = 0
-            pass_count = 0
-            for name, cfg in SCENARIOS.items():
-                rtl_path = os.path.join(base_dir, cfg['rtl_csv'])
-                if os.path.exists(rtl_path):
-                    ok = compare_scenario(name)
-                    run_count += 1
-                    if ok:
-                        pass_count += 1
-                    else:
-                        overall_pass = False
-                else:
-                    pass
-
-            if overall_pass:
-                pass
-            else:
-                pass
-            return 0 if overall_pass else 1
-        ok = compare_scenario(scenario)
-        return 0 if ok else 1
-    ok = compare_scenario('dc')
-    return 0 if ok else 1
-
-
-if __name__ == '__main__':
-    sys.exit(main())
@@ -1,340 +0,0 @@
-#!/usr/bin/env python3
-"""
-Co-simulation Comparison: RTL vs Python Model for AERIS-10 Doppler Processor.
-
-Compares the RTL Doppler output (from tb_doppler_cosim.v) against the Python
-model golden reference (from gen_doppler_golden.py).
-
-After fixing the windowing pipeline bugs in doppler_processor.v (BRAM address
-alignment and pipeline staging), the RTL achieves BIT-PERFECT match with the
-Python model.  The comparison checks:
-  1. Per-range-bin peak Doppler bin agreement (100% required)
-  2. Per-range-bin I/Q correlation (1.0 expected)
-  3. Per-range-bin magnitude spectrum correlation (1.0 expected)
-  4. Global output energy (exact match expected)
-
-Usage:
-    python3 compare_doppler.py [scenario|all]
-
-    scenario: stationary, moving, two_targets (default: stationary)
-    all: run all scenarios
-
-Author: Phase 0.5 Doppler co-simulation suite for PLFM_RADAR
-"""
-
-import math
-import os
-import sys
-
-sys.path.insert(0, os.path.dirname(os.path.abspath(__file__)))
-
-
-# =============================================================================
-# Configuration
-# =============================================================================
-
-DOPPLER_FFT = 32
-RANGE_BINS = 64
-TOTAL_OUTPUTS = RANGE_BINS * DOPPLER_FFT  # 2048
-SUBFRAME_SIZE = 16
-
-SCENARIOS = {
-    'stationary': {
-        'golden_csv': 'doppler_golden_py_stationary.csv',
-        'rtl_csv': 'rtl_doppler_stationary.csv',
-        'description': 'Single stationary target at ~500m',
-    },
-    'moving': {
-        'golden_csv': 'doppler_golden_py_moving.csv',
-        'rtl_csv': 'rtl_doppler_moving.csv',
-        'description': 'Single moving target v=15m/s',
-    },
-    'two_targets': {
-        'golden_csv': 'doppler_golden_py_two_targets.csv',
-        'rtl_csv': 'rtl_doppler_two_targets.csv',
-        'description': 'Two targets at different ranges/velocities',
-    },
-}
-
-# Pass/fail thresholds — BIT-PERFECT match expected after pipeline fix
-PEAK_AGREEMENT_MIN = 1.00     # 100% peak Doppler bin agreement required
-MAG_CORR_MIN = 0.99           # Near-perfect magnitude correlation required
-ENERGY_RATIO_MIN = 0.999      # Energy ratio must be ~1.0 (bit-perfect)
-ENERGY_RATIO_MAX = 1.001      # Energy ratio must be ~1.0 (bit-perfect)
-
-
-# =============================================================================
-# Helper functions
-# =============================================================================
-
-def load_doppler_csv(filepath):
-    """
-    Load Doppler output CSV with columns (range_bin, doppler_bin, out_i, out_q).
-    Returns dict: {rbin: [(dbin, i, q), ...]}
-    """
-    data = {}
-    with open(filepath) as f:
-        f.readline()  # Skip header
-        for line in f:
-            line = line.strip()
-            if not line:
-                continue
-            parts = line.split(',')
-            rbin = int(parts[0])
-            dbin = int(parts[1])
-            i_val = int(parts[2])
-            q_val = int(parts[3])
-            if rbin not in data:
-                data[rbin] = []
-            data[rbin].append((dbin, i_val, q_val))
-    return data
-
-
-def extract_iq_arrays(data_dict, rbin):
-    """Extract I and Q arrays for a given range bin, ordered by doppler bin."""
-    if rbin not in data_dict:
-        return [0] * DOPPLER_FFT, [0] * DOPPLER_FFT
-    entries = sorted(data_dict[rbin], key=lambda x: x[0])
-    i_arr = [e[1] for e in entries]
-    q_arr = [e[2] for e in entries]
-    return i_arr, q_arr
-
-
-def pearson_correlation(a, b):
-    """Compute Pearson correlation coefficient."""
-    n = len(a)
-    if n < 2:
-        return 0.0
-    mean_a = sum(a) / n
-    mean_b = sum(b) / n
-    cov = sum((a[i] - mean_a) * (b[i] - mean_b) for i in range(n))
-    std_a_sq = sum((x - mean_a) ** 2 for x in a)
-    std_b_sq = sum((x - mean_b) ** 2 for x in b)
-    if std_a_sq < 1e-10 or std_b_sq < 1e-10:
-        return 1.0 if abs(mean_a - mean_b) < 1.0 else 0.0
-    return cov / math.sqrt(std_a_sq * std_b_sq)
-
-
-def magnitude_l1(i_arr, q_arr):
-    """L1 magnitude: |I| + |Q|."""
-    return [abs(i) + abs(q) for i, q in zip(i_arr, q_arr, strict=False)]
-
-
-def find_peak_bin(i_arr, q_arr):
-    """Find bin with max L1 magnitude."""
-    mags = magnitude_l1(i_arr, q_arr)
-    return max(range(len(mags)), key=lambda k: mags[k])
-
-
-def peak_bins_match(py_peak, rtl_peak):
-    """Return True if peaks match within +/-1 bin inside the same sub-frame."""
-    py_sf = py_peak // SUBFRAME_SIZE
-    rtl_sf = rtl_peak // SUBFRAME_SIZE
-    if py_sf != rtl_sf:
-        return False
-
-    py_bin = py_peak % SUBFRAME_SIZE
-    rtl_bin = rtl_peak % SUBFRAME_SIZE
-    diff = abs(py_bin - rtl_bin)
-    return diff <= 1 or diff >= SUBFRAME_SIZE - 1
-
-
-def total_energy(data_dict):
-    """Sum of I^2 + Q^2 across all range bins and Doppler bins."""
-    total = 0
-    for rbin in data_dict:
-        for (_dbin, i_val, q_val) in data_dict[rbin]:
-            total += i_val * i_val + q_val * q_val
-    return total
-
-
-# =============================================================================
-# Scenario comparison
-# =============================================================================
-
-def compare_scenario(name, config, base_dir):
-    """Compare one Doppler scenario. Returns (passed, result_dict)."""
-
-    golden_path = os.path.join(base_dir, config['golden_csv'])
-    rtl_path = os.path.join(base_dir, config['rtl_csv'])
-
-    if not os.path.exists(golden_path):
-        return False, {}
-    if not os.path.exists(rtl_path):
-        return False, {}
-
-    py_data = load_doppler_csv(golden_path)
-    rtl_data = load_doppler_csv(rtl_path)
-
-    sorted(py_data.keys())
-    sorted(rtl_data.keys())
-
-
-    # ---- Check 1: Both have data ----
-    py_total = sum(len(v) for v in py_data.values())
-    rtl_total = sum(len(v) for v in rtl_data.values())
-    if py_total == 0 or rtl_total == 0:
-        return False, {}
-
-    # ---- Check 2: Output count ----
-    count_ok = (rtl_total == TOTAL_OUTPUTS)
-
-    # ---- Check 3: Global energy ----
-    py_energy = total_energy(py_data)
-    rtl_energy = total_energy(rtl_data)
-    if py_energy > 0:
-        energy_ratio = rtl_energy / py_energy
-    else:
-        energy_ratio = 1.0 if rtl_energy == 0 else float('inf')
-
-
-    # ---- Check 4: Per-range-bin analysis ----
-    peak_agreements = 0
-    mag_correlations = []
-    i_correlations = []
-    q_correlations = []
-
-    peak_details = []
-
-    for rbin in range(RANGE_BINS):
-        py_i, py_q = extract_iq_arrays(py_data, rbin)
-        rtl_i, rtl_q = extract_iq_arrays(rtl_data, rbin)
-
-        py_peak = find_peak_bin(py_i, py_q)
-        rtl_peak = find_peak_bin(rtl_i, rtl_q)
-
-        # Peak agreement (allow +/-1 bin tolerance, but only within a sub-frame)
-        if peak_bins_match(py_peak, rtl_peak):
-            peak_agreements += 1
-
-        py_mag = magnitude_l1(py_i, py_q)
-        rtl_mag = magnitude_l1(rtl_i, rtl_q)
-
-        mag_corr = pearson_correlation(py_mag, rtl_mag)
-        corr_i = pearson_correlation(py_i, rtl_i)
-        corr_q = pearson_correlation(py_q, rtl_q)
-
-        mag_correlations.append(mag_corr)
-        i_correlations.append(corr_i)
-        q_correlations.append(corr_q)
-
-        py_rbin_energy = sum(i*i + q*q for i, q in zip(py_i, py_q, strict=False))
-        rtl_rbin_energy = sum(i*i + q*q for i, q in zip(rtl_i, rtl_q, strict=False))
-
-        peak_details.append({
-            'rbin': rbin,
-            'py_peak': py_peak,
-            'rtl_peak': rtl_peak,
-            'mag_corr': mag_corr,
-            'corr_i': corr_i,
-            'corr_q': corr_q,
-            'py_energy': py_rbin_energy,
-            'rtl_energy': rtl_rbin_energy,
-        })
-
-    peak_agreement_frac = peak_agreements / RANGE_BINS
-    avg_mag_corr = sum(mag_correlations) / len(mag_correlations)
-    avg_corr_i = sum(i_correlations) / len(i_correlations)
-    avg_corr_q = sum(q_correlations) / len(q_correlations)
-
-
-    # Show top 5 range bins by Python energy
-    top_rbins = sorted(peak_details, key=lambda x: -x['py_energy'])[:5]
-    for _d in top_rbins:
-        pass
-
-    # ---- Pass/Fail ----
-    checks = []
-
-    checks.append(('RTL output count == 2048', count_ok))
-
-    energy_ok = (ENERGY_RATIO_MIN < energy_ratio < ENERGY_RATIO_MAX)
-    checks.append((f'Energy ratio in bounds '
-                    f'({ENERGY_RATIO_MIN}-{ENERGY_RATIO_MAX})', energy_ok))
-
-    peak_ok = (peak_agreement_frac >= PEAK_AGREEMENT_MIN)
-    checks.append((f'Peak agreement >= {PEAK_AGREEMENT_MIN:.0%}', peak_ok))
-
-    # For range bins with significant energy, check magnitude correlation
-    high_energy_rbins = [d for d in peak_details
-                         if d['py_energy'] > py_energy / (RANGE_BINS * 10)]
-    if high_energy_rbins:
-        he_mag_corr = sum(d['mag_corr'] for d in high_energy_rbins) / len(high_energy_rbins)
-        he_ok = (he_mag_corr >= MAG_CORR_MIN)
-        checks.append((f'High-energy rbin avg mag_corr >= {MAG_CORR_MIN:.2f} '
-                        f'(actual={he_mag_corr:.3f})', he_ok))
-
-    all_pass = True
-    for _check_name, passed in checks:
-        if not passed:
-            all_pass = False
-
-    # ---- Write detailed comparison CSV ----
-    compare_csv = os.path.join(base_dir, f'compare_doppler_{name}.csv')
-    with open(compare_csv, 'w') as f:
-        f.write('range_bin,doppler_bin,py_i,py_q,rtl_i,rtl_q,diff_i,diff_q\n')
-        for rbin in range(RANGE_BINS):
-            py_i, py_q = extract_iq_arrays(py_data, rbin)
-            rtl_i, rtl_q = extract_iq_arrays(rtl_data, rbin)
-            for dbin in range(DOPPLER_FFT):
-                f.write(f'{rbin},{dbin},{py_i[dbin]},{py_q[dbin]},'
-                        f'{rtl_i[dbin]},{rtl_q[dbin]},'
-                        f'{rtl_i[dbin]-py_i[dbin]},{rtl_q[dbin]-py_q[dbin]}\n')
-
-    result = {
-        'scenario': name,
-        'rtl_count': rtl_total,
-        'energy_ratio': energy_ratio,
-        'peak_agreement': peak_agreement_frac,
-        'avg_mag_corr': avg_mag_corr,
-        'avg_corr_i': avg_corr_i,
-        'avg_corr_q': avg_corr_q,
-        'passed': all_pass,
-    }
-
-    return all_pass, result
-
-
-# =============================================================================
-# Main
-# =============================================================================
-
-def main():
-    base_dir = os.path.dirname(os.path.abspath(__file__))
-
-    arg = sys.argv[1].lower() if len(sys.argv) > 1 else 'stationary'
-
-    if arg == 'all':
-        run_scenarios = list(SCENARIOS.keys())
-    elif arg in SCENARIOS:
-        run_scenarios = [arg]
-    else:
-        sys.exit(1)
-
-
-    results = []
-    for name in run_scenarios:
-        passed, result = compare_scenario(name, SCENARIOS[name], base_dir)
-        results.append((name, passed, result))
-
-    # Summary
-
-
-    all_pass = True
-    for _name, passed, result in results:
-        if not result:
-            all_pass = False
-        else:
-            if not passed:
-                all_pass = False
-
-    if all_pass:
-        pass
-    else:
-        pass
-
-    sys.exit(0 if all_pass else 1)
-
-
-if __name__ == '__main__':
-    main()
@@ -1,330 +0,0 @@
-#!/usr/bin/env python3
-"""
-Co-simulation Comparison: RTL vs Python Model for AERIS-10 Matched Filter.
-
-Compares the RTL matched filter output (from tb_mf_cosim.v) against the
-Python model golden reference (from gen_mf_cosim_golden.py).
-
-Two modes of operation:
-  1. Synthesis branch (no -DSIMULATION): RTL uses fft_engine.v with fixed-point
-     twiddle ROM (fft_twiddle_1024.mem) and frequency_matched_filter.v. The
-     Python model was built to match this exactly. Expect BIT-PERFECT results
-     (correlation = 1.0, energy ratio = 1.0).
-
-  2. SIMULATION branch (-DSIMULATION): RTL uses behavioral FFT with floating-
-     point twiddles ($rtoi($cos*32767)) and shift-then-add conjugate multiply.
-     Python model uses fixed-point twiddles and add-then-round. Expect large
-     numerical differences; only state-machine mechanics are validated.
-
-Usage:
-    python3 compare_mf.py [scenario|all]
-
-    scenario: chirp, dc, impulse, tone5 (default: chirp)
-    all: run all scenarios
-
-Author: Phase 0.5 matched-filter co-simulation suite for PLFM_RADAR
-"""
-
-import math
-import os
-import sys
-
-sys.path.insert(0, os.path.dirname(os.path.abspath(__file__)))
-
-
-# =============================================================================
-# Configuration
-# =============================================================================
-
-FFT_SIZE = 1024
-
-SCENARIOS = {
-    'chirp': {
-        'golden_csv': 'mf_golden_py_chirp.csv',
-        'rtl_csv': 'rtl_mf_chirp.csv',
-        'description': 'Radar chirp: 2 targets vs ref chirp',
-    },
-    'dc': {
-        'golden_csv': 'mf_golden_py_dc.csv',
-        'rtl_csv': 'rtl_mf_dc.csv',
-        'description': 'DC autocorrelation (I=0x1000)',
-    },
-    'impulse': {
-        'golden_csv': 'mf_golden_py_impulse.csv',
-        'rtl_csv': 'rtl_mf_impulse.csv',
-        'description': 'Impulse autocorrelation (delta at n=0)',
-    },
-    'tone5': {
-        'golden_csv': 'mf_golden_py_tone5.csv',
-        'rtl_csv': 'rtl_mf_tone5.csv',
-        'description': 'Tone autocorrelation (bin 5, amp=8000)',
-    },
-}
-
-# Thresholds for pass/fail
-# These are generous because of the fundamental twiddle arithmetic differences
-# between the SIMULATION branch (float twiddles) and Python model (fixed twiddles)
-ENERGY_CORR_MIN = 0.80       # Min correlation of magnitude spectra
-TOP_PEAK_OVERLAP_MIN = 0.50  # At least 50% of top-N peaks must overlap
-RMS_RATIO_MAX = 50.0         # Max ratio of RMS energies (generous, since gain differs)
-ENERGY_RATIO_MIN = 0.001     # Min ratio (total energy RTL / total energy Python)
-ENERGY_RATIO_MAX = 1000.0    # Max ratio
-
-
-# =============================================================================
-# Helper functions
-# =============================================================================
-
-def load_csv(filepath):
-    """Load CSV with columns (bin, out_i/range_profile_i, out_q/range_profile_q)."""
-    vals_i = []
-    vals_q = []
-    with open(filepath) as f:
-        f.readline()  # Skip header
-        for line in f:
-            line = line.strip()
-            if not line:
-                continue
-            parts = line.split(',')
-            vals_i.append(int(parts[1]))
-            vals_q.append(int(parts[2]))
-    return vals_i, vals_q
-
-
-def magnitude_spectrum(vals_i, vals_q):
-    """Compute magnitude = |I| + |Q| for each bin (L1 norm, matches RTL)."""
-    return [abs(i) + abs(q) for i, q in zip(vals_i, vals_q, strict=False)]
-
-
-def magnitude_l2(vals_i, vals_q):
-    """Compute magnitude = sqrt(I^2 + Q^2) for each bin."""
-    return [math.sqrt(i*i + q*q) for i, q in zip(vals_i, vals_q, strict=False)]
-
-
-def total_energy(vals_i, vals_q):
-    """Compute total energy (sum of I^2 + Q^2)."""
-    return sum(i*i + q*q for i, q in zip(vals_i, vals_q, strict=False))
-
-
-def rms_magnitude(vals_i, vals_q):
-    """Compute RMS of complex magnitude."""
-    n = len(vals_i)
-    if n == 0:
-        return 0.0
-    return math.sqrt(sum(i*i + q*q for i, q in zip(vals_i, vals_q, strict=False)) / n)
-
-
-def pearson_correlation(a, b):
-    """Compute Pearson correlation coefficient between two lists."""
-    n = len(a)
-    if n < 2:
-        return 0.0
-    mean_a = sum(a) / n
-    mean_b = sum(b) / n
-    cov = sum((a[i] - mean_a) * (b[i] - mean_b) for i in range(n))
-    std_a_sq = sum((x - mean_a) ** 2 for x in a)
-    std_b_sq = sum((x - mean_b) ** 2 for x in b)
-    if std_a_sq < 1e-10 or std_b_sq < 1e-10:
-        return 1.0 if abs(mean_a - mean_b) < 1.0 else 0.0
-    return cov / math.sqrt(std_a_sq * std_b_sq)
-
-
-def find_peak(vals_i, vals_q):
-    """Find the bin with the maximum L1 magnitude."""
-    mags = magnitude_spectrum(vals_i, vals_q)
-    peak_bin = 0
-    peak_mag = mags[0]
-    for i in range(1, len(mags)):
-        if mags[i] > peak_mag:
-            peak_mag = mags[i]
-            peak_bin = i
-    return peak_bin, peak_mag
-
-
-def top_n_peaks(mags, n=10):
-    """Find the top-N peak bins by magnitude. Returns set of bin indices."""
-    indexed = sorted(enumerate(mags), key=lambda x: -x[1])
-    return {idx for idx, _ in indexed[:n]}
-
-
-def spectral_peak_overlap(mags_a, mags_b, n=10):
-    """Fraction of top-N peaks from A that also appear in top-N of B."""
-    peaks_a = top_n_peaks(mags_a, n)
-    peaks_b = top_n_peaks(mags_b, n)
-    if len(peaks_a) == 0:
-        return 1.0
-    overlap = peaks_a & peaks_b
-    return len(overlap) / len(peaks_a)
-
-
-# =============================================================================
-# Comparison for one scenario
-# =============================================================================
-
-def compare_scenario(scenario_name, config, base_dir):
-    """Compare one scenario. Returns (pass/fail, result_dict)."""
-
-    golden_path = os.path.join(base_dir, config['golden_csv'])
-    rtl_path = os.path.join(base_dir, config['rtl_csv'])
-
-    if not os.path.exists(golden_path):
-        return False, {}
-    if not os.path.exists(rtl_path):
-        return False, {}
-
-    py_i, py_q = load_csv(golden_path)
-    rtl_i, rtl_q = load_csv(rtl_path)
-
-
-    if len(py_i) != FFT_SIZE or len(rtl_i) != FFT_SIZE:
-        return False, {}
-
-    # ---- Metric 1: Energy ----
-    py_energy = total_energy(py_i, py_q)
-    rtl_energy = total_energy(rtl_i, rtl_q)
-    py_rms = rms_magnitude(py_i, py_q)
-    rtl_rms = rms_magnitude(rtl_i, rtl_q)
-
-    if py_energy > 0 and rtl_energy > 0:
-        energy_ratio = rtl_energy / py_energy
-        rms_ratio = rtl_rms / py_rms
-    elif py_energy == 0 and rtl_energy == 0:
-        energy_ratio = 1.0
-        rms_ratio = 1.0
-    else:
-        energy_ratio = float('inf') if py_energy == 0 else 0.0
-        rms_ratio = float('inf') if py_rms == 0 else 0.0
-
-
-    # ---- Metric 2: Peak location ----
-    py_peak_bin, _py_peak_mag = find_peak(py_i, py_q)
-    rtl_peak_bin, _rtl_peak_mag = find_peak(rtl_i, rtl_q)
-
-
-    # ---- Metric 3: Magnitude spectrum correlation ----
-    py_mag = magnitude_l2(py_i, py_q)
-    rtl_mag = magnitude_l2(rtl_i, rtl_q)
-    mag_corr = pearson_correlation(py_mag, rtl_mag)
-
-
-    # ---- Metric 4: Top-N peak overlap ----
-    # Use L1 magnitudes for peak finding (matches RTL)
-    py_mag_l1 = magnitude_spectrum(py_i, py_q)
-    rtl_mag_l1 = magnitude_spectrum(rtl_i, rtl_q)
-    peak_overlap_10 = spectral_peak_overlap(py_mag_l1, rtl_mag_l1, n=10)
-    peak_overlap_20 = spectral_peak_overlap(py_mag_l1, rtl_mag_l1, n=20)
-
-
-    # ---- Metric 5: I and Q channel correlation ----
-    corr_i = pearson_correlation(py_i, rtl_i)
-    corr_q = pearson_correlation(py_q, rtl_q)
-
-
-    # ---- Pass/Fail Decision ----
-    # The SIMULATION branch uses floating-point twiddles ($cos/$sin) while
-    # the Python model uses the fixed-point twiddle ROM (matching synthesis).
-    # These are fundamentally different FFT implementations. We do NOT expect
-    # structural similarity (correlation, peak overlap) between them.
-    #
-    # What we CAN verify:
-    # 1. Both produce non-trivial output (state machine completes)
-    # 2. Output count is correct (1024 samples)
-    # 3. Energy is in a reasonable range (not wildly wrong)
-    #
-    # The true bit-accuracy comparison will happen when the synthesis branch
-    # is simulated (xsim on remote server) using the same fft_engine.v that
-    # the Python model was built to match.
-
-    checks = []
-
-    # Check 1: Both produce output
-    both_have_output = py_energy > 0 and rtl_energy > 0
-    checks.append(('Both produce output', both_have_output))
-
-    # Check 2: RTL produced expected sample count
-    correct_count = len(rtl_i) == FFT_SIZE
-    checks.append(('Correct output count (1024)', correct_count))
-
-    # Check 3: Energy ratio within generous bounds
-    # Allow very wide range since twiddle differences cause large gain variation
-    energy_ok = ENERGY_RATIO_MIN < energy_ratio < ENERGY_RATIO_MAX
-    checks.append((f'Energy ratio in bounds ({ENERGY_RATIO_MIN}-{ENERGY_RATIO_MAX})',
-                    energy_ok))
-
-    # Print checks
-    all_pass = True
-    for _name, passed in checks:
-        if not passed:
-            all_pass = False
-
-    result = {
-        'scenario': scenario_name,
-        'py_energy': py_energy,
-        'rtl_energy': rtl_energy,
-        'energy_ratio': energy_ratio,
-        'rms_ratio': rms_ratio,
-        'py_peak_bin': py_peak_bin,
-        'rtl_peak_bin': rtl_peak_bin,
-        'mag_corr': mag_corr,
-        'peak_overlap_10': peak_overlap_10,
-        'peak_overlap_20': peak_overlap_20,
-        'corr_i': corr_i,
-        'corr_q': corr_q,
-        'passed': all_pass,
-    }
-
-    # Write detailed comparison CSV
-    compare_csv = os.path.join(base_dir, f'compare_mf_{scenario_name}.csv')
-    with open(compare_csv, 'w') as f:
-        f.write('bin,py_i,py_q,rtl_i,rtl_q,py_mag,rtl_mag,diff_i,diff_q\n')
-        for k in range(FFT_SIZE):
-            f.write(f'{k},{py_i[k]},{py_q[k]},{rtl_i[k]},{rtl_q[k]},'
-                    f'{py_mag_l1[k]},{rtl_mag_l1[k]},'
-                    f'{rtl_i[k]-py_i[k]},{rtl_q[k]-py_q[k]}\n')
-
-    return all_pass, result
-
-
-# =============================================================================
-# Main
-# =============================================================================
-
-def main():
-    base_dir = os.path.dirname(os.path.abspath(__file__))
-
-    arg = sys.argv[1].lower() if len(sys.argv) > 1 else 'chirp'
-
-    if arg == 'all':
-        run_scenarios = list(SCENARIOS.keys())
-    elif arg in SCENARIOS:
-        run_scenarios = [arg]
-    else:
-        sys.exit(1)
-
-
-    results = []
-    for name in run_scenarios:
-        passed, result = compare_scenario(name, SCENARIOS[name], base_dir)
-        results.append((name, passed, result))
-
-    # Summary
-
-
-    all_pass = True
-    for _name, passed, result in results:
-        if not result:
-            all_pass = False
-        else:
-            if not passed:
-                all_pass = False
-
-    if all_pass:
-        pass
-    else:
-        pass
-
-    sys.exit(0 if all_pass else 1)
-
-
-if __name__ == '__main__':
-    main()
@@ -291,12 +291,9 @@ class Mixer:
        Convert 8-bit unsigned ADC to 18-bit signed.
        RTL: adc_signed_w = {1'b0, adc_data, {9{1'b0}}} -
                            {1'b0, {8{1'b1}}, {9{1'b0}}} / 2
-
-        Verilog '/' binds tighter than '-', so the division applies
-        only to the second concatenation:
-            {1'b0, 8'hFF, 9'b0} = 0x1FE00
-            0x1FE00 / 2 = 0xFF00 = 65280
-        Result: (adc_data << 9) - 0xFF00
+        = (adc_data << 9) - (0xFF << 9) / 2
+        = (adc_data << 9) - (0xFF << 8)  [integer division]
+        = (adc_data << 9) - 0x7F80
        """
        adc_data_8bit = adc_data_8bit & 0xFF
        # {1'b0, adc_data, 9'b0} = adc_data << 9, zero-padded to 18 bits
--- a/Show More
+++ b/Show More
Author	SHA1	Message	Date
copilot-swe-agent[bot]	b54c04272f	fix: correct .gitignore stub name stm32_stub → stm32_settings_stub Agent-Logs-Url: https://github.com/NawfalMotii79/PLFM_RADAR/sessions/15d36e68-be17-4ee3-b6e0-1da7de544671 Co-authored-by: JJassonn69 <83615043+JJassonn69@users.noreply.github.com>	2026-04-13 15:21:06 +00:00
copilot-swe-agent[bot]	ce61b71cf4	fix: stable target IDs, hardware.py null checks, remove unused crcmod Agent-Logs-Url: https://github.com/NawfalMotii79/PLFM_RADAR/sessions/39ac635f-c79b-438f-8764-8db7361e4d50 Co-authored-by: JJassonn69 <83615043+JJassonn69@users.noreply.github.com>	2026-04-13 15:13:15 +00:00
copilot-swe-agent[bot]	bbaf1e3436	fix: restore actionable error messages to stderr in uart_capture.py Agent-Logs-Url: https://github.com/NawfalMotii79/PLFM_RADAR/sessions/3a9a3676-8353-4df6-96b3-0163bd25923f Co-authored-by: JJassonn69 <83615043+JJassonn69@users.noreply.github.com>	2026-04-13 15:08:30 +00:00
Jason	4578621c75	fix: restore T20-stripped print() calls in cosim scripts; add 60 mem validation tests - Restored print() output in 6 generator/cosim scripts that ruff T20 had silently stripped, leaving dead 'for _var: pass' stubs and orphaned expressions. Files restored from pre-ruff commit and re-linted with T20/ERA/ARG/E501 per-file-ignores. - Removed 5 dead/self-blessing scripts (compare.py, compare_doppler.py, compare_mf.py, validate_mem_files.py, LUT.py). - Added test_mem_validation.py: 60 pytest tests validating .mem files against independently-derived ground truth (twiddle factors, chirp waveforms, memory addressing, segment padding). - Updated CI cross-layer-tests job to include test_mem_validation.py. - All 150 tests pass (61 GUI + 29 cross-layer + 60 mem validation).	2026-04-13 20:36:28 +05:45
copilot-swe-agent[bot]	8901894b6c	fix: restore uart_capture.py terminal output; add T20 per-file ignore for CLI tool Agent-Logs-Url: https://github.com/NawfalMotii79/PLFM_RADAR/sessions/671cf948-60b5-47c3-af69-7e1d26366728 Co-authored-by: JJassonn69 <83615043+JJassonn69@users.noreply.github.com>	2026-04-13 14:11:23 +00:00
copilot-swe-agent[bot]	e6e2217b76	fix: enforce 1-32 range for Chirps Per Elevation (opcode 0x15); mojibake already fixed Agent-Logs-Url: https://github.com/NawfalMotii79/PLFM_RADAR/sessions/9509b8cb-c385-479a-a7a6-a4a9307f2615 Co-authored-by: JJassonn69 <83615043+JJassonn69@users.noreply.github.com>	2026-04-12 19:15:58 +00:00
Jason	cc9ab27d44	Update 9_Firmware/9_1_Microcontroller/9_1_1_C_Cpp_Libraries/RadarSettings.cpp Co-authored-by: Copilot <175728472+Copilot@users.noreply.github.com>	2026-04-12 22:10:27 +03:00
copilot-swe-agent[bot]	56d0ea2883	fix: use importlib for radar_protocol import; downgrade noisy log levels to DEBUG Agent-Logs-Url: https://github.com/NawfalMotii79/PLFM_RADAR/sessions/8acb5f68-51fa-4632-a73b-0188b876bed1 Co-authored-by: JJassonn69 <83615043+JJassonn69@users.noreply.github.com>	2026-04-12 19:09:23 +00:00
copilot-swe-agent[bot]	b394f6bc49	fix: widen per-file-ignores globs in pyproject.toml to use ** patterns Agent-Logs-Url: https://github.com/NawfalMotii79/PLFM_RADAR/sessions/1aaab9fe-f41c-4e43-9391-99ce5a500686 Co-authored-by: JJassonn69 <83615043+JJassonn69@users.noreply.github.com>	2026-04-12 19:06:10 +00:00