2 Commits

Author	SHA1	Message	Date
Jason	1e284767cd	fix(test,docs): remove dead xfft_32 files, update test infra for dual-16 FFT, add regression guide ... - Remove xfft_32.v, tb_xfft_32.v, and fft_twiddle_32.mem (dead code since PR #33 moved Doppler to dual 16-pt FFT architecture) - Update run_regression.sh: xfft_16 in PROD_RTL, remove xfft_32 from EXTRA_RTL and all compile commands - Update tb_fft_engine.v to test with N=16 / fft_twiddle_16.mem - Update validate_mem_files.py: validate fft_twiddle_16.mem instead of 32 - Update testbenches and golden data from main_cleanup branch to match dual-16 architecture (tb_doppler_cosim, tb_doppler_realdata, tb_fullchain_realdata, tb_fullchain_mti_cfar_realdata, tb_system_e2e, radar_receiver_final, golden_doppler.mem) - Update CONTRIBUTING.md with full regression test instructions covering FPGA, MCU, GUI, co-simulation, and formal verification Regression: 23/23 FPGA, 20/20 MCU, 57/58 GUI, 56/56 mem validation, all co-sim scenarios PASS.	2026-04-07 02:51:48 +03:00
Serhii	7eb81668e0	docs: fix FPGA part number, dead paths, and add CONTRIBUTING.md ... - README: XC7A100T → XC7A50T to match the XDC correction note (constraints/xc7a50t_ftg256.xdc lines 9-11) - README: replace dead /10_docs/ paths with tracked locations - README: update contributing section to reference CONTRIBUTING.md - Add minimal CONTRIBUTING.md with repo layout and PR checklist Closes #37	2026-04-06 20:06:56 +03:00