Phase 1 hardware bring-up prep: ILA debug probes, CDC waivers, programming scripts
- Rename latency_buffer_2159 -> latency_buffer (module + file + all refs) - Add CDC waivers for 5 verified false-positive criticals to XDC - Add ILA debug probe insertion script (4 cores, 126 probe bits, 2 clock domains) - Add FPGA programming script (7-step flow with DONE pin verification) - Add ILA capture script (4 scenarios + health check, CSV export) - Add debug_ila.xdc with MARK_DEBUG fallback attributes - Full regression clean: 13/13 suites, 266/266 checks, 2048/2048 golden match
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@@ -192,7 +192,7 @@ end
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wire [15:0] delayed_ref_i, delayed_ref_q;
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wire mem_ready_delayed;
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latency_buffer_2159 #(
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latency_buffer #(
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.DATA_WIDTH(32), // 16-bit I + 16-bit Q
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.LATENCY(3187)
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) ref_latency_buffer (
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