Merge pull request #6 from walidb212/refactor/adar-sequencing-constants
refactor(firmware): name adar power sequencing constants
This commit is contained in:
@@ -13,10 +13,10 @@ static const struct {
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GPIO_TypeDef* port;
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GPIO_TypeDef* port;
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uint16_t pin;
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uint16_t pin;
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} CHIP_SELECTS[4] = {
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} CHIP_SELECTS[4] = {
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{GPIOA, GPIO_PIN_0}, // ADAR1000 #1
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{ADAR_1_CS_3V3_GPIO_Port, ADAR_1_CS_3V3_Pin}, // ADAR1000 #1
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{GPIOA, GPIO_PIN_1}, // ADAR1000 #2
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{ADAR_2_CS_3V3_GPIO_Port, ADAR_2_CS_3V3_Pin}, // ADAR1000 #2
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{GPIOA, GPIO_PIN_2}, // ADAR1000 #3
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{ADAR_3_CS_3V3_GPIO_Port, ADAR_3_CS_3V3_Pin}, // ADAR1000 #3
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{GPIOA, GPIO_PIN_3} // ADAR1000 #4
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{ADAR_4_CS_3V3_GPIO_Port, ADAR_4_CS_3V3_Pin} // ADAR1000 #4
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};
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};
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// Vector Modulator lookup tables
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// Vector Modulator lookup tables
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@@ -164,10 +164,10 @@ bool ADAR1000Manager::setBeamAngle(float angle_degrees, BeamDirection direction)
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for (uint8_t ch = 0; ch < 4; ++ch) {
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for (uint8_t ch = 0; ch < 4; ++ch) {
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if (direction == BeamDirection::TX) {
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if (direction == BeamDirection::TX) {
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adarSetTxPhase(dev, ch + 1, phase_settings[ch], BROADCAST_OFF);
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adarSetTxPhase(dev, ch + 1, phase_settings[ch], BROADCAST_OFF);
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adarSetTxVgaGain(dev, ch + 1, 0x7F, BROADCAST_OFF);
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adarSetTxVgaGain(dev, ch + 1, kDefaultTxVgaGain, BROADCAST_OFF);
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} else {
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} else {
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adarSetRxPhase(dev, ch + 1, phase_settings[ch], BROADCAST_OFF);
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adarSetRxPhase(dev, ch + 1, phase_settings[ch], BROADCAST_OFF);
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adarSetRxVgaGain(dev, ch + 1, 30, BROADCAST_OFF);
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adarSetRxVgaGain(dev, ch + 1, kDefaultRxVgaGain, BROADCAST_OFF);
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}
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}
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}
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}
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}
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}
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@@ -329,11 +329,11 @@ bool ADAR1000Manager::initializeADTR1107Sequence() {
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// Step 1: Connect all GND pins to ground (assumed in hardware)
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// Step 1: Connect all GND pins to ground (assumed in hardware)
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// Step 2: Set VDD_SW to 3.3V
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// Step 2: Set VDD_SW to 3.3V
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HAL_GPIO_WritePin(GPIOE, GPIO_PIN_15, GPIO_PIN_SET); // EN_P_3V3_VDD_SW
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HAL_GPIO_WritePin(EN_P_3V3_VDD_SW_GPIO_Port, EN_P_3V3_VDD_SW_Pin, GPIO_PIN_SET);
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HAL_Delay(1);
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HAL_Delay(1);
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// Step 3: Set VSS_SW to -3.3V
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// Step 3: Set VSS_SW to -3.3V
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HAL_GPIO_WritePin(GPIOE, GPIO_PIN_14, GPIO_PIN_SET); // EN_P_3V3_SW
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HAL_GPIO_WritePin(EN_P_3V3_SW_GPIO_Port, EN_P_3V3_SW_Pin, GPIO_PIN_SET);
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HAL_Delay(1);
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HAL_Delay(1);
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// Step 4: Set CTRL_SW to RX mode initially via GPIO
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// Step 4: Set CTRL_SW to RX mode initially via GPIO
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@@ -341,21 +341,21 @@ bool ADAR1000Manager::initializeADTR1107Sequence() {
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HAL_Delay(1);
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HAL_Delay(1);
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// Step 5: Set VGG_LNA to 0
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// Step 5: Set VGG_LNA to 0
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uint8_t lna_bias_voltage = 0x00; // Example value, adjust based on your LNA requirements
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uint8_t lna_bias_voltage = kLnaBiasOff;
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for (uint8_t dev = 0; dev < devices_.size(); ++dev) {
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for (uint8_t dev = 0; dev < devices_.size(); ++dev) {
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adarWrite(dev, REG_LNA_BIAS_ON, lna_bias_voltage, BROADCAST_OFF);
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adarWrite(dev, REG_LNA_BIAS_ON, lna_bias_voltage, BROADCAST_OFF);
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adarWrite(dev, REG_LNA_BIAS_OFF, 0x00, BROADCAST_OFF);
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adarWrite(dev, REG_LNA_BIAS_OFF, kLnaBiasOff, BROADCAST_OFF);
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}
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}
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// Step 6: Set VDD_LNA to 0V for TX mode
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// Step 6: Set VDD_LNA to 0V for TX mode
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HAL_GPIO_WritePin(GPIOE, GPIO_PIN_13, GPIO_PIN_RESET); // EN_P_3V3_LNA
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HAL_GPIO_WritePin(EN_P_3V3_ADTR_GPIO_Port, EN_P_3V3_ADTR_Pin, GPIO_PIN_RESET);
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HAL_Delay(2);
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HAL_Delay(2);
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// Step 7: Set VGG_PA to safe negative voltage (PA off for TX mode)
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// Step 7: Set VGG_PA to safe negative voltage (PA off for TX mode)
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/*A 0x00 value in the
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/*A 0x00 value in the
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on or off bias registers, correspond to a 0 V output. A 0xFF in the
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on or off bias registers, correspond to a 0 V output. A 0xFF in the
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on or off bias registers correspond to a −4.8 V output.*/
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on or off bias registers correspond to a −4.8 V output.*/
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uint8_t safe_pa_bias = 0x5D; // Safe negative voltage (-1.75V) to keep PA off
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uint8_t safe_pa_bias = kPaBiasTxSafe; // Safe negative voltage (-1.75V) to keep PA off
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for (uint8_t dev = 0; dev < devices_.size(); ++dev) {
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for (uint8_t dev = 0; dev < devices_.size(); ++dev) {
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adarWrite(dev, REG_PA_CH1_BIAS_ON, safe_pa_bias, BROADCAST_OFF);
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adarWrite(dev, REG_PA_CH1_BIAS_ON, safe_pa_bias, BROADCAST_OFF);
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adarWrite(dev, REG_PA_CH2_BIAS_ON, safe_pa_bias, BROADCAST_OFF);
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adarWrite(dev, REG_PA_CH2_BIAS_ON, safe_pa_bias, BROADCAST_OFF);
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@@ -365,9 +365,7 @@ bool ADAR1000Manager::initializeADTR1107Sequence() {
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HAL_Delay(10);
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HAL_Delay(10);
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// Step 8: Set VDD_PA to 0V (PA powered up for TX mode)
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// Step 8: Set VDD_PA to 0V (PA powered up for TX mode)
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HAL_GPIO_WritePin(GPIOG, GPIO_PIN_0, GPIO_PIN_SET); // EN_P_5V0_PA
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enablePASupplies();
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HAL_GPIO_WritePin(GPIOG, GPIO_PIN_1, GPIO_PIN_SET);
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HAL_GPIO_WritePin(GPIOG, GPIO_PIN_2, GPIO_PIN_SET);
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HAL_Delay(50);
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HAL_Delay(50);
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// Step 9: Adjust VGG_PA voltage between −1.75 V and −0.25 V to achieve the desired IDQ_PA=220mA
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// Step 9: Adjust VGG_PA voltage between −1.75 V and −0.25 V to achieve the desired IDQ_PA=220mA
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@@ -375,7 +373,7 @@ bool ADAR1000Manager::initializeADTR1107Sequence() {
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/*A 0x00 value in the
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/*A 0x00 value in the
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on or off bias registers, correspond to a 0 V output. A 0xFF in the
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on or off bias registers, correspond to a 0 V output. A 0xFF in the
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on or off bias registers correspond to a −4.8 V output.*/
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on or off bias registers correspond to a −4.8 V output.*/
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uint8_t Idq_pa_bias = 0x0D; // Safe negative voltage (-0.2447V) to keep PA off
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uint8_t Idq_pa_bias = kPaBiasIdqCalibration; // Safe negative voltage (-0.2447V) to keep PA off
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for (uint8_t dev = 0; dev < devices_.size(); ++dev) {
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for (uint8_t dev = 0; dev < devices_.size(); ++dev) {
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adarWrite(dev, REG_PA_CH1_BIAS_ON, Idq_pa_bias, BROADCAST_OFF);
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adarWrite(dev, REG_PA_CH1_BIAS_ON, Idq_pa_bias, BROADCAST_OFF);
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adarWrite(dev, REG_PA_CH2_BIAS_ON, Idq_pa_bias, BROADCAST_OFF);
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adarWrite(dev, REG_PA_CH2_BIAS_ON, Idq_pa_bias, BROADCAST_OFF);
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@@ -433,23 +431,21 @@ void ADAR1000Manager::setADTR1107Mode(BeamDirection direction) {
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setADTR1107Control(true); // TX mode
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setADTR1107Control(true); // TX mode
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// Step 1: Disable LNA power first
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// Step 1: Disable LNA power first
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HAL_GPIO_WritePin(GPIOE, GPIO_PIN_13, GPIO_PIN_RESET); // Disable LNA power
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disableLNASupplies();
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HAL_Delay(5);
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HAL_Delay(5);
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// Step 2: Set LNA bias to safe off value
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// Step 2: Set LNA bias to safe off value
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for (uint8_t dev = 0; dev < devices_.size(); ++dev) {
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for (uint8_t dev = 0; dev < devices_.size(); ++dev) {
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adarWrite(dev, REG_LNA_BIAS_ON, 0x00, BROADCAST_OFF); // Turn off LNA bias
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adarWrite(dev, REG_LNA_BIAS_ON, kLnaBiasOff, BROADCAST_OFF); // Turn off LNA bias
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}
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}
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HAL_Delay(5);
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HAL_Delay(5);
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// Step 3: Enable PA power
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// Step 3: Enable PA power
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HAL_GPIO_WritePin(GPIOG, GPIO_PIN_0, GPIO_PIN_SET); // EN_P_5V0_PA
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enablePASupplies();
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HAL_GPIO_WritePin(GPIOG, GPIO_PIN_1, GPIO_PIN_SET);
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HAL_GPIO_WritePin(GPIOG, GPIO_PIN_2, GPIO_PIN_SET);
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HAL_Delay(10);
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HAL_Delay(10);
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// Step 4: Set PA bias to operational value
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// Step 4: Set PA bias to operational value
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uint8_t operational_pa_bias = 0x7F; // Maximum bias for full power
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uint8_t operational_pa_bias = kPaBiasOperational; // Maximum bias for full power
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for (uint8_t dev = 0; dev < devices_.size(); ++dev) {
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for (uint8_t dev = 0; dev < devices_.size(); ++dev) {
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adarWrite(dev, REG_PA_CH1_BIAS_ON, operational_pa_bias, BROADCAST_OFF);
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adarWrite(dev, REG_PA_CH1_BIAS_ON, operational_pa_bias, BROADCAST_OFF);
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adarWrite(dev, REG_PA_CH2_BIAS_ON, operational_pa_bias, BROADCAST_OFF);
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adarWrite(dev, REG_PA_CH2_BIAS_ON, operational_pa_bias, BROADCAST_OFF);
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@@ -469,13 +465,11 @@ void ADAR1000Manager::setADTR1107Mode(BeamDirection direction) {
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setADTR1107Control(false); // RX mode
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setADTR1107Control(false); // RX mode
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// Step 1: Disable PA power first
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// Step 1: Disable PA power first
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HAL_GPIO_WritePin(GPIOG, GPIO_PIN_0, GPIO_PIN_RESET); // EN_P_5V0_PA
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disablePASupplies();
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HAL_GPIO_WritePin(GPIOG, GPIO_PIN_1, GPIO_PIN_RESET);
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HAL_GPIO_WritePin(GPIOG, GPIO_PIN_2, GPIO_PIN_RESET);
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HAL_Delay(5);
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HAL_Delay(5);
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// Step 2: Set PA bias to safe negative voltage
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// Step 2: Set PA bias to safe negative voltage
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uint8_t safe_pa_bias = 0x20;
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uint8_t safe_pa_bias = kPaBiasRxSafe;
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for (uint8_t dev = 0; dev < devices_.size(); ++dev) {
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for (uint8_t dev = 0; dev < devices_.size(); ++dev) {
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adarWrite(dev, REG_PA_CH1_BIAS_ON, safe_pa_bias, BROADCAST_OFF);
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adarWrite(dev, REG_PA_CH1_BIAS_ON, safe_pa_bias, BROADCAST_OFF);
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adarWrite(dev, REG_PA_CH2_BIAS_ON, safe_pa_bias, BROADCAST_OFF);
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adarWrite(dev, REG_PA_CH2_BIAS_ON, safe_pa_bias, BROADCAST_OFF);
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@@ -485,11 +479,11 @@ void ADAR1000Manager::setADTR1107Mode(BeamDirection direction) {
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HAL_Delay(5);
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HAL_Delay(5);
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// Step 3: Enable LNA power
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// Step 3: Enable LNA power
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HAL_GPIO_WritePin(GPIOE, GPIO_PIN_13, GPIO_PIN_SET); // EN_P_3V3_LNA
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enableLNASupplies();
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HAL_Delay(10);
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HAL_Delay(10);
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// Step 4: Set LNA bias to operational value
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// Step 4: Set LNA bias to operational value
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uint8_t operational_lna_bias = 0x30; // Adjust based on your LNA requirements
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uint8_t operational_lna_bias = kLnaBiasOperational;
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for (uint8_t dev = 0; dev < devices_.size(); ++dev) {
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for (uint8_t dev = 0; dev < devices_.size(); ++dev) {
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adarWrite(dev, REG_LNA_BIAS_ON, operational_lna_bias, BROADCAST_OFF);
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adarWrite(dev, REG_LNA_BIAS_ON, operational_lna_bias, BROADCAST_OFF);
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}
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}
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@@ -536,27 +530,27 @@ bool ADAR1000Manager::setCustomBeamPattern16(const uint8_t phase_pattern[16], Be
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}
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}
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void ADAR1000Manager::enablePASupplies() {
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void ADAR1000Manager::enablePASupplies() {
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HAL_GPIO_WritePin(GPIOG, GPIO_PIN_0, GPIO_PIN_SET); // EN_P_5V0_PA
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HAL_GPIO_WritePin(EN_P_5V0_PA1_GPIO_Port, EN_P_5V0_PA1_Pin, GPIO_PIN_SET);
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HAL_GPIO_WritePin(GPIOG, GPIO_PIN_1, GPIO_PIN_SET);
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HAL_GPIO_WritePin(EN_P_5V0_PA2_GPIO_Port, EN_P_5V0_PA2_Pin, GPIO_PIN_SET);
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HAL_GPIO_WritePin(GPIOG, GPIO_PIN_2, GPIO_PIN_SET);
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HAL_GPIO_WritePin(EN_P_5V0_PA3_GPIO_Port, EN_P_5V0_PA3_Pin, GPIO_PIN_SET);
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}
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}
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void ADAR1000Manager::disablePASupplies() {
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void ADAR1000Manager::disablePASupplies() {
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HAL_GPIO_WritePin(GPIOG, GPIO_PIN_0, GPIO_PIN_RESET); // EN_P_5V0_PA
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HAL_GPIO_WritePin(EN_P_5V0_PA1_GPIO_Port, EN_P_5V0_PA1_Pin, GPIO_PIN_RESET);
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HAL_GPIO_WritePin(GPIOG, GPIO_PIN_1, GPIO_PIN_RESET);
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HAL_GPIO_WritePin(EN_P_5V0_PA2_GPIO_Port, EN_P_5V0_PA2_Pin, GPIO_PIN_RESET);
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HAL_GPIO_WritePin(GPIOG, GPIO_PIN_2, GPIO_PIN_RESET);
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HAL_GPIO_WritePin(EN_P_5V0_PA3_GPIO_Port, EN_P_5V0_PA3_Pin, GPIO_PIN_RESET);
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}
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}
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void ADAR1000Manager::enableLNASupplies() {
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void ADAR1000Manager::enableLNASupplies() {
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HAL_GPIO_WritePin(GPIOE, GPIO_PIN_13, GPIO_PIN_SET); // EN_P_3V3_LNA
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HAL_GPIO_WritePin(EN_P_3V3_ADTR_GPIO_Port, EN_P_3V3_ADTR_Pin, GPIO_PIN_SET);
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}
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}
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void ADAR1000Manager::disableLNASupplies() {
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void ADAR1000Manager::disableLNASupplies() {
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HAL_GPIO_WritePin(GPIOE, GPIO_PIN_13, GPIO_PIN_RESET); // EN_P_3V3_LNA
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HAL_GPIO_WritePin(EN_P_3V3_ADTR_GPIO_Port, EN_P_3V3_ADTR_Pin, GPIO_PIN_RESET);
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}
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}
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void ADAR1000Manager::setPABias(bool enable) {
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void ADAR1000Manager::setPABias(bool enable) {
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uint8_t pa_bias = enable ? 0x7F : 0x20; // Operational vs safe bias
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uint8_t pa_bias = enable ? kPaBiasOperational : kPaBiasRxSafe; // Operational vs safe bias
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for (uint8_t dev = 0; dev < devices_.size(); ++dev) {
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for (uint8_t dev = 0; dev < devices_.size(); ++dev) {
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adarWrite(dev, REG_PA_CH1_BIAS_ON, pa_bias, BROADCAST_OFF);
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adarWrite(dev, REG_PA_CH1_BIAS_ON, pa_bias, BROADCAST_OFF);
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@@ -567,7 +561,7 @@ void ADAR1000Manager::setPABias(bool enable) {
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}
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}
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void ADAR1000Manager::setLNABias(bool enable) {
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void ADAR1000Manager::setLNABias(bool enable) {
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uint8_t lna_bias = enable ? 0x30 : 0x00; // Operational vs off
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uint8_t lna_bias = enable ? kLnaBiasOperational : kLnaBiasOff; // Operational vs off
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for (uint8_t dev = 0; dev < devices_.size(); ++dev) {
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for (uint8_t dev = 0; dev < devices_.size(); ++dev) {
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adarWrite(dev, REG_LNA_BIAS_ON, lna_bias, BROADCAST_OFF);
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adarWrite(dev, REG_LNA_BIAS_ON, lna_bias, BROADCAST_OFF);
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@@ -740,8 +734,8 @@ void ADAR1000Manager::adarSetTxVgaGain(uint8_t deviceIndex, uint8_t channel, uin
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}
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}
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void ADAR1000Manager::adarSetTxBias(uint8_t deviceIndex, uint8_t broadcast) {
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void ADAR1000Manager::adarSetTxBias(uint8_t deviceIndex, uint8_t broadcast) {
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adarWrite(deviceIndex, REG_BIAS_CURRENT_TX, 0x2D, broadcast);
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adarWrite(deviceIndex, REG_BIAS_CURRENT_TX, kTxBiasCurrent, broadcast);
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adarWrite(deviceIndex, REG_BIAS_CURRENT_TX_DRV, 0x06, broadcast);
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adarWrite(deviceIndex, REG_BIAS_CURRENT_TX_DRV, kTxDriverBiasCurrent, broadcast);
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adarWrite(deviceIndex, REG_LOAD_WORKING, 0x2, broadcast);
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adarWrite(deviceIndex, REG_LOAD_WORKING, 0x2, broadcast);
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}
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}
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@@ -121,6 +121,18 @@ public:
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static const uint8_t VM_Q[128];
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static const uint8_t VM_Q[128];
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static const uint8_t VM_GAIN[128];
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static const uint8_t VM_GAIN[128];
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// Named defaults for the ADTR1107 and ADAR1000 power sequence.
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static constexpr uint8_t kDefaultTxVgaGain = 0x7F;
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static constexpr uint8_t kDefaultRxVgaGain = 30;
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static constexpr uint8_t kLnaBiasOff = 0x00;
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static constexpr uint8_t kLnaBiasOperational = 0x30;
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static constexpr uint8_t kPaBiasTxSafe = 0x5D;
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static constexpr uint8_t kPaBiasIdqCalibration = 0x0D;
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static constexpr uint8_t kPaBiasOperational = 0x7F;
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static constexpr uint8_t kPaBiasRxSafe = 0x20;
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static constexpr uint8_t kTxBiasCurrent = 0x2D;
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static constexpr uint8_t kTxDriverBiasCurrent = 0x06;
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// Private Methods
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// Private Methods
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bool initializeSingleDevice(uint8_t deviceIndex);
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bool initializeSingleDevice(uint8_t deviceIndex);
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bool initializeADTR1107Sequence();
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bool initializeADTR1107Sequence();
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