Production fixes 1-7: detection bugs, cfar→threshold rename, digital gain control, Doppler mismatch protection, decimator watchdog, bypass_mode dead code removal, range-mode register (21/21 regression PASS)

Fix 1: Combinational magnitude + non-sticky detection flag (tb: 23/23)
Fix 2: Rename all cfar_* signals to detect_*/threshold_* (honest naming)
Fix 3: New rx_gain_control.v between DDC and FFT, opcode 0x16 (tb: 33/33)
Fix 4: Clamp host_chirps_per_elev to DOPPLER_FFT_SIZE, error flag (E2E: 54/54)
Fix 5: Decimator watchdog timeout, 256-cycle limit (tb: 63/63)
Fix 6: Remove bypass_mode dead code from ddc_400m.v (DDC tb: 21/21)
Fix 7: Range-mode register 0x20 with status readback (USB tb: 77/77)

9_Firmware/9_2_FPGA/ddc_400m.v

@@ -16,10 +16,9 @@ module ddc_400m_enhanced (
     output wire [1:0] ddc_status,
     // Enhanced interfaces
     output wire [7:0] ddc_diagnostics,
-    output wire mixer_saturation,
-    output wire filter_overflow,
-    input wire bypass_mode,        // Test mode
-	 
+    output wire mixer_saturation,
+    output wire filter_overflow,
+	 
 	 input wire [1:0] test_mode,
     input wire [15:0] test_phase_inc,
     input wire force_saturation,
@@ -90,11 +89,9 @@ end
 
 // CDC synchronization for control signals (2-stage synchronizers)
 (* ASYNC_REG = "TRUE" *) reg [1:0] mixers_enable_sync_chain;
-(* ASYNC_REG = "TRUE" *) reg [1:0] bypass_mode_sync_chain;
-(* ASYNC_REG = "TRUE" *) reg [1:0] force_saturation_sync_chain;
+(* ASYNC_REG = "TRUE" *) reg [1:0] force_saturation_sync_chain;
 wire mixers_enable_sync;
-wire bypass_mode_sync;
-wire force_saturation_sync;
+wire force_saturation_sync;
 
 // Debug monitoring signals
 reg [31:0] sample_counter;
@@ -139,17 +136,14 @@ assign debug_mixed_q_trunc = mixed_q[25:8];
 // Clock Domain Crossing for Control Signals (2-stage synchronizers)
 // ============================================================================
 assign mixers_enable_sync = mixers_enable_sync_chain[1];
-assign bypass_mode_sync = bypass_mode_sync_chain[1];
 assign force_saturation_sync = force_saturation_sync_chain[1];
 
 always @(posedge clk_400m or negedge reset_n_400m) begin
     if (!reset_n_400m) begin
         mixers_enable_sync_chain <= 2'b00;
-        bypass_mode_sync_chain <= 2'b00;
         force_saturation_sync_chain <= 2'b00;
     end else begin
         mixers_enable_sync_chain <= {mixers_enable_sync_chain[0], mixers_enable};
-        bypass_mode_sync_chain <= {bypass_mode_sync_chain[0], bypass_mode};
         force_saturation_sync_chain <= {force_saturation_sync_chain[0], force_saturation};
     end
 end