Gap 4 USB Read Path: wire host-to-FPGA command path with toggle CDC, add read path tests
- usb_data_interface.v: Add FT601 read FSM (RD_IDLE/OE_ASSERT/READING/ DEASSERT/PROCESS) + cmd_data/valid/opcode/addr/value output ports - radar_system_top.v: Connect cmd_* ports from usb_inst, add toggle CDC for cmd_valid (ft601_clk -> clk_100m), add command decode registers (mode/trigger/cfar_threshold/stream_control), wire host_mode and host_trigger to rx_inst - radar_receiver_final.v: Add host_mode[1:0] and host_trigger input ports, replace hardcoded mode/trigger in radar_mode_controller instance - tb_usb_data_interface.v: Connect cmd_* ports, add host data bus driver, add Test Groups 12 (single command), 13 (multiple commands), 14 (read/write interleave). USB TB now has 55 checks. Regression: 18/18 PASS
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@@ -22,7 +22,12 @@ module radar_receiver_final (
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// Matched filter range profile output (for USB)
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output wire signed [15:0] range_profile_i_out,
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output wire signed [15:0] range_profile_q_out,
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output wire range_profile_valid_out
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output wire range_profile_valid_out,
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// Host command inputs (Gap 4: USB Read Path)
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// CDC-synchronized in radar_system_top.v before reaching here
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input wire [1:0] host_mode, // Radar mode: 00=STM32, 01=auto-scan, 10=single-chirp
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input wire host_trigger // Single-chirp trigger pulse (1 clk cycle)
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);
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// ========== INTERNAL SIGNALS ==========
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@@ -81,11 +86,11 @@ wire [5:0] rmc_azimuth_count;
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radar_mode_controller rmc (
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.clk(clk),
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.reset_n(reset_n),
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.mode(2'b01), // Auto-scan mode
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.mode(host_mode), // Controlled by host via USB (default: 2'b01 auto-scan)
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.stm32_new_chirp(1'b0), // Unused in auto mode
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.stm32_new_elevation(1'b0), // Unused in auto mode
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.stm32_new_azimuth(1'b0), // Unused in auto mode
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.trigger(1'b0), // Unused in auto mode
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.trigger(host_trigger), // Single-chirp trigger from host via USB
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.use_long_chirp(use_long_chirp),
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.mc_new_chirp(mc_new_chirp),
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.mc_new_elevation(mc_new_elevation),
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