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fix(scripts): inject DRC waivers via TCL.PRE hook for impl_1 child process

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set_property SEVERITY in the parent Vivado process does not propagate
to the child process spawned by launch_runs. Write a drc_waivers_50t.tcl
hook and attach it via STEPS.OPT_DESIGN.TCL.PRE so BIVC-1, NSTD-1,
and UCIO-1 are demoted to warnings inside the impl_1 run context.
This commit is contained in:
Jason
2026-04-07 05:59:51 +03:00
parent 7d90e5e7d6
commit 96856c42e0
1 changed files with 19 additions and 1 deletions
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9_Firmware/9_2_FPGA/scripts/build_50t_test.tcl
+19 -1
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@@ -48,7 +48,11 @@ add_files -fileset constrs_1 -norecurse [file join $project_root "constraints" "
# ============================================================================ # ============================================================================
# DRC SEVERITY WAIVERS — 50T Hardware-Specific # DRC SEVERITY WAIVERS — 50T Hardware-Specific
# ============================================================================ # ============================================================================
# These must be set before synthesis/implementation runs. # NOTE: set_property SEVERITY in the parent process does NOT propagate to
# child processes spawned by launch_runs. The actual waivers are applied via
# a TCL.PRE hook (STEPS.OPT_DESIGN.TCL.PRE) written dynamically below.
# We still set them here for any DRC checks run in the parent context
# (e.g., report_drc after open_run).
# #
# BIVC-1: Bank 14 VCCO=3.3V with LVDS_25 IBUFDS inputs + LVCMOS33 adc_pwdn. # BIVC-1: Bank 14 VCCO=3.3V with LVDS_25 IBUFDS inputs + LVCMOS33 adc_pwdn.
# IBUFDS inputs are VCCO-independent on 7-series (internal diff amplifier). # IBUFDS inputs are VCCO-independent on 7-series (internal diff amplifier).
@@ -84,6 +88,20 @@ close_design
# ===== IMPLEMENTATION ===== # ===== IMPLEMENTATION =====
set impl_start [clock seconds] set impl_start [clock seconds]
# Write DRC waiver hook — this runs inside the impl_1 child process
# right before opt_design, ensuring BIVC-1/NSTD-1/UCIO-1 are demoted
# to warnings for the DRC checks that gate place_design.
set hook_file [file join $project_dir "drc_waivers_50t.tcl"]
set fh [open $hook_file w]
puts $fh "# Auto-generated DRC waiver hook for 50T impl_1"
puts $fh "set_property SEVERITY {Warning} \[get_drc_checks BIVC-1\]"
puts $fh "set_property SEVERITY {Warning} \[get_drc_checks NSTD-1\]"
puts $fh "set_property SEVERITY {Warning} \[get_drc_checks UCIO-1\]"
puts $fh "puts \" DRC waivers applied (BIVC-1, NSTD-1, UCIO-1 -> Warning)\""
close $fh
set_property STEPS.OPT_DESIGN.TCL.PRE $hook_file [get_runs impl_1]
set_property STEPS.OPT_DESIGN.ARGS.DIRECTIVE Explore [get_runs impl_1] set_property STEPS.OPT_DESIGN.ARGS.DIRECTIVE Explore [get_runs impl_1]
set_property STEPS.PLACE_DESIGN.ARGS.DIRECTIVE Explore [get_runs impl_1] set_property STEPS.PLACE_DESIGN.ARGS.DIRECTIVE Explore [get_runs impl_1]
set_property STEPS.PHYS_OPT_DESIGN.IS_ENABLED true [get_runs impl_1] set_property STEPS.PHYS_OPT_DESIGN.IS_ENABLED true [get_runs impl_1]