feat: CI test suite phases A+B, WaveformConfig separation, dead golden code cleanup

- Phase A: Remove self-blessing golden test from FPGA regression, wire
  MF co-sim (4 scenarios) into run_regression.sh, add opcode count guards
  to cross-layer tests (+3 tests)
- Phase B: Add radar_params.vh parser and architectural param consistency
  tests (+7 tests), add banned stale-value pattern scanner (+1 test)
- Separate WaveformConfig.range_resolution_m (physical, bandwidth-dependent)
  from bin_spacing_m (sample-rate dependent); rename all callers
- Remove 151 lines of dead golden generate/compare code from
  tb_radar_receiver_final.v; testbench now runs structural + bounds only
- Untrack generated MF co-sim CSV files, gitignore tb/golden/ directory

CI: 256 tests total (168 python + 40 cross-layer + 27 FPGA + 21 MCU), all green

.gitignore

@@ -33,9 +33,11 @@
 9_Firmware/9_2_FPGA/tb/cosim/compare_doppler_*.csv
 9_Firmware/9_2_FPGA/tb/cosim/rtl_multiseg_*.csv
 9_Firmware/9_2_FPGA/tb/cosim/rx_final_doppler_out.csv
+9_Firmware/9_2_FPGA/tb/cosim/rtl_mf_*.csv
+9_Firmware/9_2_FPGA/tb/cosim/compare_mf_*.csv
 
 # Golden reference outputs (regenerated by testbenches)
-9_Firmware/9_2_FPGA/tb/golden/golden_doppler.mem
+9_Firmware/9_2_FPGA/tb/golden/
 
 # macOS
 .DS_Store