fix(pre-bringup): second-batch P1/P2/P3 audit findings

Addresses the remaining actionable items from
docs/DEVELOP_AUDIT_2026-04-19.md after commit 3f47d1e.

XDC (dead waivers — F-0.4, F-0.5, F-0.6, F-0.7):
- ft_clkout_IBUF CLOCK_DEDICATED_ROUTE now uses hierarchical filter;
  flat net name did not exist post-synth.
- reset_sync_reg[*] false-path rewritten to walk hierarchy and filter
  on CLR/PRE pins.
- adc_clk_mmcm.xdc ft601_clk_in references replaced with foreach-loop
  over real USB clock names, gated on -quiet existence.
- MMCM LOCKED waiver uses REF_PIN_NAME filter instead of the
  previously-missing u_core/ literal path.

CDC (F-1.1, F-1.2, F-1.3):
- Documented the quasi-static-bus stability invariant above the
  FT601 cmd_valid toggle block.
- cdc_adc_to_processing gains an `overrun` output; the two CIC->FIR
  instances feed a sticky cdc_cic_fir_overrun flag surfaced on
  gpio_dig5 so silent sample drops become visible to the MCU.
- Removed the dead mixers_enable synchronizer in ddc_400m.v; the _sync
  output was unused and every caller ties the port to 1'b1.

Diagnostics (F-6.4):
- range_bin_decimator watchdog_timeout plumbed through receiver
  and top-level, OR'd into gpio_dig5.

ADAR (F-4.7):
- delayUs() replaced with DWT cycle counter; self-initialising
  TRCENA/CYCCNTENA, overflow-safe unsigned subtraction.

Regression: tb_cdc_modules.v 57/57 passes under iverilog after
the cdc_modules.v change. Remote Vivado verification in progress.

9_Firmware/9_2_FPGA/radar_receiver_final.v

@@ -83,7 +83,19 @@ module radar_receiver_final (
     output wire [2:0]  ddc_saturation_count,
 
     // MTI 2-pulse canceller saturation count (audit F-6.3).
-    output wire [7:0]  mti_saturation_count_out
+    output wire [7:0]  mti_saturation_count_out,
+
+    // Range-bin decimator watchdog (audit F-6.4 — previously tied off
+    // with an ILA-only note). A high pulse here means the decimator
+    // FSM has not seen the expected number of input samples within
+    // its timeout window, i.e. the upstream FIR/CDC has stalled.
+    output wire        range_decim_watchdog,
+
+    // Audit F-1.2: sticky CIC→FIR CDC overrun flag. Asserts on the first
+    // silent sample drop between the 400 MHz CIC output and the 100 MHz
+    // FIR input; stays high until the next reset. OR'd into the GPIO
+    // diagnostic bit at the top level.
+    output wire        ddc_cic_fir_overrun
 );
 
 // ========== INTERNAL SIGNALS ==========
@@ -254,7 +266,8 @@ ddc_400m_enhanced ddc(
     .reset_monitors(1'b0),
     .debug_sample_count(),
     .debug_internal_i(),
-    .debug_internal_q()
+    .debug_internal_q(),
+    .cdc_cic_fir_overrun(ddc_cic_fir_overrun)
 );
 
 assign ddc_overflow_any     = ddc_mixer_saturation | ddc_filter_overflow;
@@ -404,7 +417,7 @@ range_bin_decimator #(
     .range_bin_index(decimated_range_bin),
     .decimation_mode(2'b01),           // Peak detection mode
     .start_bin(10'd0),
-    .watchdog_timeout()                // Diagnostic — unconnected (monitored via ILA if needed)
+    .watchdog_timeout(range_decim_watchdog)  // Audit F-6.4 — plumbed out
 );
 
 // ========== MTI CANCELLER (Ground Clutter Removal) ==========