add TE0713+UMFT601X-B FT601 integration dev bitstream (timing clean)

FMC LPC dev build for TE0713/TE0701 + UMFT601X-B stack. Fixed timing
closure: replaced set_output_delay with set_max_delay -datapath_only
to eliminate false IBUF+BUFG clock skew penalty on source-synchronous
outputs. Removed erroneous set_input_delay on output-only ft601_be[*].
Added IOB packing for siwu_n, false paths for async GPIO/reset/wakeup.
Strategy: Performance_ExplorePostRoutePhysOpt.

Results: WNS +0.059 ns, WHS +0.121 ns, DRC 0 errors, 0 failing endpoints.
Bitstream: docs/artifacts/te0713-te0701-umft601x-dev-2026-03-21.bit

docs/release-notes.html

@@ -39,6 +39,11 @@
             </tr>
           </thead>
           <tbody>
+            <tr>
+              <td><code>TBD</code> <strong>v0.1.8-te0713-ft601-dev</strong></td>
+              <td>TE0713/TE0701 + UMFT601X-B FT601 integration dev bitstream</td>
+              <td>First timing-clean FT601 USB integration build for the Trenz + UMFT601X-B FMC LPC stack. Wrapper module (<code>radar_system_top_te0713_umft601x_dev</code>) instantiates the full <code>usb_data_interface</code> with synthetic test data (range/Doppler/CFAR packets). Timing closure achieved after fixing source-synchronous clock skew: replaced <code>set_output_delay</code> with <code>set_max_delay -datapath_only</code> for outputs, removed erroneous <code>set_input_delay</code> on output-only <code>ft601_be[*]</code>. WNS +0.059 ns, WHS +0.121 ns, DRC 0 errors. Strategy: <code>Performance_ExplorePostRoutePhysOpt</code>. Vivado 2025.2. Bitstream: <code>docs/artifacts/te0713-te0701-umft601x-dev-2026-03-21.bit</code>.</td>
+            </tr>
             <tr>
               <td><code>TBD</code> <strong>v0.1.7-te0713-heartbeat</strong></td>
               <td>TE0713/TE0701 minimal heartbeat bring-up bitstream</td>