Widen ft601_be to [3:0] for 32-bit FT601 mode, fix NCO XSim TB

- Expand ft601_be from [1:0] to [3:0] across RTL, top-level, testbenches,
  and XDC (uncomment be[2:3] pin assignments B21/A21)
- Fix NCO XSim testbench: correct reset check (0x7FFF not 0), add pipeline
  warmup and sample skip for DSP48E1 quadrature test
- All local regression tests pass (39/39 USB, 10/10 integration, all co-sim)

9_Firmware/9_2_FPGA/radar_system_tb.v

@@ -52,7 +52,7 @@ reg [7:0] adc_d_n;
 
 // FT601 interface
 wire [31:0] ft601_data;
-wire [1:0] ft601_be;
+wire [3:0] ft601_be;
 wire ft601_txe_n;
 wire ft601_rxf_n;
 reg ft601_txe;