Wire self-test results (0x31) to USB status readback path, add fpga_self_test to regression

- usb_data_interface.v: Add 3 self-test status inputs, expand status packet
  from 7 words (header + 5 data + footer) to 8 words (header + 6 data + footer).
  New status_words[5] carries {busy, detail[7:0], flags[4:0]}.
- radar_system_top.v: Wire self_test_flags_latched, self_test_detail_latched,
  self_test_busy to usb_data_interface ports. Add opcode 0x31 as status
  readback alias so host can read self-test results.
- tb_usb_data_interface.v: Add self-test port connections, verify word 5 in
  Group 16, add Group 18 (busy flag + partial failure variant). 81 checks pass.
- run_regression.sh: Add fpga_self_test.v to PROD_RTL lint list and system-
  level compile lists. Add tb_fpga_self_test as Phase 1 unit test.
- 24/24 regression tests pass, lint clean (0 errors, 4 advisory warnings).

9_Firmware/9_2_FPGA/radar_system_top.v

@@ -715,7 +715,12 @@ usb_data_interface usb_inst (
     .status_short_chirp(host_short_chirp_cycles),
     .status_short_listen(host_short_listen_cycles),
     .status_chirps_per_elev(host_chirps_per_elev),
-    .status_range_mode(host_range_mode)
+    .status_range_mode(host_range_mode),
+
+    // Self-test status readback
+    .status_self_test_flags(self_test_flags_latched),
+    .status_self_test_detail(self_test_detail_latched),
+    .status_self_test_busy(self_test_busy)
 );
 
 // ============================================================================
@@ -836,6 +841,7 @@ always @(posedge clk_100m_buf or negedge sys_reset_n) begin
                 8'h27: host_dc_notch_width     <= usb_cmd_value[2:0];
                 // Board bring-up self-test opcodes
                 8'h30: host_self_test_trigger  <= 1'b1;  // Trigger self-test
+                8'h31: host_status_request     <= 1'b1;  // Self-test readback (status alias)
                 // 0x31: readback handled via status mechanism (latched results)
                 8'hFF: host_status_request     <= 1'b1;  // Gap 2: status readback
                 default: ;