FlintyLemming/PLFM_RADAR
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fix(scripts): make Vivado TCL scripts portable and update RTL file lists

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- Replace hardcoded /home/jason-stone/ paths with [info script]-relative
  path resolution in all 9 scripts (build17-21, insert_ila_probes,
  program_fpga, ila_capture, run_cdc_and_netlist)
- Point constraint references at tracked XDC files instead of
  untracked synth_only.xdc
- Remove six phantom RTL entries (chirp_lut_init.v, fft_1024_forward.v,
  fft_1024_inverse.v, level_shifter_interface.v, lvds_to_cmos_400m.v,
  usb_packet_analyzer.v)
- Add six existing modules to file lists (rx_gain_control.v,
  mti_canceller.v, cfar_ca.v, fpga_self_test.v, xfft_16.v,
  adc_clk_mmcm.v)

Closes #38
This commit is contained in:
Serhii
2026-04-06 22:53:42 +03:00
parent 22758fa370
commit 48b3847256
9 changed files with 84 additions and 72 deletions
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9_Firmware/9_2_FPGA/scripts/program_fpga.tcl
+4 -2
View File
@@ -25,8 +25,10 @@
set default_server "localhost"
set default_port 3121
set default_bit "/home/jason-stone/PLFM_RADAR_work/vivado_project/bitstream/radar_system_top.bit"
set default_ltx "/home/jason-stone/PLFM_RADAR_work/vivado_project/bitstream/radar_system_top.ltx"
set script_dir [file dirname [file normalize [info script]]]
set project_root [file normalize [file join $script_dir ".."]]
set default_bit [file join $project_root "build" "bitstream" "radar_system_top_build21.bit"]
set default_ltx [file join $project_root "build" "aeris10_radar.runs" "impl_ila" "radar_system_top.ltx"]
set expected_part "xc7a200t"
set expected_pkg "fbg484"