Bug #9: Both TX and RX SPI init params had platform_ops = NULL, causing adf4382_init() -> no_os_spi_init() to fail with -EINVAL. Fixed by setting platform_ops = &stm32_spi_ops and passing stm32_spi_extra with correct CS port/pin for each device. Bug #10: stm32_spi_write_and_read() never toggled chip select. Since TX and RX ADF4382A share SPI4, every register write hit both PLLs. Rewrote stm32_spi.c to assert CS LOW before transfer and deassert HIGH after, using stm32_spi_extra metadata. Backward-compatible: legacy callers (e.g., AD9523) with cs_port=NULL skip CS management. Also widened chip_select from uint8_t to uint16_t in no_os_spi.h since STM32 GPIO_PIN_xx values (e.g., GPIO_PIN_14=0x4000) overflow uint8_t. 10/10 tests pass (8 original + 2 new regression tests).
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/* shim: stm32_spi.h -- provides stm32_spi_extra type and stm32_spi_ops mock
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*
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* The real stm32_spi.h includes stm32f7xx_hal.h which we can't use in tests.
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* This shim provides the stm32_spi_extra struct and a mock stm32_spi_ops
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* extern so that adf4382a_manager.c compiles against test infrastructure.
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*/
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#ifndef STM32_SPI_H_SHIM
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#define STM32_SPI_H_SHIM
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#include "stm32_hal_mock.h"
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#include "ad_driver_mock.h"
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/**
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* @struct stm32_spi_extra
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* @brief Platform-specific SPI data for STM32 (test mock version).
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*/
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typedef struct {
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SPI_HandleTypeDef *hspi; /**< HAL SPI handle */
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GPIO_TypeDef *cs_port; /**< GPIO port for software CS (NULL = no SW CS) */
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uint16_t cs_pin; /**< GPIO pin mask for software CS */
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} stm32_spi_extra;
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/* Mock stm32_spi_ops -- declared in stm32_hal_mock.c */
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extern const struct no_os_spi_platform_ops stm32_spi_ops;
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#endif /* STM32_SPI_H_SHIM */
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