fix(test,docs): remove dead xfft_32 files, update test infra for dual-16 FFT, add regression guide
- Remove xfft_32.v, tb_xfft_32.v, and fft_twiddle_32.mem (dead code since PR #33 moved Doppler to dual 16-pt FFT architecture) - Update run_regression.sh: xfft_16 in PROD_RTL, remove xfft_32 from EXTRA_RTL and all compile commands - Update tb_fft_engine.v to test with N=16 / fft_twiddle_16.mem - Update validate_mem_files.py: validate fft_twiddle_16.mem instead of 32 - Update testbenches and golden data from main_cleanup branch to match dual-16 architecture (tb_doppler_cosim, tb_doppler_realdata, tb_fullchain_realdata, tb_fullchain_mti_cfar_realdata, tb_system_e2e, radar_receiver_final, golden_doppler.mem) - Update CONTRIBUTING.md with full regression test instructions covering FPGA, MCU, GUI, co-simulation, and formal verification Regression: 23/23 FPGA, 20/20 MCU, 57/58 GUI, 56/56 mem validation, all co-sim scenarios PASS.
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@@ -67,7 +67,7 @@ PROD_RTL=(
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matched_filter_processing_chain.v
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range_bin_decimator.v
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doppler_processor.v
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xfft_32.v
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xfft_16.v
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fft_engine.v
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usb_data_interface.v
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edge_detector.v
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@@ -369,7 +369,7 @@ run_test "Chirp Contract" \
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run_test "Doppler Processor (DSP48)" \
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tb/tb_doppler_reg.vvp \
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tb/tb_doppler_cosim.v doppler_processor.v xfft_32.v fft_engine.v
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tb/tb_doppler_cosim.v doppler_processor.v xfft_16.v fft_engine.v
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run_test "Threshold Detector (detection bugs)" \
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tb/tb_threshold_detector.vvp \
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@@ -414,7 +414,7 @@ if [[ "$QUICK" -eq 0 ]]; then
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cdc_modules.v fir_lowpass.v ddc_input_interface.v \
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chirp_memory_loader_param.v latency_buffer.v \
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matched_filter_multi_segment.v matched_filter_processing_chain.v \
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range_bin_decimator.v doppler_processor.v xfft_32.v fft_engine.v \
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range_bin_decimator.v doppler_processor.v xfft_16.v fft_engine.v \
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rx_gain_control.v mti_canceller.v
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# Golden compare
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@@ -426,7 +426,7 @@ if [[ "$QUICK" -eq 0 ]]; then
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cdc_modules.v fir_lowpass.v ddc_input_interface.v \
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chirp_memory_loader_param.v latency_buffer.v \
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matched_filter_multi_segment.v matched_filter_processing_chain.v \
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range_bin_decimator.v doppler_processor.v xfft_32.v fft_engine.v \
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range_bin_decimator.v doppler_processor.v xfft_16.v fft_engine.v \
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rx_gain_control.v mti_canceller.v
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# Full system top (monitoring-only, legacy)
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@@ -439,7 +439,7 @@ if [[ "$QUICK" -eq 0 ]]; then
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cdc_modules.v fir_lowpass.v ddc_input_interface.v \
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chirp_memory_loader_param.v latency_buffer.v \
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matched_filter_multi_segment.v matched_filter_processing_chain.v \
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range_bin_decimator.v doppler_processor.v xfft_32.v fft_engine.v \
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range_bin_decimator.v doppler_processor.v xfft_16.v fft_engine.v \
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usb_data_interface.v edge_detector.v radar_mode_controller.v \
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rx_gain_control.v cfar_ca.v mti_canceller.v fpga_self_test.v
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@@ -453,7 +453,7 @@ if [[ "$QUICK" -eq 0 ]]; then
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cdc_modules.v fir_lowpass.v ddc_input_interface.v \
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chirp_memory_loader_param.v latency_buffer.v \
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matched_filter_multi_segment.v matched_filter_processing_chain.v \
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range_bin_decimator.v doppler_processor.v xfft_32.v fft_engine.v \
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range_bin_decimator.v doppler_processor.v xfft_16.v fft_engine.v \
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usb_data_interface.v edge_detector.v radar_mode_controller.v \
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rx_gain_control.v cfar_ca.v mti_canceller.v fpga_self_test.v
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else
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@@ -472,10 +472,6 @@ run_test "FFT Engine" \
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tb/tb_fft_reg.vvp \
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tb/tb_fft_engine.v fft_engine.v
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run_test "XFFT-32 Wrapper" \
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tb/tb_xfft_reg.vvp \
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tb/tb_xfft_32.v xfft_32.v fft_engine.v
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run_test "NCO 400MHz" \
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tb/tb_nco_reg.vvp \
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tb/tb_nco_400m.v nco_400m_enhanced.v
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@@ -487,7 +483,7 @@ run_test "FIR Lowpass" \
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run_test "Matched Filter Chain" \
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tb/tb_mf_reg.vvp \
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tb/tb_matched_filter_processing_chain.v matched_filter_processing_chain.v \
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xfft_32.v fft_engine.v chirp_memory_loader_param.v
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fft_engine.v chirp_memory_loader_param.v
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echo ""
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