E2E integration test + RTL fixes: mixer sequencing, USB data-pending flags, receiver toggle wiring (19/19 FPGA)

RTL fixes discovered via new end-to-end testbench:
- plfm_chirp_controller: TX/RX mixer enables now mutually exclusive
  by FSM state (Fix #4), preventing simultaneous TX+RX activation
- usb_data_interface: stream control reset default 3'b001 (range-only),
  added doppler/cfar data_pending sticky flags, write FSM triggers on
  range_valid only — eliminates startup deadlock (Fix #5)
- radar_receiver_final: STM32 toggle signals wired through for mode-00
  pass-through, dynamic frame detection via host_chirps_per_elev
- radar_system_top: STM32 toggle signal wiring to receiver instance
- chirp_memory_loader_param: explicit readmemh range for short chirp

Test infrastructure:
- New tb_system_e2e.v: 46 checks across 12 groups (reset, TX, safety,
  RX, USB R/W, CDC, beam scanning, reset recovery, stream control,
  latency budgets, watchdog)
- tb_usb_data_interface: Tests 21/22/56 updated for data_pending
  architecture (preload flags, verify consumption instead of state)
- tb_chirp_controller: mixer tests T7.1/T7.2 updated for Fix #4
- run_regression.sh: PASS/FAIL regex fixed to match only [PASS]/[FAIL]
  markers, added E2E test entry
- Updated rx_final_doppler_out.csv golden data

9_Firmware/9_2_FPGA/radar_receiver_final.v

@@ -35,7 +35,15 @@ module radar_receiver_final (
     input wire [15:0] host_guard_cycles,
     input wire [15:0] host_short_chirp_cycles,
     input wire [15:0] host_short_listen_cycles,
-    input wire [5:0]  host_chirps_per_elev
+    input wire [5:0]  host_chirps_per_elev,
+
+    // STM32 toggle signals for mode 00 (STM32-driven) pass-through.
+    // These are CDC-synchronized in radar_system_top.v / radar_transmitter.v
+    // before reaching this module. In mode 00, the RX mode controller uses
+    // these to synchronize receiver processing with STM32-timed chirps.
+    input wire stm32_new_chirp_rx,
+    input wire stm32_new_elevation_rx,
+    input wire stm32_new_azimuth_rx
 );
 
 // ========== INTERNAL SIGNALS ==========
@@ -95,9 +103,9 @@ radar_mode_controller rmc (
     .clk(clk),
     .reset_n(reset_n),
     .mode(host_mode),                     // Controlled by host via USB (default: 2'b01 auto-scan)
-    .stm32_new_chirp(1'b0),           // Unused in auto mode
-    .stm32_new_elevation(1'b0),       // Unused in auto mode
-    .stm32_new_azimuth(1'b0),         // Unused in auto mode
+    .stm32_new_chirp(stm32_new_chirp_rx),
+    .stm32_new_elevation(stm32_new_elevation_rx),
+    .stm32_new_azimuth(stm32_new_azimuth_rx),
     .trigger(host_trigger),           // Single-chirp trigger from host via USB
     // Gap 2: Runtime-configurable timing from host USB commands
     .cfg_long_chirp_cycles(host_long_chirp_cycles),
@@ -302,27 +310,17 @@ always @(posedge clk or negedge reset_n) begin
         // Default: no pulse
         new_frame_pulse <= 1'b0;
         
-        // ===== CHOOSE ONE FRAME DETECTION METHOD =====
-        
-        // METHOD A: Detect frame start at chirp_counter = 0
-        // (Assumes frames are 64 chirps: 0-63)
-        //if (chirp_counter == 6'd0 && chirp_counter_prev != 6'd0) begin
-        //    new_frame_pulse <= 1'b1;
-        //end
-        
-        // METHOD B: Detect frame start at chirp_counter = 0 AND 32
-        // (For 32-chirp frames in a 64-chirp sequence)
-         if ((chirp_counter == 6'd0 || chirp_counter == 6'd32) && 
-             (chirp_counter_prev != chirp_counter)) begin
-             new_frame_pulse <= 1'b1;
-         end
-        
-        // METHOD C: Programmable frame start
-        // localparam FRAME_START_CHIRP = 6'd0;  // Set based on your sequence
-        // if (chirp_counter == FRAME_START_CHIRP && 
-        //     chirp_counter_prev != FRAME_START_CHIRP) begin
-        //     new_frame_pulse <= 1'b1;
-        // end
+        // Dynamic frame detection using host_chirps_per_elev.
+        // Detect frame boundary when chirp_counter changes AND is a
+        // multiple of host_chirps_per_elev (0, N, 2N, 3N, ...).
+        // Uses a modulo counter that resets at host_chirps_per_elev.
+        if (chirp_counter != chirp_counter_prev) begin
+            if (chirp_counter == 6'd0 ||
+                chirp_counter == host_chirps_per_elev ||
+                chirp_counter == {host_chirps_per_elev, 1'b0}) begin
+                new_frame_pulse <= 1'b1;
+            end
+        end
         
         // Store previous value
         chirp_counter_prev <= chirp_counter;