fix: align all range/carrier/velocity values to PLFM hardware + FPGA bug fixes
- Correct carrier from 10.525/10 GHz to 10.5 GHz (verified ADF4382 config) - Correct range-per-bin from 4.8/5.6/781.25 m to 24.0 m (matched-filter) - Correct velocity resolution from 1.484 to 2.67 m/s/bin (PRI-based) - Correct processing rate from 4 MSPS to 100 MSPS (post-DDC) - Correct max range from 307/5000/50000 m to 1536 m (64 bins x 24 m) - Add WaveformConfig.pri_s field (167 us PRI for velocity calculation) - Fix short chirp chirp_complete deadlock (Bug A) - Remove dead short_chirp ports, rename long_chirp to ref_chirp (Bug B) - Fix stale latency comment 2159 -> 3187 cycles (Bug C) - Create radar_params.vh as single source of truth for FPGA parameters - Lower RadarSettings.cpp map_size validation bound from 1000 to 100 - Add PLFM hardware constants to golden_reference.py - Update all GUI versions, tests, and cross-layer contracts All 244 tests passing (167 Python + 21 MCU + 29 cross-layer + 27 FPGA)
This commit is contained in:
Jason
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// ============================================================================
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// radar_params.vh — Single Source of Truth for AERIS-10 FPGA Parameters
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// ============================================================================
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//
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// ALL modules in the FPGA processing chain MUST `include this file instead of
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// hardcoding range bins, segment counts, chirp samples, or timing values.
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//
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// This file uses `define macros (not localparam) so it can be included at any
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// scope. Each consuming module should include this file inside its body and
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// optionally alias macros to localparams for readability.
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//
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// BOARD VARIANTS:
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// SUPPORT_LONG_RANGE = 0 (50T, USB_MODE=1) — 3 km mode only, 64 range bins
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// SUPPORT_LONG_RANGE = 1 (200T, USB_MODE=0) — 3 km + 20 km modes, up to 1024 bins
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//
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// RANGE MODES (runtime, via host_range_mode register, opcode 0x20):
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// 2'b00 = 3 km (default on both boards)
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// 2'b01 = 20 km (200T only; clamped to 3 km on 50T)
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// 2'b10 = Reserved
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// 2'b11 = Reserved
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//
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// USAGE:
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// `include "radar_params.vh"
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// Then reference `RP_FFT_SIZE, `RP_MAX_OUTPUT_BINS, etc.
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//
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// PHYSICAL CONSTANTS (derived from hardware):
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// ADC clock: 400 MSPS
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// CIC decimation: 4x
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// Processing rate: 100 MSPS (post-DDC)
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// Range per sample: c / (2 * 100e6) = 1.5 m
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// Decimation factor: 16 (1024 FFT bins -> 64 output bins per segment)
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// Range per dec. bin: 1.5 m * 16 = 24.0 m
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// Carrier frequency: 10.5 GHz
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//
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// CHIRP BANDWIDTH (Phase 1 target — currently 20 MHz, planned 30 MHz):
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// Range resolution: c / (2 * BW)
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// 20 MHz -> 7.5 m
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// 30 MHz -> 5.0 m
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// NOTE: Range resolution is independent of range-per-bin. Resolution
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// determines the minimum separation between two targets; range-per-bin
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// determines the spatial sampling grid.
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// ============================================================================
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`ifndef RADAR_PARAMS_VH
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`define RADAR_PARAMS_VH
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// ============================================================================
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// BOARD VARIANT — set at synthesis time, NOT runtime
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// ============================================================================
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// Default to 50T (conservative). Override in top-level or synthesis script:
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// +define+SUPPORT_LONG_RANGE
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// or via Vivado: set_property verilog_define {SUPPORT_LONG_RANGE} [current_fileset]
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// Note: SUPPORT_LONG_RANGE is a flag define (ifdef/ifndef), not a value.
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// `ifndef SUPPORT_LONG_RANGE means 50T (no long range).
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// `ifdef SUPPORT_LONG_RANGE means 200T (long range supported).
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// ============================================================================
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// FFT AND PROCESSING CONSTANTS (fixed, both modes)
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// ============================================================================
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`define RP_FFT_SIZE 1024 // Range FFT points per segment
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`define RP_OVERLAP_SAMPLES 128 // Overlap between adjacent segments
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`define RP_SEGMENT_ADVANCE 896 // FFT_SIZE - OVERLAP = 1024 - 128
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`define RP_DECIMATION_FACTOR 16 // Range bin decimation (1024 -> 64)
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`define RP_BINS_PER_SEGMENT 64 // FFT_SIZE / DECIMATION_FACTOR
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`define RP_DOPPLER_FFT_SIZE 16 // Per sub-frame Doppler FFT
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`define RP_CHIRPS_PER_FRAME 32 // Total chirps (16 long + 16 short)
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`define RP_CHIRPS_PER_SUBFRAME 16 // Chirps per Doppler sub-frame
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`define RP_NUM_DOPPLER_BINS 32 // 2 sub-frames * 16 = 32
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`define RP_DATA_WIDTH 16 // ADC/processing data width
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// ============================================================================
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// 3 KM MODE PARAMETERS (both 50T and 200T)
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// ============================================================================
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`define RP_LONG_CHIRP_SAMPLES_3KM 3000 // 30 us at 100 MSPS
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`define RP_LONG_SEGMENTS_3KM 4 // ceil((3000-1024)/896) + 1 = 4
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`define RP_OUTPUT_RANGE_BINS_3KM 64 // Downstream pipeline expects 64 range bins (NOTE: will become 128 after 2048-pt FFT upgrade)
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`define RP_SHORT_CHIRP_SAMPLES 50 // 0.5 us at 100 MSPS (same both modes)
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`define RP_SHORT_SEGMENTS 1 // Single segment for short chirp
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// Derived 3 km limits
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`define RP_MAX_RANGE_3KM 1536 // 64 bins * 24 m = 1536 m
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// ============================================================================
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// 20 KM MODE PARAMETERS (200T only)
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// ============================================================================
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`define RP_LONG_CHIRP_SAMPLES_20KM 13700 // 137 us at 100 MSPS (= listen window)
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`define RP_LONG_SEGMENTS_20KM 16 // ceil((13700-1024)/896) + 1 = 16
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`define RP_OUTPUT_RANGE_BINS_20KM 1024 // 16 segments * 64 dec. bins each
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// Derived 20 km limits
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`define RP_MAX_RANGE_20KM 24576 // 1024 bins * 24 m = 24576 m
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// ============================================================================
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// MAX VALUES (for sizing buffers — compile-time, based on board variant)
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// ============================================================================
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`ifdef SUPPORT_LONG_RANGE
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`define RP_MAX_SEGMENTS 16
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`define RP_MAX_OUTPUT_BINS 1024
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`define RP_MAX_CHIRP_SAMPLES 13700
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`else
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`define RP_MAX_SEGMENTS 4
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`define RP_MAX_OUTPUT_BINS 64
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`define RP_MAX_CHIRP_SAMPLES 3000
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`endif
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// ============================================================================
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// BIT WIDTHS (derived from MAX values)
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// ============================================================================
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// Segment index: ceil(log2(MAX_SEGMENTS))
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// 50T: log2(4) = 2 bits
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// 200T: log2(16) = 4 bits
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`ifdef SUPPORT_LONG_RANGE
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`define RP_SEGMENT_IDX_WIDTH 4
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`define RP_RANGE_BIN_WIDTH 10
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`define RP_CHIRP_MEM_ADDR_W 14 // log2(16*1024) = 14
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`define RP_DOPPLER_MEM_ADDR_W 15 // log2(1024*32) = 15
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`define RP_CFAR_MAG_ADDR_W 15 // log2(1024*32) = 15
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`else
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`define RP_SEGMENT_IDX_WIDTH 2
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`define RP_RANGE_BIN_WIDTH 6
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`define RP_CHIRP_MEM_ADDR_W 12 // log2(4*1024) = 12
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`define RP_DOPPLER_MEM_ADDR_W 11 // log2(64*32) = 11
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`define RP_CFAR_MAG_ADDR_W 11 // log2(64*32) = 11
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`endif
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// Derived depths (for memory declarations)
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// Usage: reg [15:0] mem [0:`RP_CHIRP_MEM_DEPTH-1];
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`define RP_CHIRP_MEM_DEPTH (`RP_MAX_SEGMENTS * `RP_FFT_SIZE)
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`define RP_DOPPLER_MEM_DEPTH (`RP_MAX_OUTPUT_BINS * `RP_CHIRPS_PER_FRAME)
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`define RP_CFAR_MAG_DEPTH (`RP_MAX_OUTPUT_BINS * `RP_NUM_DOPPLER_BINS)
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// ============================================================================
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// CHIRP TIMING DEFAULTS (100 MHz clock cycles)
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// ============================================================================
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// Reset defaults for host-configurable timing registers.
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// Match radar_mode_controller.v parameters and main.cpp STM32 defaults.
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`define RP_DEF_LONG_CHIRP_CYCLES 3000 // 30 us
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`define RP_DEF_LONG_LISTEN_CYCLES 13700 // 137 us
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`define RP_DEF_GUARD_CYCLES 17540 // 175.4 us
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`define RP_DEF_SHORT_CHIRP_CYCLES 50 // 0.5 us
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`define RP_DEF_SHORT_LISTEN_CYCLES 17450 // 174.5 us
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`define RP_DEF_CHIRPS_PER_ELEV 32
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// ============================================================================
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// BLIND ZONE CONSTANTS (informational, for comments and GUI)
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// ============================================================================
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// Long chirp blind zone: c * 30 us / 2 = 4500 m
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// Short chirp blind zone: c * 0.5 us / 2 = 75 m
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`define RP_LONG_BLIND_ZONE_M 4500
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`define RP_SHORT_BLIND_ZONE_M 75
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// ============================================================================
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// PHYSICAL CONSTANTS (integer-scaled for Verilog — use in comments/assertions)
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// ============================================================================
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// Range per ADC sample: 1.5 m (stored as 15 in units of 0.1 m)
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// Range per decimated bin: 24.0 m (stored as 240 in units of 0.1 m)
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// Processing rate: 100 MSPS
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`define RP_RANGE_PER_SAMPLE_DM 15 // 1.5 m in decimeters
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`define RP_RANGE_PER_BIN_DM 240 // 24.0 m in decimeters
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`define RP_PROCESSING_RATE_MHZ 100
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// ============================================================================
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// AGC DEFAULTS
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// ============================================================================
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`define RP_DEF_AGC_TARGET 200
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`define RP_DEF_AGC_ATTACK 1
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`define RP_DEF_AGC_DECAY 1
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`define RP_DEF_AGC_HOLDOFF 4
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// ============================================================================
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// CFAR DEFAULTS
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// ============================================================================
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`define RP_DEF_CFAR_GUARD 2
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`define RP_DEF_CFAR_TRAIN 8
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`define RP_DEF_CFAR_ALPHA 8'h30 // 3.0 in Q4.4
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`define RP_DEF_CFAR_MODE 2'b00 // CA-CFAR
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// ============================================================================
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// DETECTION DEFAULTS
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// ============================================================================
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`define RP_DEF_DETECT_THRESHOLD 10000
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// ============================================================================
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// RANGE MODE ENCODING
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// ============================================================================
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`define RP_RANGE_MODE_3KM 2'b00
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`define RP_RANGE_MODE_20KM 2'b01
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`define RP_RANGE_MODE_RSVD2 2'b10
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`define RP_RANGE_MODE_RSVD3 2'b11
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`endif // RADAR_PARAMS_VH
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